ICS840001CK-32T [ICSI]
FEMTOCLOCKS-TM CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER; FEMTOCLOCKS -TM CRYSTAL -TO LVCMOS / LVTTL频率合成器型号: | ICS840001CK-32T |
厂家: | INTEGRATED CIRCUIT SOLUTION INC |
描述: | FEMTOCLOCKS-TM CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER |
文件: | 总10页 (文件大小:180K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS840001-32 is a two output LVCMOS/ • One LVCMOS/LVTTL output, 15Ω typical output
ICS
LVTTL Synthesizer and is a member of the
HiPerClocksTM family of high performance
devices from ICS. The device uses a 40MHz
crystal to provide a 40MHz reference clock
impedence and one reference clock output
• 40MHz, 10pF parallel resonant crystal
• Output frequencies: 100MHz or 106.25MHz
HiPerClockS™
output and to synthesize a 100MHz or 106.25MHz
output. The ICS840001-32 has excellent <1ps phase
jitter performance over the 637kHz – 5MHz integration
range. The ICS840001-32 is packaged in a 3mm x 3mm
16-pin VFQFN, making it ideal for use on space con-
strained boards.
• RMS phase jitter @ 106.25MHz, using a 40MHz crystal
(637kHz - 5MHz): 0.78ps (typical)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Availabe in both standard and lead-free RoHS-compliant
packages
FUNCTION TABLE
Inputs
Outputs
Crystal Frequency
(MHz)
Q Output
Frequency (MHz)
REF_OUT
Frequency (MHz)
SEL Input
40
40
0
1
100
40
40
106.25
BLOCK DIAGRAM
PIN ASSIGNMENT
40MHz
REF_OUT
16 15 14 13
12
VDD
1
2
Q
XTAL_OUT
11 VDDO_Q
10 VDD
100MHz or
106.25MHz
Q
XTAL_IN
SEL
3
4
XTAL_IN
OSC
Synthesizer
9
REF_OUT
5
6
7
8
XTAL_OUT
(Pullup)
SEL
ICS840001-32
16-LeadVFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
1
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 10
VDD
Power
Input
Core supply pin.
XTAL_OUT,
XTAL_IN
Crystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
2, 3
4
SEL
GND
Input
Pullup
Select input. LVCMOS/LVTTL interface levels.
Power supply ground.
5, 8, 13
6, 14, 15
7
Power
nc
Unused
Power
No connect.
VDDO_REF_OUT
Output supply pin for REF_OUT output
Single-ended three-state reference clock output.
LVCMOS/LVTTL interface levels. 15Ω typical output impedance.
Output supply pin for Q output.
9
REF_OUT
VDDO_Q
Q
Output
Power
Output
Power
11
12
16
Single-ended clock output. LVCMOS/LVTTL interface levels.
15Ω typical output impedance.
Analog supply pin.
VDDA
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
CIN
Input Capacitance
4
pF
VDD, VDDA, VDDO_REF_OUT, VDDO_Q
3.465V
=
CPD
Power Dissipation Capacitance
8
pF
RPULLUP
ROUT
Input Pullup Resistor
Output Impedance
51
15
kΩ
Ω
840001CK-32
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REV.A NOVEMBER 23, 2005
2
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
DD
Inputs, V
-0.5V to VDD + 0.5 V
-0.5V to VDDO + 0.5V
51.5°C/W (0 lfpm)
-65°C to 150°C
I
Outputs, VO
PackageThermal Impedance, θ
JA
StorageTemperature, T
STG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD =VDDA =VDDO_REF_OUT =VDDO_Q = 3.3V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
3.135
Typical
3.3
Maximum Units
VDD
VDDA
VDDO
IDD
Core Supply Voltage
3.465
3.465
3.465
V
V
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
3.135
3.3
3.135
3.3
V
70
mA
mA
mA
IDDA
IDDO
25
12
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = VDDO_REF_OUT =VDDO_Q = 3.3V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
VIL
IIH
Input High Voltage
2
VDD + 0.3
V
V
Input Low Voltage
-0.3
0.8
5
Input High Current
VDD = VIN = 3.465V
µA
µA
V
IIL
Input Low Current
VDD = 3.465V, VIN = 0V
-150
2.6
VOH
VOL
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
0.5
V
NOTE 1: Outputs terminated with 50Ω to VDDO_x/2 See Parameter Measurement Information Section,
"3.3V Output Load Test Circuit".
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Typical Maximum Units
Fundamental
40
Mode of Oscillation
Frequency
MHz
Ω
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
50
7
pF
10
100
µW
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
3
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 5. AC CHARACTERISTICS, VDD =VDDA =VDDO_REF_OUT =VDDO_Q = 3.3V 5ꢀ, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
f_SEL = 0
Minimum Typical Maximum Units
REF_OUT
Q
100
MHz
MHz
fOUT
Output Frequency
f_SEL = 1
106.25
100MHz, Integration Range:
637kHz to 5MHz
106.25MHz, Integration Range:
637kHz to 5MHz
0.83
0.78
ps
ps
tjit(Ø)
RMS Phase Jitter (Random)
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20ꢀ to 80ꢀ
900
50
ps
ꢀ
All parameters are characterized @ 100MHz and 106.25MHz.
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
4
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TYPICAL PHASE NOISE AT 106.25MHZ
0
Fibre Channel Filter
-10
-20
-30
-40
-50
-60
-70
106.25MHz
RMS Phase Jitter (Random)
Raw Phase Noise Data
637kHz to 5MHz = 0.78ps (typical)
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
Phase Noise Result by adding
Fibre Channel Filter to raw data
-200
10
100
1k
10k
100k
1M
OFFSET FREQUENCY (HZ)
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
5
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
1.65V 5ꢀ
Phase Noise Plot
SCOPE
VDD,
VDDA,
VDDO_X
Phase Noise Mask
Qx
LVCMOS
GND
Offset Frequency
f1
f2
-1.65V 5ꢀ
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
VDDOX
80ꢀ
tF
80ꢀ
tR
2
Q
tPW
20ꢀ
20ꢀ
tPERIOD
Clock
Outputs
tPW
x 100ꢀ
odc =
tPERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
6
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise.The ICS840001-32 provides sepa-
rate power supplies to isolate any high switching noise from
the outputs to the internal PLL. VDD, VDDA and VDDO_X should be
individually connected to the power supply plane through
vias, and bypass capacitors should be used for each pin. To
achieve optimum jitter performance, power supply isolation
is required. Figure 1 illustrates how a 10Ω resistor along with
a 10μF and a .01μF bypass capacitor should be connected to
each VDDA pin. The 10Ω resistor can also be replaced by a
ferrite bead.
3.3V
VDD
.01μF
.01μF
10Ω
VDDA
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840001-32 has been characterized with 10pF paral- parallel resonant crystal and were chosen to minimize the
lel resonant crystals.The capacitor values, C1 and C2, shown ppm error. The optimum C1 and C2 values can be slightly
in Figure 2 below were determined using a 40MHz, 10pF adjusted for different board layouts.
XTAL_IN
C1
X1
Crystal
XTAL_OUT
C2
Figure 2. CRYSTAL INPUt INTERFACE
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
7
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE FOR 16 LEAD VFQFN
θJA vs. 0 Air Flow (Linear Feet per Minute)
0
Multi-Layer PCB, JEDEC Standard Test Boards
51.5°C/W
TRANSISTOR COUNT
The transistor count for ICS840001-32 is: 2121
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
8
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
PACKAGE OUTLINE - K SUFFIX FOR 16 LEAD VFQFN
TABLE 8. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS
SYMBOL
MINIMUM
MAXIMUM
N
A
16
0.80
0
1.0
A1
A3
b
0.05
0.25 Reference
0.18
0.30
e
0.50 BASIC
ND
NE
D
4
4
3.0
D2
E
0.25
1.25
3.0
E2
L
0.25
0.30
1.25
0.50
Reference Document: JEDEC Publication 95, MO-220
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
9
PRELIMINARY
ICS840001-32
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 9. ORDERING INFORMATION
Part/Order Number
ICS840001CK-32
Marking
Package
Shipping Packaging
tray
Temperature
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
1C32
1C32
TBD
TBD
16 Lead VFQFN
ICS840001CK-32T
ICS840001CK-32LF
ICS840001CK-32LFT
16 Lead VFQFN
2500 tape & reel
tray
16 Lead "Lead-Free" VFQFN
16 Lead "Lead-Free" VFQFN
2500 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS complaint.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
840001CK-32
www.icst.com/products/hiperclocks.html
REV.A NOVEMBER 23, 2005
10
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