MK3720ATR [ICSI]

27 MHz and 54 MHz 3.3 Volt VCXO; 27兆赫和54兆赫3.3伏的VCXO
MK3720ATR
型号: MK3720ATR
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

27 MHz and 54 MHz 3.3 Volt VCXO
27兆赫和54兆赫3.3伏的VCXO

晶体 外围集成电路 石英晶振 压控振荡器 光电二极管 时钟
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中文:  中文翻译
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MK3720  
27 MHz and 54 MHz 3.3 Volt VCXO  
Features  
Description  
The MK3720 is a low cost, low jitter, high  
• Packaged in 8 pin SOIC  
performance 3.3 Volt VCXO and PLL clock  
synthesizer designed to replace expensive 13.5, 27,  
or 54MHz VCXOs. The patented on-chip  
Voltage Controlled Crystal Oscillator accepts a  
0 to 3.3 V input voltage to cause the output clocks  
to vary by ±100 ppm. Using our patented VCXO  
and analog/digital Phase-Locked Loop (PLL)  
techniques, the device uses an inexpensive external  
13.5 MHz pullable crystal input to produce output  
clocks of 13.5 MHz, 27 MHz, and 54 MHz .  
• 3.3 V only operating voltage  
• Output clocks of 54, 27, and 13.5MHz  
• Uses an inexpensive 13.500 MHz external crystal  
• On-chip patented VCXO with pull range  
of 200ppm (minimum)  
• VCXO tuning voltage of 0 to 3.3 V  
• 12 mA output drive capability at TTL levels  
• Advanced, low power, sub-micron CMOS process  
• The A version is the latest, manufactured in a smaller  
geometry process. The MK3720A gives a wider pull  
range than the MK3720S, and so is recommended  
for all new designs, and cost reductions of existing  
designs.  
The MK3720A is a drop-in replacement to the  
earlier MK3720S.  
Block Diagram  
Output  
54 MHz Clock  
Buffer  
VIN  
PLL/Clock  
Synthesis  
Circuitry  
Output  
Buffer  
X1  
X2  
27 MHz Clock  
Voltage  
Controlled  
Crystal  
13.5 MHz  
pullable  
crystal  
Output  
Buffer  
13.5 MHz Clock  
Oscillator  
MDS 3720 D  
1
Revision 053100  
Printed 11/16/00  
Integrated Circuit Systems, Inc. •525 Race Street • San Jose • CA• 95126• (408)295-9800tel • www.icst.com  
MK3720  
27 MHz and 54 MHz 3.3 Volt VCXO  
Pin Assignment  
MK3720  
1
2
3
4
8
7
6
5
X1  
X2  
VDD  
VIN  
27M  
13.5M  
54M  
GND  
8 pin (150 mil) SOIC  
Pin Descriptions  
Number  
Name  
X1  
Description  
1
2
3
4
5
6
7
8
Crystal connection. Connect to a pullable 13.5 MHz crystal.  
VDD. Connect to +3.3 V.  
VDD  
VIN  
GND  
54M  
13.5M  
27M  
X2  
Voltage input to VCXO. Zero to 3.3 V analog input which controls the frequency of the VCXO.  
Connect to ground.  
54 MHz VCXO clock output.  
13.5 MHz VCXO clock output.  
27 MHz VCXO clock output.  
Crystal connection. Connect to a pullable 13.5 MHz crystal.  
Pullable Crystal Specifications:  
Correlation (load) Capacitance  
C0/C1  
ESR  
Operating Temperature  
Initial Accuracy  
Temperature plus Aging Stability  
14 pF  
240 max  
35 Wmax  
0 to 70 °C  
±20 ppm  
±50 ppm  
MDS 3720 D  
2
Revision 053100  
Printed 11/16/00  
Integrated Circuit Systems, Inc. •525 Race Street • San Jose • CA• 95126• (408)295-9800tel • www.icst.com  
MK3720  
27 MHz and 54 MHz 3.3 Volt VCXO  
Electrical Specifications  
Parameter  
Conditions  
Minimum  
Typical  
Maximum Units  
ABSOLUTE MAXIMUM RATINGS (note 1)  
Supply voltage, VDD  
Referenced to GND  
7
VDD+0.5  
70  
V
V
Inputs and Clock Outputs  
Ambient Operating Temperature  
Soldering Temperature  
Storage temperature  
Referenced to GND  
Max of 10 seconds  
-0.5  
0
°C  
°C  
°C  
260  
-65  
150  
DC CHARACTERISTICS (VDD = 3.3 V unless noted)  
Operating Voltage, VDD  
3.15  
2.4  
3.45  
0.4  
V
V
Output High Voltage, VOH  
Output Low Voltage, VOL  
IOH=-12mA  
IOL=12mA  
IOH=-4mA  
No Load  
V
Output High Voltage, VOH, CMOS level  
Operating Supply Current, IDD  
Short Circuit Current  
VDD-0.4  
0
V
11  
mA  
mA  
V
±50  
VIN, VCXO control voltage  
3.3  
AC CHARACTERISTICS (VDD = 3.3 V unless noted)  
Input Crystal Frequency  
13.50000  
MH z  
ns  
Output Clock Rise Time  
0.8 to 2.0V  
2.0 to 0.8V  
At 1.4V  
1.5  
1.5  
55  
Output Clock Fall Time  
ns  
Output Clock Duty Cycle  
Maximum Absolute Jitter, short term  
Output pullability, note 2  
45  
50  
%
100  
ps  
0V £ VIN £ 3.3 V  
±100  
ppm  
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged  
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.  
2. With an ICS approved pullable crystal. The MK3720A has a typical pull range of ±180 ppm.  
External Components  
The MK3720 requires a minimum number of external components for proper operation. A decoupling  
capacitor of 0.01µF should be connected between VDD and GND on pins 2 and 4, as close to the  
MK3720 as possible. A series termination resistor of 33 Wmay be used for the clock output. The input  
crystal must be connected as close to the chip as possible. The input crystal should be a parallel mode,  
pullable, AT cut, 13.5 MHz, with 14 pF load capacitance. Consult ICS for recommended suppliers.  
IMPORTANT - read application note MAN05 before laying out the PCB.  
MDS 3720 D  
3
Revision 053100  
Printed 11/16/00  
Integrated Circuit Systems, Inc. •525 Race Street • San Jose • CA• 95126• (408)295-9800tel • www.icst.com  
MK3720  
27 MHz and 54 MHz 3.3 Volt VCXO  
Package Outline and Package Dimensions  
(For current dimensional specifications, see JEDEC Publication No. 95.)  
8 pin SOIC  
Inches  
Min  
Millimeters  
Symbol  
A
Max  
Min  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
1.27 BSC  
5.80  
0.25  
0.41  
Max  
0.0532 0.0688  
0.0040 0.0098  
0.0130 0.0200  
0.0075 0.0098  
0.1890 0.1968  
0.1497 0.1574  
.050 BSC  
1.75  
0.24  
0.51  
0.24  
5.00  
4.00  
A1  
B
C
E
H
D
E
e
INDEX  
AREA  
H
h
0.2284 0.2440  
0.0099 0.0195  
0.0160 0.0500  
6.20  
0.50  
1.27  
1
L
h x 45°  
D
A
L
A1  
C
B
e
Ordering Information  
Part/Order Number  
MK3720A  
Marking  
MK3720A  
MK3720A  
MK3720S  
MK3720S  
Shipping packaging  
Package  
Temperature  
0-70 °C  
tubes  
8 pin SOIC  
8 pin SOIC  
8 pin SOIC  
8 pin SOIC  
MK3720ATR  
MK3720S  
Tape and reel  
tubes  
0-70 °C  
0-70 °C  
MK3720STR  
Tape and reel  
0-70 °C  
CHANGE HISTORY  
Version Date first published  
Status  
Comments  
Added A version  
D
C
B
A
5/31/00  
12/29/99  
5/25/99  
4/19/99  
Released  
Preliminary  
Preliminary  
Changed to JEDEC dimensions. Changed VDD to ±5%. Added Crystal specs.  
Updated specs for crystal capacitance, IDD, jitter.  
Original  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS) assumes no responsibility for either its use or for  
the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use  
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental  
requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize  
or warrant any ICS product for use in life support devices or critical medical instruments.  
MDS 3720 D  
4
Revision 053100  
Printed 11/16/00  
Integrated Circuit Systems, Inc. •525 Race Street • San Jose • CA• 95126• (408)295-9800tel • www.icst.com  

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