ICS9120-47 [ICSI]
Modem and Audio Clock Generator; 调制解调器和音频时钟发生器
| 型号： | ICS9120-47 |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | Modem and Audio Clock Generator |
| 文件： | 总5页 (文件大小：111K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS9120-47
Integrated
Circuit
Systems, Inc.
Modem and Audio Clock Generator
General Description
Features
The ICS9120-47 is a high performance frequency generator
designed to support digital compact disk drive systems. It
offers all clock frequencies required for the servo and decoder
sections of these devices. These frequencies are synthesized
from a single 16.9344 MHz on-chip oscillator.
•
Generates the output clock frequencies required by
CD-ROM drive systems
•
•
•
•
•
•
•
Single 16.9344 MHz crystal or system clock reference
100ps one sigma jitter
Output rise/fall times less than 2.0ns (at 5VVDD)
On-chip loop filter components
3.0V-5.5V supply range
150 ppm output frequency accuracy
8-pin, 150-mil SOIC
High accuracy, low jitter PLLs meet the 150 ppm frequency
tolerance required by these systems. Fast output clock edge
rates minimize board induced jitter.
Unlike competitive devices, the ICS9120-47 operates over
the entire 3.0-5.5V range.
Applications
•
Specifically designed to support CD-ROM drive
requirements of multimedia applications
Block Diagram
9120-47 Rev B 071696
ICS9120-47
Pin Configuration
External Components/Crystal Selection
The ICS9120-47 incorporates a crystal oscillator circuit de-signed
to provide 50% duty cycle over a range of operating conditions,
including the addition of external crystal load ca-pacitors to pins
X1 and X2.
For the crystal oscillator, the crystal load capacitance must be
connected externally by adding a capacitor from each of the X1
and X2 pins to ground. A parallel resonant 16.9344 MHz crystal is
recommended.
Duty cycle is also maintained when using an external clock source
(connected to X1, X2 left unconnected) as long as the external
clock has good duty cycle.
8-Pin SOIC
Pin Descriptions for ICS9120-47
PIN
NUMBER
1
PIN NAME
X1
TYPE
Input
DESCRIPTION
Crystal or external clock source. Has feedback bias for crystal.
Nominally 16.9344 MHz input applied. (No internal load cap; must
connect external load cap to ground for crystal oscillator).
2
3
4
5
6
7
VDD
Power +Power supply input.
GND
Power Ground return for Pin 2.
CLK3
CLK2
CLK4
REFCLK
Output 33.8688 MHz target output clock (with nominal 16.9344 MHz input).
Output 22.5792 MHz target output clock (with nominal 16.9344 MHz input).
Output 50.8032 MHz target output clock (with nominal 16.9344 MHz input).
Output 16.9344 MHz reference clock buffered output (with nominal 16.9344
MHz input).
8
X2
Output Crystal output drive (leave this pin unconnected when using an
external clock). (No internal load cap; must connect external load cap
to ground for crystal oscillator).
2
ICS9120-47
Absolute Maximum Ratings
AVDD,VDD referenced to GND .......................................................................... 7V
Operating temperature under bias .................................................... 0oC to +70oC
Storage temperature ..................................................................... -65oC to +150oC
Voltage on I/O pins referenced to GND ...................... GND -0.5V toVDD +0.5V
Power dissipation ...................................................................................... 0.5 Watts
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect product reliability.
Electrical Characteristics at 5 V
VDD = +4.5 to +5.5V, TA = 0 to 70oC unless otherwise stated
DC Characteristics
PARAMETER
SYMBOL
VIL
TEST CONDITIONS
MIN
TYP
-
MAX
0.8
-
UNITS
V
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
Supply Current
-
VIH
2.0
-
V
IIL
VIN=0V
-18.0
-8.3
-
-
µA
IIH
VIN=VDD
-
5.0
0.4
-
µA
VOL*
VOH*
IOL*
IOL=+10mA
IOH=-30mA
VOL=0.8V
VOH=2.4V
Unloaded
-
2.4
25.0
-
0.15
3.7
V
V
45.0
-53.0
30.0
400.0
-
mA
mA
mA
k ohm
IOH
*
-35.0
70.0
800.0
IDD*
-
Pull-up Resistor Value
Rpu*
-
AC Characteristics
15pF load 0.8 to 2.0V
15pF load 2.0 to 0.8V
15pF load 20% to 80%
15pF load 80% to 20%
Rise Time
Fall Time
Rise Time
Fall Time
Tr*
Tf*
Tr*
Tf*
-
-
-
-
0.8
0.6
1.7
1.1
2.0
1.5
2.5
2.0
ns
ns
ns
ns
15pF load @ 50% of
VDD; Except REFCLK
15pF load @ 50% of
VDD; REFCLK only
For all frequencies except
REFCLK
Duty Cycle
Dt*
Dt*
45.0
40.0
-
50.0
55.0
55.0
60.0
%
%
ps
ps
Duty Cycle
Jitter, One Sigma
Jitter, Absolute
Tjis*
Tjab*
100.0
250.0
140.0
400.0
For all frequencies
except REFCLK
-400.0
Jitter, One Sigma
Jitter Absolute
Tjis*
Tjab*
Fi*
REFCLK only
REFCLK only
-
-700.0
11.0
14.0
-
150.0
400.0
14.0
-
150.0
700.0
17.0
ps
ns
Input Frequency Range
Output Frequency Range
Power-up Time
MHz
MHz
ms
Fo*
52.0
Tpu*
0 to 40.3 MHz
5.5
12.0
X1 (Pin 1),
X2 (Pin 8)
Crystal Input Capacitance
Cinx*
-
5
-
pF
*Parameter is guaranteed by design and characterization. Not 100% tested in production.
3
ICS9120-47
Electrical Characteristics at 3.3 V
VDD = +3.0 to +3.7V, TA = 0OC-70oC unless otherwise stated
DC Characteristics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
-
TYP
MAX
UNITS
V
IL
V
DD
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
Supply Current
AC Characteristics
Rise Time
-
-
0.2V
-
IH
V
DD
0.7V
V
IL
I
IN
V =0V
-8.0
-3.6
-
-
µA
µA
V
IH
I
IN
V =VDD
-
-
5.0
0.1
-
OL
V *
OL
DD
I =6.0mA
0.05V
0.94V
24.0
OH
V *
OH
DD
DD
I =4.0mA
0.85V
V
OL
I *
O
DD
V L=0.2V
15.0
-
mA
mA
mA
OH
I *
OH
DD
V =0.7V
-
-
-13.0
20.0
-8.0
45.0
DD
I *
Unloaded
Tr*
15pF load 0.8 to 2.0V
15pF load 2.0 to 0.8V
15pF load 20% to 80%
15pF load 80% to 20%
-
-
-
-
2.2
1.2
2.5
1.4
3.5
2.0
3.5
2.5
ns
ns
ns
ns
f
Fall Time
T*
r
Rise Time
T *
f
Fall Time
T*
15pF load @ 50% of
VDD; Except REFCLK
15pF load @ 50% of
VDD; REFCLK only
For all frequencies
except REFCLK
t
Duty Cycle
D *
45.0
45.0
-
50.0
57.0
55.0
65.0
%
%
ps
ps
t
Duty Cycle
D *
jis
T *
Jitter, One Sigma
Jitter Absolute
150.0
300.0
200
For all frequencies
except REFCLK
jab
T *
-500.0
500.0
jis
Jitter, One Sigma
T *
REFCLK only
-
-500.0
11.0
14.0
-
170.0
350.0
14.3
-
250.0
500.0
15.0
ps
ns
jab
T *
Jitter, Absolute
REFCLK only
i
Input Frequency Range
Output Frequency Range
Power-up Time
F *
MHz
MHz
ms
o
F *
52.0
pu*
T
0 to 40.3 MHz
5.5
12.0
X1 (Pin 1),
X2 (Pin 8)
inx*
C
Crystal Input Capacitance
-
5
-
pF
*Parameter is guaranteed by design and characterization. Not 100% tested in production.
4
ICS9120-47
0.154
0.194
0.031
0.024
0.063
0.008
0.015
0.025
0.016
0.238
0.050
0.006
± 0.004
8-Pin SOIC Package
Ordering Information
ICS9120M-47
Example:
ICS XXXX M-PPP
Pattern Number (2 or 3-digit number for parts with ROM code pattern)
Package Type
M =SOIC
Device Type (consists of 3 or 4-digit numbers)
Prefix
ICS, AV=Standard Device
5
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