ICS9120M-09LF [IDT]
Clock Generator, 33.868MHz, CMOS, PDSO8, 0.150 INCH, MS-012, SOIC-8;
| 型号： | ICS9120M-09LF |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Clock Generator, 33.868MHz, CMOS, PDSO8, 0.150 INCH, MS-012, SOIC-8 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总7页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICS9120-08
ICS9120-09
Integrated
Circuit
Systems, Inc.
Frequency Generator for Multimedia Audio Synthesis
General Description
Features
The ICS9120-08 and ICS 9120-09 are high performance
frequency generators designed to support stereo audio
codec systems. It offers both clock frequencies required
by stereo codecs such as the CS4231 and the AD1848
plustheclockneededfortheOPL4FMsynthesizer.These
frequencies can be synthesized from the existing 14.318
MHz system clock or from the on-chip oscillator using a
14.318 MHz crystal (-08 only).
•
Generates 16.934 MHz and 24.576 MHz stereo
codec clocks plus the 33.868 MHz OPL4 clock
Single 14.318MHz crystal or system clock
reference
•
•
•
Buffered REFCLK output
0.125% frequency accuracy meets OPL4
specifications
•
100 ps one sigma jitter maintains 16 bit
performance
Highaccuracy, lowjitterPLLsmeetthe0.125%frequency
tolerance and -96dB signal-to-noise ratios required by 16
bit audio systems.Fast output clock edge rates minimize
board induced jitter.
•
•
•
•
Output rise/fall times less than 2.0 nS
On chip loop filter components
3.3V - 5 V supply range
8 pin, 150mil SOIC package
Unlike competitive devices, the ICS9120-08 and
ICS9120-09 operate over the entire 3.0-5.5V range, with
the -09 providing power-down to minimize energy
consumption.
Applications
•
Specifically designed to support the high
performance requirements of multimedia audio
systems.
Block Diagram
X1
14.318
XTAL
OSC
REF (14.3MHz)
MHz
X2(-08)
PD(-09)
External
Crystal
Load Caps
CLK1 (24.6MHz)
CLK2 (33.9MHz)
PLL
CLOCK
GEN
CLK3 (16.9MHz)
÷2
0065D—11/18/02
ICS9120-08
ICS9120-09
Pin Configuration
8-Pin SOIC
8-Pin SOIC
Functionality
X1, X2
(MHz)
(-09 only)
PD#
33.9
(MHz)
16.9
(MHz)
24.6
(MHz)
14.3
(MHz)
-
0
1
Low
33.868
Low
16.934
Low
24.576
Low
14.318
14.318
-
Note: (Pin8)isinternallypulled-uptoVDD and, therefore, may
be left disconnected or driven by open collector logic.
Pin Descriptions for ICS9120-08
PIN NUMBER
PIN NAME
X1
VDD
GND
CLK3
CLK1
CLK2
REF
TYPE
Input
Power
Power
DESCRIPTION
1
2
3
4
5
6
7
8
Crystal or external clock source. Has feedback bias for crystal.
Power supply input.
Ground return for Pin 2.
Output 16.934 MHz target output clock for stereo codec.
Output
Output
Output 14.318 MHz reference clock buffered output.
Output Crystal output drive.
24.576 MHz target output clock for stereo codec.
33.868 MHz target output clock for OPL4.
X2
Pin Descriptions for ICS9120-09
PIN NUMBER
PIN NAME
X1
VDD
GND
CLK3
CLK1
CLK2
REF
TYPE
Input
Power
Power
DESCRIPTION
1
2
3
4
5
6
7
8
External clock source.
Power supply input.
Ground return for Pin 2.
Output 16.934 MHz target output clock for stereo codec.
Output
Output
Output 14.318 MHz reference clock buffered output.
Input
24.576 MHz target output clock for stereo codec.
33.868 MHz target output clock for OPL4.
PD#
Power-down input powers down entire device when low; has pull-up.
0065D—11/18/02
2
ICS9120-08
ICS9120-09
Absolute Maximum Ratings
AVDD, VDD referenced to GND ............................................................... 7V
Operating temperature under bias ............................................. 0C to +70C
Storage temperature ................................................................-65C to +150
Voltage on I/O pins referenced to GND ..............GND -0.5V to VDD +0.5V
Power dissipation .......................................................................... 0.5Watts
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operationalsectionsofthespecificationsisnotimplied. Exposuretoabsolutemaximumratingconditionsforextended
periods may affect product reliability.
Electrical Characteristics at 3.3 V
VDD = +3.0 to +3.7 V, TA = 0 to 70oC unless otherwise stated
DC Characteristics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High
Voltage
Output Low Current
Output High
V
V
IL
-
-
0.2VDD
V
V
µA
µA
V
IH
0.7VDD
-8.0
-
-3.6
-
-
-
I
I
IL
V
IN = 0 V (For -09 only)
IH
VIN (For -09 only)
-
-
5.0
0.1
V
OL
OH
OL
*
I
OL = 6 mA
0.05VDD
V
*
I
OH = -4.0 mA
0.85VDD
0.94VDD
24.0
-
-
V
I
*
V
OL = 0.2VDD
OH = 0.7VDD
15.0
-
mA
mA
IOH
*
V
-13.0
-8.0
Current
Supply Current
Supply Current
Pull-up Resistor
Value
I
I
CC
CC(PD)
Unloaded
Unloaded (For -09 only)
-
-
13.0
50.0
32.0
110.0
mA
µA
R
pu*
(For -09 only)
-
620.0
900.0
k ohm
Note 1: Parameter is guaranteed by design and characterization.Not 100% tested in production.
0065D—11/18/02
3
ICS9120-08
ICS9120-09
Electrical Characteristics at 3.3 V
VDD = +3.0to+3.7V,TA =0-70oCunlessotherwisestated
AC Characteristics
TEST CONDITIONS
PARAMETER
Rise Time
SYMBOL
Tr*
MIN
-
TYP
1.5
MAX
4.0
UNITS
ns
15pF load, 0.8 to 2.0V
Fall Time
Rise Time
Fall Time
Tf*
Tr*
Tf*
15pF load, 2.0 to 0.8V
15pF load, 20% to 80%
15pF load, 80% to 20%
15pF load @ 50% of
VDD; Except REFCLK
15pF load @ 50% of
-
-
-
1.0
2.2
1.5
3.0
4.0
3.0
ns
ns
ns
Duty Cycle
Dt*
Dt*
45.0
40.0
-
50.0
45.0
55.0
60.0
200
%
%
Duty Cycle
V
DD; REFCLK only
For all frequencies
except REFCLK
For all frequencies
except REFCLK
Jitter, One Sigma
Tjis*
Tjab
150.0
380.0
ps
ps
Jitter, Absolute
-650.0
650.0
Jitter, One Sigma
Tjis*
Tjab
Fi*
REFCLK only
REFCLK only
-
266.0
750.0
14.3
-
400.0
1000
15.0
ps
ps
MHz
MHz
Jitter, Absolute
Input Frequency
Output Frequency
Output Mean
-1000
11.0
11.0
Fo*
38.0
Frequency
Accuracy vs. Target
Foa*
Tpu*
With 14.318 MHz input
0 to 33.8 MHz
-0.125
-
-0.04
%
Power-up Time
-
-
5.5
5
12.0
-
ms
pF
Crystal Input
Capacitance
X1 (Pin 1), X2 (Pin 8; -
08 only)
Cinx
*
Note 1: Parameter is guaranteed by design and characterization.Not 100% tested in production.
0065D—11/18/02
4
ICS9120-08
ICS9120-09
Electrical Characteristics at 5.0 V
V
DD = +4.5 to +5.5 V, TA = 0-70oC unless otherwise stated
DC Characteristics
TEST CONDITIONS
PARAMETER
SYMBOL
MIN
-
TYP
-
MAX
0.8
UNITS
V
Input Low Voltage
V
IL
IH
IL
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
V
2.0
-
-
V
µA
µA
V
I
V
V
= 0V (For -09 only)
-18.0
-8.3
-
-
IN
IN
I
= V (For -09 only)
-
-
5.0
0.4
IH
DD
V
*
I
I
= 10 mA
= -30 mA
0.15
OL
OL
Output High
Voltage
V
*
2.4
3.7
-
V
OH
OH
Output Low Current
I
*
V
=0.8V
25.0
45.0
-53.0
22.0
180.0
-
mA
mA
mA
µA
OL
OL
Output High
Current
I
*
V
OH
= 2.4V
-
-
-
-35.0
50.0
500.0
OH
Supply Current
I
Unloaded
CC
Supply Current,
Power-down
Pull-up Resistor
Value
I
Unloaded (For -09 only)
CC(PD)
R *
(For -09 only)
-
400.0
800.0
k ohm
pu
Note 1: Parameter is guaranteed by design and characterization.Not 100% tested in production.
0065D—11/18/02
5
ICS9120-08
ICS9120-09
Electrical Characteristics at 5.0 V
VDD = 4.5 - 5.5 V, TA = 0 - 70oC unless otherwise stated
AC Characteristics
PARAMETER
Rise Time
Fall Time
Rise Time
Fall Time
SYMBOL
T *
TEST CONDITIONS
MIN
TYP
MAX
UNITS
15pF load, 0.8 to 2.0V
15pF load, 2.0 to 0.8V
15pF load, 20% to 80%
-
-
-
0.9
0.7
1.8
2.0
1.5
ns
ns
ns
r
T *
f
T *
r
3.25
T *
f
15pF load, 80% to 20%
-
1.4
2.5
ns
15pF load @ 50% of V
Except REFCLK
15pF load @ 50% of V
REFCLK only
For all frequencies except
REFCLK
;
;
DD
Duty Cycle
D *
45.0
50.0
55.0
%
t
DD
Duty Cycle
D *
t
40.0
-
50.0
60.0
%
Jitter, One Sigma
T
*
100.0
150.0
ps
j1s
For all frequencies except
REFCLK
Jitter, Absolute
Jitter, One Sigma
Jitter, Absolute
T
-600.0
-
380.0
266.0
750.0
600.0
450.0
1200
ps
ps
ps
jab
T
*
REFCLK only
j1s
T
REFCLK only
-1200
jab
Input Frequency
Range
Output Frequency
Range
F *
11.0
11.0
14.0
-
17.0
42.0
MHz
MHz
i
F *
o
Output Mean
Frequency
Accuracy vs. Target
Foa*
With 14.318 MHz input
0 to 33.8 MHz
-0.125
-
-0.04
%
Power-up Time
T *
pu
-
-
5.5
5
12.0
-
ms
pF
Crystal Input
Capacitance
X1 (Pin 1), X2 (Pin 8; -08
only)
C
*
inx
Note 1: Parameter is guaranteed by design and characterization.Not 100% tested in production.
0065D—11/18/02
6
ICS9120-08
ICS9120-09
150 mil (Narrow Body) SOIC
In Millimeters
COMMON DIMENSIONS COMMON DIMENSIONS
C
N
In Inches
SYMBOL
MIN
1.35
0.10
0.33
0.19
MAX
1.75
0.25
0.51
0.25
MIN
MAX
.0688
.0098
.020
L
A
A1
B
C
D
E
e
.0532
.0040
.013
.0075
SEE VARIATIONS
INDEX
AREA
H
E
.0098
SEE VARIATIONS
3.80
4.00
.1497
0.050 BASIC
.1574
1.27 BASIC
H
h
L
N
α
5.80
0.25
0.40
6.20
0.50
1.27
.2284
.010
.016
SEE VARIATIONS
0°
.2440
.020
.050
h xx 4455°°
1
2
D
α
A
SEE VARIATIONS
0°
8°
8°
A1
VARIATIONS
D mm.
D (inch)
N
SEATING
PLANE
MIN
4.80
MAX
5.00
MIN
MAX
.1968
e
B
8
.1890
Reference Doc.: JEDEC Publication 95, MS-012
10-0030
.10 ((..000044))
Ordering Information
ICS9120-08CS08
Note:When ordering the -08, use ICS9120-08CS08.The example shown below for theICS9120M-09 does
not apply to the -08 part.
ICS9120M-09
Example:
ICS XXXX M - PPP
Pattern Number (2- or 3-digit number for parts with ROM code pattern)
PackageType
M = SOIC
DeviceType (consists of 3- or 4-digit numbers)
Prefix
ICS = Standard Device
0065D—11/18/02
7
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