ICS843251BGI-12LF [ICSI]
FEMTOCLOCKS? CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR; FEMTOCLOCKS ™ CRYSTAL - TO- 3.3V , 2.5V LVPECL时钟发生器型号: | ICS843251BGI-12LF |
厂家: | INTEGRATED CIRCUIT SOLUTION INC |
描述: | FEMTOCLOCKS? CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR |
文件: | 总12页 (文件大小:171K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
GENERAL DESCRIPTION
FEATURES
The ICS843251I-12 is a 10Gb Ethernet Clock • One Differential LVPECL output
ICS
HiPerClockS™
Generator and a member of the HiPerClocksTM
family of high performance devices from ICS.The
ICS843251I-12 uses an 18pF parallel resonant
crystal over the range of 23.2MHz - 30MHz. For
• Crystal oscillator interface, 18pF parallel resonant crystal
(23.2MHz - 30MHz)
• Output frequency range: 290MHz - 750MHz
• VCO range: 580MHz - 750MHz
Ethernet applications, a 25MHz crystal is used. The device
has excellent <1ps phase jitter performance, over the
1.875MHz - 20MHz integration range. The ICS843251I-12
is packaged in a small 8-pin TSSOP, making it ideal for
use in systems with limited board space.
• RMS phase jitter @ 312.5MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.36ps (typical)
• 3.3V or 2.5V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
COMMON CONFIGURATION TABLE
Inputs
Output Frequency
Crystal Frequency
(MHz)
Multiplication Value
M/N
(MHz)
FREQ_SEL
M
N
25
25
0
1
25
25
1
2
25
625
12.5
312.5
BLOCK DIAGRAM
PIN ASSIGNMENT
Pullup
FREQ_SEL
VCCA
VEE
VCC
1
2
3
4
8
7
6
5
Q
XTAL_OUT
XTAL_IN
nQ
FREQ_SEL
N
÷1
÷2
XTAL_IN
OSC
XTAL_OUT
VCO
Q
nQ
Phase
Detector
FREQ_SEL
0
1
580MHz - 750MHz
ICS843251I-12
8-LeadTSSOP
4.4mm x 3.0mm x 0.925mm
package body
M = ÷25 (fixed)
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843251BGI-12
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REV.A JANUARY 10, 2006
1
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number
Name
VCCA
VEE
Type
Description
1
2
Power
Power
Analog supply pin.
Negative supply pin.
XTAL_OUT,
XTAL_IN
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
3, 4
Input
5
6, 7
8
FREQ_SEL
nQ, Q
Input
Output
Power
Pullup
Frequency select pin. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
Core supply pin.
VCC
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
Minimum
Typical Maximum Units
CIN
Input Capacitance
Input Pullup Resistor
4
pF
RPULLUP
51
kΩ
843251BGI-12
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REV.A JANUARY 10, 2006
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PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
-0.5V to VCC + 0.5V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
CC
Inputs, V
I
Outputs, IO
Continuous Current
Surge Current
50mA
100mA
PackageThermal Impedance, θ
101.7°C/W (0 mps)
-65°C to 150°C
JA
StorageTemperature, T
STG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
3.135
Typical
3.3
Maximum Units
VCC
VCCA
IEE
Core Supply Voltage
3.465
3.465
V
V
Analog Supply Voltage
Power Supply Current
3.135
3.3
TBD
mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
2.375
Typical
2.5
Maximum Units
VCC
VCCA
IEE
Core Supply Voltage
2.625
2.625
V
V
Analog Supply Voltage
Power Supply Current
2.375
2.5
TBD
mA
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = VCCA = 3.3V 5ꢀ OR 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
CC = 3.3V
VCC = 2.5V
CC = 3.3V
V
2
VCC + 0.3
VCC + 0.3
0.8
V
V
VIH
VIL
Input High Voltage
1.7
-0.3
-0.3
V
V
Input Low Voltage
VCC = 2.5V
0.7
V
IIH
IIL
Input High Current
Input Low Current
VCC = VIN = 3.465V or 2.625V
VCC = 3.465V or 2.625V, VIN = 0V
5
µA
µA
-150
843251BGI-12
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REV.A JANUARY 10, 2006
3
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
TABLE 3D. LVPECL DC CHARACTERISTICS, VCC = VCCA = 3.3V 5ꢀ OR 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol
VOH
Parameter
Test Conditions
Minimum
VCC - 1.4
VCC - 2.0
0.6
Typical
Maximum Units
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
VCC - 0.9
VCC - 1.7
1.0
V
V
V
VOL
VSWING
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
23.2
Typical Maximum Units
Fundamental
Mode of Oscillation
Frequency
30
TBD
7
MHz
Ω
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
pF
TBD
mW
TABLE 5A. AC CHARACTERISTICS, VCC =VCCA = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
F_SEL = 1
Minimum Typical Maximum Units
312.5
625
MHz
MHz
fOUT
Output Frequency
F_SEL = 0
RMS Phase Jitter ( Random);
NOTE 1
312.5MHz @ Integration Range:
1.875MHz - 20MHz
tjit(Ø)
0.36
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20ꢀ to 80ꢀ
325
50
ps
ꢀ
NOTE 1: Please refer to the Phase Noise Plots following this section.
TABLE 5B. AC CHARACTERISTICS, VCC =VCCA = 2.5V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
F_SEL = 1
Minimum Typical Maximum Units
312.5
625
MHz
MHz
fOUT
Output Frequency
F_SEL = 0
RMS Phase Jitter ( Random);
NOTE 1
312.5MHz @ Integration Range:
1.875MHz - 20MHz
tjit(Ø)
0.38
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20ꢀ to 80ꢀ
325
50
ps
ꢀ
NOTE 1: Please refer to the Phase Noise Plots following this section.
843251BGI-12
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REV.A JANUARY 10, 2006
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PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
TYPICAL PHASE NOISE AT 312.5MHZ (3.3V)
0
-10
-20
-30
-40
10GigE Filter
312.5MHz
RMS Phase Jitter (Random)
-50
-60
-70
-80
-90
1.875Mhz to 20MHz = 0.36ps (typical)
Raw Phase Noise Data
-100
-110
-120
-130
-140
-150
-160
Phase Noise Result by adding
10GigE Filter to raw data
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY
843251BGI-12
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PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
2V
2V
SCOPE
SCOPE
VCC,
VCCA
VCC,
VCCA
Qx
Qx
LVPECL
VEE
LVPECL
VEE
nQx
nQx
-1.3V 0.165V
-0.5V 0.125V
LVPECL 3.3V OUTPUT LOAD AC TEST CIRCUIT
LVPECL 2.5V OUTPUT LOAD AC TEST CIRCUIT
Phase Noise Plot
nQ
Q
Phase Noise Mask
tPW
tPERIOD
tPW
tPERIOD
Offset Frequency
f1
f2
odc =
x 100ꢀ
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
80ꢀ
tF
80ꢀ
tR
VSWING
20ꢀ
Clock
Outputs
20ꢀ
OUTPUT RISE/FALL TIME
843251BGI-12
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REV.A JANUARY 10, 2006
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PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843251I-12 pro-
vides separate power supplies to isolate any high switch-
ing noise from the outputs to the internal PLL. VCC and VCCA
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin. The 10Ω
resistor can also be replaced by a ferrite bead.
3.3V or 2.5V
VCC
.01μF
.01μF
10Ω
VCC
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843251I-12 has been characterized with 18pF par- 25MHz, 18pF parallel resonant crystal and were chosen to
allel resonant crystals. The capacitor values (TBD), C1 and minimize the ppm error. The optimum C1 and C2 values
C2, shown in Figure 2 below were determined using a can be slightly adjusted for different board layouts.
XTAL_IN
C1
X1
Crystal
XTAL_OUT
C2
Figure 2. CRYSTAL INPUt INTERFACE
843251BGI-12
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REV.A JANUARY 10, 2006
7
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical termi-
nation for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
designed to drive 50Ω transmission lines. Matched imped-
ance techniques should be used to maximize operating
frequency and minimize signal distortion. Figures 3A and
3B show two different layouts which are recommended
only as guidelines. Other suitable clock layouts may exist
and it would be recommended that the board designers
simulate to guarantee compatibility across all printed cir-
cuit and clock component process variations.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
3.3V
Zo = 50Ω
125Ω
125Ω
FOUT
FIN
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
FOUT
FIN
50Ω
50Ω
VCC - 2V
1
RTT =
Zo
RTT
((VOH + VOL) / (VCC – 2)) – 2
84Ω
84Ω
FIGURE 3A. LVPECL OUTPUT TERMINATION
FIGURE 3B. LVPECL OUTPUT TERMINATION
843251BGI-12
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REV.A JANUARY 10, 2006
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PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 4A and Figure 4B show examples of termination for 2.5V ground level. The R3 in Figure 4B can be eliminated and the
LVPECL driver.These terminations are equivalent to terminat- termination is shown in Figure 4C.
ing 50Ω to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very close to
2.5V
VCC=2.5V
2.5V
2.5V
VCC=2.5V
Zo = 50 Ohm
Zo = 50 Ohm
R1
250
R3
250
+
-
Zo = 50 Ohm
Zo = 50 Ohm
+
-
2,5V LVPECL
Driv er
R1
50
R2
50
2,5V LVPECL
Driv er
R2
62.5
R4
62.5
R3
18
FIGURE 4A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 4B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V
VCC=2.5V
Zo = 50 Ohm
+
Zo = 50 Ohm
-
2,5V LVPECL
Driv er
R1
50
R2
50
FIGURE 4C. 2.5V LVPECL TERMINATION EXAMPLE
843251BGI-12
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REV.A JANUARY 10, 2006
9
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA byVelocity (Meters per Second)
0
1
2.5
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
TRANSISTOR COUNT
The transistor count for ICS843251I-12 is: 2377
843251BGI-12
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REV.A JANUARY 10, 2006
10
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
Millimeters
Minimum Maximum
SYMBOL
N
A
8
--
1.20
0.15
1.05
0.30
0.20
3.10
A1
A2
b
0.05
0.80
0.19
0.09
2.90
c
D
E
6.40 BASIC
0.65 BASIC
E1
e
4.30
4.50
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
843251BGI-12
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REV.A JANUARY 10, 2006
11
PRELIMINARY
ICS843251I-12
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-3.3V, 2.5V
LVPECL CLOCK GENERATOR
TABLE 8. ORDERING INFORMATION
Part/Order Number
ICS843251BGI-12
ICS843251BGI-12T
ICS843251BGI-12LF
ICS843251BGI-12FT
Marking
TBD
Package
Shipping Packaging
tube
Temperature
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
8 Lead TSSOP
TBD
8 Lead TSSOP
2500 tape & reel
tube
BI12L
BI12L
8 Lead "Lead-Free" TSSOP
8 Lead "Lead-Free" TSSOP
2500 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
843251BGI-12
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REV.A JANUARY 10, 2006
12
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