ICS843204AGIT [ICSI]
FEMTOCLOCKS? CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER; FEMTOCLOCKS ™ CRYSTAL - TO- 3.3V LVPECL频率合成器
| 型号： | ICS843204AGIT |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | FEMTOCLOCKS? CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER |
| 文件： | 总12页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS843204I is a 4 output LVPECL
• Four 3.3V LVPECL outputs
ICS
HiPerClockS™
Synthesizer optimized to generate Gigabit
Ethernet and SONET reference clock fre-
quencies and is a member of the HiPerClocksTM
family of high performance clock solutions from
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• Supports the following output frequencies: 155.52MHz
and 156.25MHz
ICS. Using a 19.44MHz and 25MHz, 18pF parallel resonant
crystal, 155.52MHz and 156.25MHz frequencies can be
generated. The ICS843204I uses ICS’ FemtoClockTM low
phase noise VCO technology and can achieve 1ps or lower
typical RMS phase jitter. The ICS843204I is packaged in a
48-pin TSSOP package.
• VCO range: 560MHz - 680MHz
• RMS phase jitter @ 155.52MHz, using a 19.44MHz crystal
(12kHz - 13MHz): 0.86ps (typical)
• RMS phase jitter @ 156.25MHz, using a 19.44MHz crystal
(1.875MHz - 20MHz): 0.52ps (typical)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS
compliant packages
BLOCK DIAGRAM
PIN ASSIGNMENT
PLL_BYPASS_A
nQA1
QA1
nQA0
QA0
nc
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
IN_SEL_A
CLK0
XTAL_IN0
XTAL_OUT0
nc
IN_SELA
CLK0
SELA0
OEA0
OEA1
25MHz
XTAL_IN0
VCCO_A
SELA1
SELA0
PLL_BYPASS_A
nc
VEE
QA0
OEA0
OEA1
VCC
VCCA
nc
nc
SELB0
VEE
OEB0
OEB1
VCC
SELB1
VCCA
nc
÷4
PLL
0
1
OSC
nQA0
XTAL_OUT0
9
156.25MHz
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SELA1
625MHz
nc
nc
nc
QA1
0
1
XTAL_IN1
XTAL_OUT1
CLK1
nQA1
PLL_BYPASS_B
IN_SELB
IN_SEL_B
PLL_BYPASS_B
VCCO_B
nc
SELB0
CLK1
OEB0
OEB1
QB0
nQB0
QB1
nQB1
nc
nc
nc
nc
QB0
19.44MHz
XTAL_IN1
0
1
nQB0
OSC
÷4
PLL
XTAL_OUT1
SELB1
ICS843204I
48 LeadTSSOP
6.1mm x 12.5mm x 0.93mm
package body
155.52MHz
622.08MHz
QB1
0
1
nQB1
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843204AGI
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REV.A JANUARY 6, 2006
1
PRELIMINARY
ICS843204I
Integrated
Circuit
FEMTOCLOCKS™ CRYSTAL-TO-
Systems, Inc.
3.3V LVPECL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
1, 2
Name
Type
Description
nQA1, QA1
nQA0, QA0
Output
Output
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
3, 4
5, 10, 11, 12,
13, 20, 25, 26,
27, 28, 29, 37,
38, 44
nc
Unused
No connect.
6
VCCO_A
Power
Input
Output supply pin for Bank A outputs.
Select pin. When HIGH, selects QA1/nQA1 at 155.52MHz.
Pulldown When LOW, selects QA1/nQA1 at 156.25MHz.
LVCMOS/LVTTL interface levels.
7
SELA1
Select pin. When HIGH, selects QA0/nQA0 at 155.52MHz.
Pulldown When LOW, selects QA1/nQA1 at 156.25MHz.
LVCMOS/LVTTL interface levels.
8
SELA0
Input
9
PLL_BYPASS_A
Input
Input
Pullup
When LOW, PLL is bypassed. When HIGH, PLL output is active.
XTAL_IN1,
XTAL_OUT1
Parallel resonant crystal interface. XTAL_OUT1 is the output,
XTAL_IN1 is the input.
14, 15
16, 47
21, 22
CLK1, CLK0
QB0, nQB0
Input
Pulldown LVCMOS/LVTTL clock inputs.
Differential output pair. LVPECL interface levels.
Ouput
Select pin. When HIGH, selects XTAL1 inputs. When LOW,
selects CLK1 input. LVCMOS/LVTTL interface levels.
17
IN_SEL_B
Input
Pullup
Pullup
18
19
PLL_BYPASS_B
VCCO_B
Input
Power
Ouput
When LOW, PLL is bypassed. When HIGH, PLL output is active.
Output supply pin for Bank B outputs.
23, 24
QB1, nQB1
Differential output pair. LVPECL interface levels.
Select pin. When HIGH, selects QB1/nQB1 at 155.52MHz.
When LOW, selects QB1/nQB1 at 156.25MHz.
LVCMOS/LVTTL interface levels.
31
SELB1
Input
Pullup
30, 39
32, 40
VCCA
VCC
Power
Power
Analog supply pins.
Core supply pins.
Output enable pin. QB1/nQB1 outputs are enable.
LVCMOS/LVTTL interface levels.
Output enable pin. QB0/nQB0 outputs are enabled.
LVCMOS/LVTTL interface levels.
33
OEB1
Input
Pullup
Pullup
34
OEB0
VEE
Input
35, 43
Power
Negative supply pins.
Select pin. When HIGH, selects QB0/nQB0 at 155.52MHz.
When LOW, selects QB0/nQB0 at 156.25MHz.
LVCMOS/LVTTL interface levels.
36
SELB0
Input
Pullup
Output enable pin. QA1/nQA1 outpus are enabled.
LVCMOS/LVTTL interface levels.
Output enable pin. QA0/nQA0 outputs are enabled.
LVCMOS/LVTTL interface levels.
Parallel resonant crystal interface. XTAL_OUT0 is the output,
XTAL_IN0 is the input.
Select pin. When HIGH, selects XTAL0 inputs. When LOW,
selects CLK0 input. LVCMOS/LVTTL interface levels.
41
42
OEA1
OEA0
Input
Input
Input
Input
Pullup
Pullup
XTAL_OUT0,
XTAL_IN0
45, 46
48
IN_SEL_A
Pullup
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
CIN
Input Capacitance
4
pF
RPULLDOWN Input Pulldown Resistor
51
51
kΩ
kΩ
RPULLUP
Input Pullup Resistor
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
CC
Inputs, V
-0.5V to VCC + 0.5V
I
Outputs, IO
Continuous Current
Surge Current
50mA
100mA
Package Thermal Impedance, θJA 58.3°C/W (0 lfpm)
Storage Temperature, T -65°C to 150°C
STG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = VCCO_A =VCCO_B = 3.3V 10ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VCC
Core Supply Voltage
2.97
2.97
3.3
3.3
3.63
3.63
V
V
VCCA
Analog Supply Voltage
VCCO_A,
VCCO_B
Output Supply Voltage
2.97
3.3
3.63
V
IEE
Power Supply Current
Core Supply Current
Analog Supply Current
125
92
mA
mA
mA
ICC
ICCA
ICCO_A,
ICCO_B
14
Output Supply Current
16
mA
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = VCCA = VCCO_A = VCCO_B = 3.3V 10ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
Input High Voltage
2
VCC + 0.3
V
Input
Low Voltage
VIL
-0.3
0.8
V
CLK0, CLK1,
SELA0, SELA1
VCC = VIN = 3.63V
VCC = VIN = 3.63V
CC = 3.63V, VIN = 0V
150
5
µA
µA
µA
µA
PLL_BYPASS_A,
PLL_BYPASS_B,
IN_SEL_A, IN_SEL_B,
SELB1, SELB0, OEB0,
OEB1, OEA0, OEA1
Input
High Current
IIH
CLK0, CLK1,
SELA0, SELA1
V
-5
PLL_BYPASS_A,
PLL_BYPASS_B,
IN_SEL_A, IN_SEL_B,
SELB1, SELB0, OEB0,
OEB1, OEA0, OEA1
Input
Low Current
IIL
VCC = 3.63V, VIN = 0V
-150
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
TABLE 3C. LVPECL DC CHARACTERISTICS, VCC = VCCA = VCCO_A = VCCO_B = 3.3V 10ꢀ, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VOH
Output High Voltage; NOTE 1
VCCO - 1.4
VCCO - 2.0
0.6
VCCO - 0.9
VCCO - 1.7
1.0
V
V
V
VOL
Output Low Voltage; NOTE 1
VSWING
Peak-to-Peak Output Voltage Swing
NOTE 1: Outputs terminated with 50Ω to VCCO - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Typical Maximum Units
Mode of Oscillation
Frequency
Fundamental
19.44
25
50
7
MHz
Ω
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
pF
1
mW
NOTE: Characterized using an 18pF parallel resonant crystal.
TABLE 5. AC CHARACTERISTICS, VCC = VCCA = VCCO_A = VCCO_B = 3.3V 10ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
SELB0 = 1; OEB0 = 1
SELA0 = 0; OEA0 = 1
Minimum Typical Maximum Units
155.52
156.25
TBD
0.86
0.52
475
MHz
MHz
ps
fOUT
Output Frequency
tsk(o)
tjit(Ø)
Output Skew; NOTE 1, 2
155.52MHz, (12kHz - 1.3MHz)
156.25MHz, (1.875MHz - 20MHz)
20ꢀ to 80ꢀ
ps
RMS Phase Jitter (Random);
NOTE 3
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
ps
50
ꢀ
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VCCO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: See Phase Noise plot.
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REV.A JANUARY 6, 2006
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
2V
nQx
Qx
SCOPE
Qx
VCC
VCCA,VCCO_X
,
nQy
Qy
LVPECL
nQx
VEE
tsk(o)
-1.3V 0.33V
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT SKEW
Phase Noise Plot
Phase Noise Mask
80ꢀ
tF
80ꢀ
VSWING
20ꢀ
Clock
20ꢀ
Outputs
Offset Frequency
f1
f2
tR
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT RISE/FALL TIME
nQA0, nQA1
nQB0, nQB1
QA0, QA1
QB0, QB1
tPW
tPERIOD
tPW
odc =
x 100ꢀ
tPERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843204I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VCC, VCCA, and
VCCO_x should be individually connected to the power sup-
ply plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
3.3V
VCC
.01μF
.01μF
10Ω
VCCA
10μF
capacitor should be connected to each VCCA
.
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843204I has been characterized with 18pF Figure 2 below were determined using an 18pF parallel
parallel resonant crystals. The capacitor values shown in resonant crystal and were chosen to minimize the ppm error.
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
27p
ICS843204I
Figure 2. CRYSTAL INPUt INTERFACE
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
INPUTS:
CRYSTAL INPUT:
OUTPUTS:
LVPECL OUTPUT
For applications not requiring the use of the crystal oscillator All unused LVPECL outputs can be left floating. We
input, both XTAL_IN and XTAL_OUT can be left floating. recommend that there is no trace attached. Both sides of the
Though not required, but for additional protection, a 1kΩ differential output pair should either be left floating or
resistor can be tied from XTAL_IN to ground.
terminated.
CLK INPUT:
For applications not requiring the use of a clock input, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the CLK input to
ground.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
TERMINATION FOR 3.3V LVPECL OUTPUT
The clock layout topology shown below is a typical ter-
mination for LVPECL outputs. The two different layouts
mentioned are recommended only as guidelines.
outputs are designed to drive 50Ω transmission lines.
Matched impedance techniques should be used to maxi-
mize operating frequency and minimize signal distor-
tion. Figures 3A and 3B show two different layouts which
are recommended only as guidelines. Other suitable
clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compat-
ibility across all printed circuit and clock component pro-
cess variations.
FOUT and nFOUT are low impedance follower outputs
that generate ECL/LVPECL compatible outputs. There-
fore, terminating resistors (DC current path to ground)
or current sources must be used for functionality. These
3.3V
Z
o = 50Ω
125Ω
125Ω
FOUT
FIN
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
FOUT
FIN
50Ω
50Ω
VCC - 2V
1
RTT =
Zo
RTT
((VOH + VOL) / (VCC – 2)) – 2
84Ω
84Ω
FIGURE 3A. LVPECL OUTPUTT ERMINATION
FIGURE 3B. LVPECL OUTPUTTERMINATION
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843002.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843002 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 10ꢀ = 3.63V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
•
Power (core)MAX = VCC_MAX * IEE_MAX = 3.63V * 125mA = 453.75mW
Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 4 * 30mW = 120mW
Total Power_MAX (3.63V, with all outputs switching) = 453.75mW + 120mW = 573.75mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = JunctionTemperature
θJA = Junction-to-AmbientThermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = AmbientTemperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 52.3°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.574W * 52.3°C/W = 115°C. This is below the limit of 125°C.
This calculation is only an example.Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 7. THERMAL RESISTANCE θJA FOR 48-PINTSSOP, FORCED CONVECTION
θJA by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
82.6°C/W
58.3°C/W
70.3°C/W
52.3°C/W
63.7°C/W
49.9°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 4.
VCCO
Q1
VOUT
R L
50
VCCO - 2V
FIGURE 4. LVPECL DRIVER CIRCUIT ANDTERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage ofV - 2V.
CCO
•
•
For logic high, VOUT = V
= V
– 0.9V
OH_MAX
CCO_MAX
)
= 0.9V
OH_MAX
(V
- V
CCO_MAX
For logic low, VOUT = V
= V
– 1.7V
OL_MAX
CCO_MAX
)
= 1.7V
OL_MAX
(V
- V
CCO_MAX
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
))
Pd_H = [(V
– (V
- 2V))/R ] * (V
- V
) = [(2V - (V
- V
/R ] * (V
- V
) =
OH_MAX
CCO_MAX
CCO_MAX
OH_MAX
CCO_MAX
OH_MAX
CCO_MAX
OH_MAX
L
L
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mW
))
Pd_L = [(V
– (V
- 2V))/R ] * (V
- V
) = [(2V - (V
- V
/R ] * (V
- V
) =
OL_MAX
CCO_MAX
CCO_MAX
OL_MAX
CCO_MAX
OL_MAX
CCO_MAX
OL_MAX
L
L
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
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PRELIMINARY
ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
RELIABILITY INFORMATION
TABLE 8. θJAVS. AIR FLOWT ABLE FOR 48 LEADTSSOP
θJA byVelocity (Linear Feet per Minute)
0
200
70.3°C/W
52.3°C/W
500
63.7°C/W
49.9°C/W
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
82.6°C/W
58.3°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS843204I is: 4090
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ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
PACKAGE OUTLINE - G SUFFIX FOR 48 LEADTSSOP
TABLE 9. PACKAGE DIMENSIONS
Millimeters
SYMBOL
Minimum
Maximum
N
A
48
--
1.20
0.15
1.05
0.27
0.20
12.60
A1
A2
b
0.05
0.80
0.17
0.09
12.40
c
D
E
8.10 BASIC
0.50 BASIC
E1
e
6.00
6.20
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
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ICS843204I
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
TABLE 10. ORDERING INFORMATION
Part/Order Number
ICS843204AGI
Marking
Package
Shipping Packaging
tube
Temperature
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
ICS843204AGI
ICS843204AGI
TBD
48 Lead TSSOP
ICS843204AGIT
ICS843204AGILF
ICS843204AGILFT
48 Lead TSSOP
1000 tape & reel
tube
48 Lead "Lead-Free" TSSOP
48 Lead "Lead-Free" TSSOP
TBD
1000 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FEMTOCLOCKS are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without
additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical
medical instruments.
843204AGI
www.icst.com/products/hiperclocks.html
REV.A JANUARY 6, 2006
12
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