ICS843071AGILFT [ICSI]

FEMTOCLOCKS? CRYSTAL-TO- LVPECL CLOCK GENERATOR; FEMTOCLOCKS⑩ CRYSTAL - TO- LVPECL时钟发生器
ICS843071AGILFT
型号: ICS843071AGILFT
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

FEMTOCLOCKS? CRYSTAL-TO- LVPECL CLOCK GENERATOR
FEMTOCLOCKS⑩ CRYSTAL - TO- LVPECL时钟发生器

晶体 时钟发生器 外围集成电路 光电二极管
文件: 总15页 (文件大小:301K)
中文:  中文翻译
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
One Differential LVPECL output  
The ICS843071I is a Serial ATA (SATA)/Serial  
ICS  
HiPerClockS™  
Attached SCSI (SAS) Clock Generator and a  
member of the HiPerClocksTM family of high  
performance devices from ICS.The ICS843071I  
uses an 18pF parallel resonant crystal over  
Crystal oscillator interface, 18pF parallel resonant crystal  
(20.833MHz - 28.3MHz)  
Output frequency range: 62.5MHz - 170MHz  
VCO range: 500MHz - 680MHz  
the range of 20.833MHz - 28.3MHz. For SATA/SAS  
applications, a 25MHz crystal is used and either 75MHz or  
150MHz may be selected with the FREQ_SEL pin. For 10Gb  
Fibre Channel applications, a 26.5625MHz crystal is used  
for 159.375MHz output. The ICS843071I has excellent  
<1ps phase jitter performance, over the 12kHz - 20MHz  
integration range. The ICS843071I is packaged in a small  
8-pin TSSOP, making it ideal for use in systems with limited  
board space.  
RMS phase jitter @ 150MHz, using a 25MHz crystal  
(12kHz - 20MHz): 0.64ps (typical) @ 3.3V output  
RMS phase jitter @ 159.375MHz, using a 26.5625MHz  
crystal (1.875MHz - 20MHz): 0.40ps (typical) @ 3.3V  
output  
3.3V or 2.5V operating supply  
-40°C to 85°C ambient operating temperature  
Available in both standard and lead-free RoHS compliant  
packages  
COMMON CONFIGURATION TABLE - SERIAL ATA/SERIAL ATTACHED SCSI  
Inputs  
Output Frequency  
(MHz)  
Multiplication  
Value M/N  
Crystal Frequency (MHz) FREQ_SEL  
M
N
25  
25  
0
1
0
24  
24  
24  
4
8
4
6
3
6
150  
75  
26.5625  
159.375  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
Pullup  
FREQ_SEL  
VCCA  
VCC  
1
2
3
4
8
7
6
5
XTAL_OUT  
XTAL_IN  
VEE  
Q
nQ  
FREQ_SEL  
N
÷4  
÷8  
XTAL_IN  
OSC  
XTAL_OUT  
Q
VCO  
Phase  
Detector  
FREQ_SEL  
0
1
500MHz - 680MHz  
nQ  
ICS843071I  
8-Lead TSSOP  
4.40mm x 3.0mm x 0.925mm  
package body  
M = ÷24 (fixed)  
G Package  
TopView  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TABLE 1. PIN DESCRIPTIONS  
Number  
Name  
Type  
Description  
1
VCCA  
Power  
Input  
Analog supply pin.  
XTAL_OUT,  
XTAL_IN  
Crystal oscillator interface. XTAL_IN is the input,  
XTAL_OUT is the output.  
2, 3  
4
5
VEE  
FREQ_SEL  
nQ, Q  
Power  
Input  
Negative supply pin.  
Pullup  
Frequency select pin. LVCMOS/LVTTL interface levels.  
Differential clock outputs. LVPECL interface levels.  
Core supply pin.  
6, 7  
8
Output  
Power  
VCC  
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.  
TABLE 2. PIN CHARACTERISTICS  
Symbol Parameter  
Test Conditions  
Minimum  
Typical Maximum Units  
CIN  
Input Capacitance  
Input Pullup Resistor  
4
pF  
RPULLUP  
51  
kΩ  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
ABSOLUTE MAXIMUM RATINGS  
SupplyVoltage, V  
4.6V  
NOTE: Stresses beyond those listed under Absolute  
Maximum Ratings may cause permanent damage to the  
device.These ratings are stress specifications only.Functional  
operation of product at these conditions or any conditions be-  
yond those listed in the DC Characteristics or AC Character-  
istics is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect product reliability.  
DD  
Inputs, V  
-0.5V to VCC + 0.5 V  
I
Outputs, IO (LVDS)  
Continuous Current  
Surge Current  
10mA  
15mA  
PackageThermal Impedance, θ  
101.7°C/W (0 mps)  
-65°C to 150°C  
JA  
StorageTemperature, T  
STG  
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC =VCCA = 3.3V 10ꢀ, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum  
3.0  
Typical  
3.3  
Maximum Units  
VCC  
VCCA  
ICC  
Positive Supply Voltage  
3.63  
3.63  
96  
V
Analog Supply Voltage  
Power Supply Current  
Analog Supply Current  
Power Supply Current  
3.0  
3.3  
V
mA  
mA  
mA  
ICCA  
IEE  
12  
72  
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VCC =VCCA = 2.5V 10ꢀ, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum  
2.25  
Typical  
2.5  
Maximum Units  
VCC  
VCCA  
ICC  
Positive Supply Voltage  
2.75  
2.75  
72  
V
Analog Supply Voltage  
Power Supply Current  
Analog Supply Current  
Power Supply Current  
2.25  
2.5  
V
mA  
mA  
mA  
ICCA  
IEE  
12  
72  
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = VCCA = 3.3V 10ꢀ OR 2.5V 10ꢀ, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum Typical Maximum Units  
3.3V  
2
V
CC + 0.3  
V
V
VIH  
VIL  
Input High Voltage  
2.5V  
3.3V  
1.7  
-0.3  
-0.3  
VCC + 0.3  
0.8  
0.7  
5
V
Input Low Voltage  
2.5V  
V
IIH  
IIL  
Input High Current  
Input Low Current  
VCC = VIN = 3.63V or 2.75V  
VCC = 3.63V or 2.75V, VIN = 0V  
µA  
µA  
-150  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TABLE 3D. LVPECL DC CHARACTERISTICS, VCC = VCCA = 3.3V 10ꢀ OR 2.5V 10ꢀ, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum  
VCC - 1.4  
VCC - 2.0  
0.6  
Typical  
Maximum Units  
VOH  
Output High Voltage; NOTE 1  
VCC - 0.9  
VCC - 1.7  
1.0  
V
V
V
VOL  
Output Low Voltage; NOTE 1  
VSWING  
Peak-to-Peak Output Voltage Swing  
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.  
TABLE 4. CRYSTAL CHARACTERISTICS  
Parameter  
Test Conditions  
Minimum  
20.833  
Typical Maximum Units  
Fundamental  
Mode of Oscillation  
Frequency  
28.3  
50  
7
MHz  
Ω
Equivalent Series Resistance (ESR)  
Shunt Capacitance  
Drive Level  
pF  
1
mW  
TABLE 5A. AC CHARACTERISTICS, VCC = VCCA = 3.3V 10ꢀ, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum Typical Maximum Units  
fOUT  
Output Frequency  
62.5  
170  
MHz  
150MHz @ Integration Range:  
12kHz - 20MHz  
75MHz @ Integration Range:  
12kHz - 20MHz  
159.375MHz @ Integration Range:  
1.875MHz - 20MHz  
0.64  
0.64  
0.40  
ps  
RMS Phase Jitter ( Random);  
NOTE 1  
tjit(Ø)  
ps  
ps  
tR / tF  
odc  
Output Rise/Fall Time  
Output Duty Cycle  
20ꢀ to 80ꢀ  
250  
48  
500  
52  
ps  
NOTE 1: Please refer to the Phase Noise Plots following this section.  
TABLE 5B. AC CHARACTERISTICS, VCC =VCCA = 2.5V 10ꢀ, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum Typical Maximum Units  
fOUT  
Output Frequency  
62.5  
170  
MHz  
150MHz @ Integration Range:  
12kHz - 20MHz  
75MHz @ Integration Range:  
12kHz - 20MHz  
159.375MHz @ Integration Range:  
1.875MHz - 20MHz  
0.94  
0.80  
0.42  
ps  
tjit(Ø)  
RMS Phase Jitter ( Random)  
ps  
ps  
tR / tF  
odc  
Output Rise/Fall Time  
Output Duty Cycle  
20ꢀ to 80ꢀ  
250  
48  
500  
52  
ps  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TYPICAL PHASE NOISE AT 75MHZ @ 3.3V  
0
-10  
-20  
Filter  
-30  
-40  
75MHz  
RMS Phase Noise Jitter  
-50  
12kHz to 20MHz = 0.64ps (typical)  
-60  
-70  
-80  
-90  
-100  
-110  
-120  
Raw Phase Noise Data  
-130  
-140  
-150  
-160  
-170  
-180  
-190  
Phase Noise Result by adding  
a Filter to raw data  
-200  
10  
100  
1k  
10k  
100k  
1M  
10M  
100M  
OFFSET FREQUENCY (HZ)  
TYPICAL PHASE NOISE AT 150MHZ @ 3.3V  
0
-10  
-20  
Filter  
-30  
-40  
150MHz  
RMS Phase Noise Jitter  
-50  
12kHz to 20MHz = 0.64ps (typical)  
-60  
-70  
-80  
-90  
-100  
-110  
-120  
Raw Phase Noise Data  
-130  
-140  
-150  
-160  
-170  
-180  
-190  
Phase Noise Result by adding  
a Filter to raw data  
-200  
10  
100  
1k  
10k  
100k  
1M  
10M  
100M  
OFFSET FREQUENCY (HZ)  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TYPICAL PHASE NOISE AT 159.375MHZ @ 3.3V  
0
-10  
-20  
-30  
10Gb Fibre Channel Filter  
-40  
-50  
159.375MHz  
RMS Phase Noise Jitter  
1.875MHz to 20MHz = 0.40ps (typical)  
-60  
-70  
-80  
-90  
-100  
-110  
-120  
-130  
-140  
-150  
-160  
-170  
-180  
-190  
-200  
Raw Phase Noise Data  
Phase Noise Result by adding  
a 10Gb Fibre Channel Filter to  
raw data  
10  
100  
1k  
10k  
100k  
1M  
10M  
100M 500M  
OFFSET FREQUENCY (HZ)  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
PARAMETER MEASUREMENT INFORMATION  
2V  
2V  
SCOPE  
SCOPE  
Qx  
Qx  
VCC,  
VCC,  
VCCA  
VCCA  
LVPECL  
VEE  
LVPECL  
VEE  
nQx  
nQx  
-0.5V 0.250V  
-1.3V 0.330V  
LVPECL 3.3V OUTPUT LOAD AC TEST CIRCUIT  
LVPECL 2.5V OUTPUT LOAD AC TEST CIRCUIT  
nQ  
80ꢀ  
tF  
80ꢀ  
tR  
Q
VSWING  
20ꢀ  
tPW  
Clock  
Outputs  
20ꢀ  
tPERIOD  
tPW  
odc =  
x 100ꢀ  
tPERIOD  
OUTPUT RISE/FALL TIME  
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD  
Phase Noise Plot  
Phase Noise Mask  
Offset Frequency  
f1  
f2  
RMS Jitter = Area Under the Masked Phase Noise Plot  
RMS PHASE JITTER  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
APPLICATION INFORMATION  
POWER SUPPLY FILTERING TECHNIQUES  
As in any high speed analog circuitry, the power supply pins  
are vulnerable to random noise. The ICS843071I provides  
separate power supplies to isolate any high switching  
noise from the outputs to the internal PLL.VCC and VCCA should  
be individually connected to the power supply  
plane through vias, and bypass capacitors should be  
used for each pin. To achieve optimum jitter performance,  
power supply isolation is required. Figure 1 illustrates how  
a 10Ω resistor along with a 10μF and a .01μF bypass  
capacitor should be connected to each VCCA pin.  
3.3V or 2.5V  
VCC  
.01μF  
.01μF  
10Ω  
VCCA  
10μF  
FIGURE 1. POWER SUPPLY FILTERING  
CRYSTAL INPUT INTERFACE  
The ICS843071I has been characterized with 18pF parallel nant crystal and were chosen to minimize the ppm error. The  
resonant crystals. The capacitor values, C1 and C2, shown in optimum C1 and C2 values can be slightly adjusted for differ-  
Figure 2 below were determined using an 18pF parallel reso- ent board layouts.  
XTAL_IN  
C1  
22p  
X1  
18pF Parallel Cry stal  
XTAL_OUT  
C2  
22p  
ICS843071I  
Figure 2.CRYSTAL INPUt INTERFACE  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TERMINATION FOR 3.3V LVPECL OUTPUT  
The clock layout topology shown below is a typical termina-  
tion for LVPECL outputs.The two different layouts mentioned  
are recommended only as guidelines.  
drive 50Ω transmission lines. Matched impedance techniques  
should be used to maximize operating frequency and minimize  
signal distortion. Figures 3A and 3B show two different layouts  
which are recommended only as guidelines. Other suitable clock  
layouts may exist and it would be recommended that the board  
designers simulate to guarantee compatibility across all printed  
circuit and clock component process variations.  
FOUT and nFOUT are low impedance follower outputs that  
generate ECL/LVPECL compatible outputs.Therefore, terminat-  
ing resistors (DC current path to ground) or current sources  
must be used for functionality. These outputs are designed to  
3.3V  
Z
o = 50Ω  
125Ω  
125Ω  
FOUT  
FIN  
Zo = 50Ω  
Zo = 50Ω  
Zo = 50Ω  
FOUT  
FIN  
50Ω  
50Ω  
VCC - 2V  
1
RTT =  
Zo  
RTT  
84Ω  
84Ω  
((VOH + VOL) / (VCC – 2)) – 2  
FIGURE 3A. LVPECL OUTPUT TERMINATION  
FIGURE 3B. LVPECL OUTPUT TERMINATION  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TERMINATION FOR 2.5V LVPECL OUTPUT  
Figure 4A and Figure 4B show examples of termination for close to ground level. The R3 in Figure 4B can be eliminated  
2.5V LVPECL driver.These terminations are equivalent to ter- and the termination is shown in Figure 4C.  
minating 50Ω to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very  
2.5V  
VCC=2.5V  
2.5V  
2.5V  
VCC=2.5V  
Zo = 50 Ohm  
Zo = 50 Ohm  
R1  
250  
R3  
250  
+
-
Zo = 50 Ohm  
Zo = 50 Ohm  
+
-
2,5V LVPECL  
Driver  
R1  
50  
R2  
50  
2,5V LVPECL  
Driv er  
R2  
62.5  
R4  
62.5  
R3  
18  
FIGURE 4A. 2.5V LVPECL DRIVERTERMINATION EXAMPLE  
FIGURE 4B. 2.5V LVPECL DRIVERTERMINATION EXAMPLE  
2.5V  
VCC=2.5V  
Zo = 50 Ohm  
+
Zo = 50 Ohm  
-
2,5V LVPECL  
Driv er  
R1  
50  
R2  
50  
FIGURE 4C. 2.5V LVPECLTERMINATION EXAMPLE  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
POWER CONSIDERATIONS  
This section provides information on power dissipation and junction temperature for the ICS843071I.  
Equations and example calculations are also provided.  
1. Power Dissipation.  
The total power dissipation for the ICS843071I is the sum of the core power plus the power dissipated in the load(s).  
The following is the power dissipation for VCC = 3.3V + 10ꢀ = 3.63V, which gives worst case results.  
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.  
Power (core)MAX = VCC_MAX * IEE_TYP = 3.63V * 96mA = 348.5mW  
Power (outputs)MAX = 30mW/Loaded Output pair  
Total Power_MAX (3.63V, with all outputs switching) = 348.5mW + 30mW = 378.5mW  
2. Junction Temperature.  
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the  
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.  
The equation for Tj is as follows: Tj = θJA * Pd_total + TA  
Tj = JunctionTemperature  
θJA = Junction-to-AmbientThermal Resistance  
Pd_total =Total Device Power Dissipation (example calculation is in section 1 above)  
TA = AmbientTemperature  
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a  
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W perTable 6 below.  
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:  
85°C + 0.379W * 90.5°C/W = 119.3°C. This is below the limit of 125°C.  
This calculation is only an example.Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,  
and the type of board (single layer or multi-layer).  
TABLE 6.THERMAL RESISTANCE θJA FOR 8-PINTSSOP, FORCED CONVECTION  
θJA by Velocity (Meters per Second)  
0
1
2.5  
89.8°C/W  
Multi-Layer PCB, JEDEC Standard Test Boards  
101.7°C/W  
90.5°C/W  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
3. Calculations and Equations.  
The purpose of this section is to derive the power dissipated into the load.  
LVPECL output driver circuit and termination are shown in Figure 5.  
VCC  
Q1  
VOUT  
RL  
50  
VCC - 2V  
FIGURE 5. LVPECL DRIVER CIRCUIT ANDT ERMINATION  
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination  
voltage ofV - 2V.  
CC  
For logic high, VOUT = V  
= V  
– 0.9V  
OH_MAX  
CC_MAX  
)
= 0.9V  
OH_MAX  
(V  
- V  
CCO_MAX  
For logic low, VOUT = V  
= V  
– 1.7V  
OL_MAX  
CC_MAX  
)
= 1.7V  
OL_MAX  
(V  
- V  
CCO_MAX  
Pd_H is power dissipation when the output drives high.  
Pd_L is the power dissipation when the output drives low.  
))  
Pd_H = [(V  
– (V  
- 2V))/R ] * (V  
- V  
) = [(2V - (V  
- V  
/R ] * (V  
- V  
) =  
OH_MAX  
CC_MAX  
CC_MAX  
OH_MAX  
_MAX  
OH_MAX  
CC_MAX  
OH_MAX  
CC  
L
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mWL  
))  
Pd_L = [(V  
– (V  
- 2V))/R ] * (V  
- V  
) = [(2V - (V  
- V  
/R ] * (V  
- V  
) =  
OL_MAX  
CC_MAX  
CC_MAX  
OL_MAX  
_MAX  
OL_MAX  
CC_MAX  
OL_MAX  
L
CC  
L
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW  
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW  
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FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
RELIABILITY INFORMATION  
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEADTSSOP  
θJA byVelocity (Linear Feet per Minute)  
0
1
2.5  
89.8°C/W  
Multi-Layer PCB, JEDEC Standard Test Boards  
101.7°C/W  
90.5°C/W  
TRANSISTOR COUNT  
The transistor count for ICS843071I is: 1732  
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ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP  
TABLE 8. PACKAGE DIMENSIONS  
Millimeters  
SYMBOL  
Minimum  
Maximum  
N
A
8
--  
1.20  
0.15  
1.05  
0.30  
0.20  
3.10  
A1  
A2  
b
0.05  
0.80  
0.19  
0.09  
2.90  
c
D
E
6.40 BASIC  
0.65 BASIC  
E1  
e
4.30  
4.50  
L
0.45  
0°  
0.75  
8°  
α
aaa  
--  
0.10  
Reference Document: JEDEC Publication 95, MO-153  
843071AGI  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 11, 2006  
14  
ICS843071I  
FEMTOCLOCKS™ CRYSTAL-TO- LVPECL  
CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
TABLE 9. ORDERING INFORMATION  
Part/Order Number  
ICS843071AGI  
Marking  
3071A  
3071A  
TBD  
Package  
Shipping Packaging  
tube  
Temperature  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
8 Lead TSSOP  
ICS843071AGIT  
ICS843071AGILF  
ICS843071AGILFT  
8 Lead TSSOP  
2500 tape & reel  
tube  
8 Lead "Lead-Free" TSSOP  
8 Lead "Lead-Free" TSSOP  
TBD  
2500 tape & reel  
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.  
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use  
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use  
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not  
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product  
for use in life support devices or critical medical instruments.  
843071AGI  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 11, 2006  
15  

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