ICS843001BGILFT [ICSI]
FEMTOCLOCKS? CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR; FEMTOCLOCKS ？ CRYSTAL - TO- 3.3V LVPECL时钟发生器
| 型号： | ICS843001BGILFT |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | FEMTOCLOCKS? CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR |
| 文件： | 总13页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
GENERAL DESCRIPTION
FEATURES
The ICS843001BI is a Fibre Channel Clock • One differential 3.3V LVPECL output
ICS
HiPerClockS™
Generator and a member of the HiPerClocksTM
family of high performance devices from ICS.
The ICS843001BI uses either a 26.5625MHz or
a 23.4375MHz crystal to synthesize 106.25MHz,
• Crystal oscillator interface designed for 23.4375MHz or
26.5625MHz, 18pF parallel resonant crystal
• Selectable 106.25MHz, 187.5MHz or 212.5MHz
output frequency
187.5MHz or 212.5MHz, using the FREQ_SEL pin. The
ICS843001BI has excellent <1ps phase jitter performance,
over the 637kHz – 10MHz integration range.The ICS843001BI
is packaged in a small 8-pin TSSOP and 16 VFQFN, making
it ideal for use in systems with limited board space.
• VCO range: 560MHz - 680MHz
• RMS phase jitter @ 106.255MHz, using a 26.5625MHz
crystal (637kHz - 10MHz): 0.60ps (typical)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
16 15 14 13
Output Frequencies
VEE
nc
1
2
3
4
12
VCC
Q
Crystal Frequency FREQ_SEL
11
26.5625MHz
26.5625MHz
23.4375MHz
0
1
1
106.25MHz (Default)
212.5MHz
XTAL_OUT
XTAL_IN
10 nQ
9
VEE
5
6
7
8
187.5MHz
BLOCK DIAGRAM
ICS843001BI
16-LeadVFQFN
(Pulldown)
FREQ_SEL
3mm x 3mm x 0.95 package body
K Package
1
0
÷3
÷6
VCO
Top View
XTAL_IN
OSC
XTAL_OUT
Q
Phase
Detector
nQ
637.5MHz w/
26.5625MHz Ref.
VCCA
VEE
VCC
1
2
3
4
8
7
6
5
Q
XTAL_OUT
XTAL_IN
nQ
M = ÷24 (fixed)
FREQ_SEL
ICS843001BI
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
TopView
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843001BKI
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REV.A OCTOBER 6, 2005
1
PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Name
VCC
Type
Description
Power
Power
Power
Power supply pin.
Analog supply pin.
Negative supply pin.
VCCA
VEE
XTAL_OUT,
XTAL_IN
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Input
FREQ_SEL
nQ, Q
Input
Output
Unused
Pulldown Frequency select pin. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
No connect.
nc
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
Parameter
Test Conditions
Minimum
Typical
Maximum Units
Input Capacitance
Input Pulldown Resistor
4
pF
RPULLDOWN
51
kΩ
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
ABSOLUTE MAXIMUM RATINGS
SupplyVoltage, V
4.6V
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
CC
Inputs, V
-0.5V to VCC + 0.5V
I
Outputs, IO
Continuous Current
Surge Current
50mA
100mA
PackageThermal Impedance, θ
8 LeadTSSOP
16 Lead VFQFN
JA
101.7°C/W (0 mps)
51.5°C/W (0 lfpm)
StorageTemperature, T
-65°C to 150°C
STG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V 5ꢀ,TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
3.135
Typical
3.3
Maximum Units
VCC
VCCA
ICCA
IEE
Power Supply Voltage
3.465
3.465
V
Analog Supply Voltage
Analog Supply Current
Power Supply Current
3.135
3.3
V
included in IEE
8
mA
mA
60
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
VIH
VIL
IIH
Input High Voltage
2
VCC + 0.3
0.8
V
V
Input Low Voltage
-0.3
Input High Current FREQ_SEL
Input Low Current FREQ_SEL
VCC = VIN = 3.465V
150
µA
µA
IIL
VCC = 3.465V, VIN = 0V
-5
TABLE 3C. LVPECL DC CHARACTERISTICS, VCC = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol
VOH
Parameter
Test Conditions
Minimum
Typical
Maximum Units
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
VCC - 1.4
VCC - 2.0
0.6
VCC - 0.9
VCC - 1.7
1.0
V
V
V
VOL
VSWING
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
23.4375
Typical Maximum Units
Fundamental
Mode of Oscillation
Frequency
26.5625
MHz
Ω
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
50
7
pF
1
mW
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
TABLE 5. AC CHARACTERISTICS, VCC = 3.3V 5ꢀ, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
FREQ_SEL = 1
FREQ_SEL = 0
186.67
93.33
226.66
113.33
MHz
MHz
ps
fOUT
Output Frequency
212.5MHz, (637kHz to 10MHz)
187.5MHz, (1.875MHz to 20MHz)
106.25MHz, (637kHz to 10MHz)
20ꢀ to 80ꢀ
0.60
TBD
0.60
400
50
RMS Phase Jitter, (Random);
NOTE 1
tjit(Ø)
ps
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
ps
FSEL = 0
ꢀ
FSEL = 1
50
ꢀ
NOTE 1: Please refer to Phase Noise Plot.
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
2V
Phase Noise Plot
SCOPE
VCC
Qx
Phase Noise Mask
LVPECL
VEE
nQx
Offset Frequency
f1
f2
-1.3V 0.165V
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
nQ
80ꢀ
tF
80ꢀ
tR
Q
VSWING
20ꢀ
Pulse Width
tPERIOD
Clock
Outputs
20ꢀ
tPW
odc =
tPERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843001BI provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL.VCC and VCCA should
be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each VCCA pin.
3.3V
VCC
.01μF
.01μF
10Ω
VCCA
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843001BI has been characterized with 18pF parallel parallel resonant crystal and were chosen to minimize the
resonant crystals. The capacitor values, C1 and C2, shown in ppm error. The optimum C1 and C2 values can be slightly
Figure 2 below were determined using a 26.5625MHz, 18pF adjusted for different board layouts.
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
27p
Figure 2. CRYSTAL INPUt INTERFACE
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
LAYOUT GUIDELINE
Figure 3A shows a schematic example of the ICS843001BI. an 18pF parallel resonant crystal is used. The C1 = 27pF and
An example of LVEPCL termination is shown in this sche- C2 = 33pF are recommended for frequency accuracy. The C1
matic. Additional LVPECL termination approaches are shown and C2 values may be slightly adjusted for optimizing fre-
in the LVPECL Termination Application Note. In this example, quency accuracy.
VCC
VCCA
VCC
VCC
R2
10
C3
10uF
C4
0.01u
R1
R3
R5
1K
133
133
U1
Zo = 50 Ohm
Zo = 50 Ohm
Q
VCC
1
8
7
6
5
VCCA
VEE
XTAL_OUT
XTAL_IN
VCC
Q0
nQ0
+
-
2
3
4
FREQ_SEL
nQ
C2
33pF
26.5625MHz
18pF
X1
I4301
R4
82.5
R6
82.5
C5
0.1u
C1
27pF
FIGURE 3A. ICS843001BI SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of ICS843001BI P.C. board
layout. The crystal X1 footprint shown in this example allows
installation of either surface mount HC49S or through-hole
HC49 package. The footprints of other components in this
example are listed in the Table 6. There should be at least
one decoupling capacitor per power pin. The decoupling ca-
pacitors should be located as close as possible to the power
pins. The layout assumes that the board has clean analog
power ground plane.
TABLE 6. FOOTPRINT TABLE
Reference
C1, C2
C3
Size
0402
0805
0603
0603
C4, C5
R2
NOTE: Table 6, lists component
sizes shown in this layout example.
FIGURE 3B. ICS843001BI PC BOARD LAYOUT EXAMPLE
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843001BI.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843001BI is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5ꢀ = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
•
•
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 60mA = 207.9mW
Power (outputs)MAX = 30mW/Loaded Output pair
Total Power_MAX (3.465V, with all outputs switching) = 207.9mW + 30mW = 237.9mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device.The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = JunctionTemperature
θJA = Junction-to-AmbientThermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = AmbientTemperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 7A below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.238W * 90.5°C/W = 106.5°C. This is below the limit of 125°C.
This calculation is only an example.Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 7A. THERMAL RESISTANCE θJA FOR 8-PIN TSSOP, FORCED CONVECTION
θJA byVelocity (Meters per Second)
0
1
2.5
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
TABLE 7B. θJAVS. AIR FLOW TABLE FOR 16 LEAD VFQFN
θJA at 0 Air Flow (Linear Feet per Minute)
0
Multi-Layer PCB, JEDEC Standard Test Boards
51.5°C/W
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 4.
VCC
Q1
VOUT
RL
50
VCC - 2V
FIGURE 4. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage ofV - 2V.
CC
•
•
For logic high, VOUT = V
= V
– 0.9V
OH_MAX
CC_MAX
)
= 0.9V
OH_MAX
(V
- V
CCO_MAX
For logic low, VOUT = V
= V
– 1.7V
OL_MAX
CC_MAX
)
= 1.7V
OL_MAX
(V
- V
CCO_MAX
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
))
Pd_H = [(V
– (V
- 2V))/R ] * (V
- V
) = [(2V - (V
- V
/R ] * (V
- V
) =
OH_MAX
CC_MAX
CC_MAX
OH_MAX
_MAX
OH_MAX
CC_MAX
OH_MAX
CC
L
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mWL
))
Pd_L = [(V
– (V
- 2V))/R ] * (V
- V
) = [(2V - (V
- V
/R ] * (V
- V
) =
OL_MAX
CC_MAX
CC_MAX
OL_MAX
_MAX
OL_MAX
CC_MAX
OL_MAX
L
CC
L
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
RELIABILITY INFORMATION
TABLE 8A. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
θJA byVelocity (Meters Per Second)
0
1
2.5
89.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7°C/W
90.5°C/W
TABLE 8B. θJAVS. AIR FLOW TABLE FOR 16 LEAD VFQFN
θJA at 0 Air Flow (Linear Feet per Minute)
0
Multi-Layer PCB, JEDEC Standard Test Boards
51.5°C/W
TRANSISTOR COUNT
The transistor count for ICS843001BI is: 2069
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
PACKAGE OUTLINE - G SUFFIX 8 LEAD TSSOP
TABLE 9A. PACKAGE DIMENSIONS
Millimeters
SYMBOL
Minimum
Maximum
N
A
8
--
1.20
0.15
1.05
0.30
0.20
3.10
A1
A2
b
0.05
0.80
0.19
0.09
2.90
c
D
E
6.40 BASIC
0.65 BASIC
E1
e
4.30
4.50
L
0.45
0°
0.75
8°
α
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
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REV.A OCTOBER 6, 2005
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
PACKAGE OUTLINE - K SUFFIX FOR 16 LEAD VFQFN
TABLE 9B. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS
SYMBOL
MINIMUM
MAXIMUM
N
A
16
0.80
0
1.0
A1
A3
b
0.05
0.25 Reference
0.18
0.30
e
0.50 BASIC
ND
NE
D
4
4
3.0
D2
E
0.25
1.25
3.0
E2
L
0.25
0.30
1.25
0.50
Reference Document: JEDEC Publication 95, MO-220
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PRELIMINARY
ICS843001BI
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ C RYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
TABLE 10. ORDERING INFORMATION
Part/Order Number
ICS843001BGI
Marking
Package
Shipping Packaging
tube
Temperature
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
8 Lead TSSOP
ICS843001BGIT
ICS843001BGILF
ICS843001BGILFT
ICS843001BKI
8 Lead TSSOP
2500 tape & reel
tube
8 Lead "Lead-Free" TSSOP
8 Lead "Lead-Free" TSSOP
16 Lead VFQFN
2500 tape & reel
tube
ICS843001BKIT
ICS843001BKILF
ICS843001BKILFT
16 Lead VFQFN
2500 tape & reel
tube
16 Lead "Lead-Free" VFQFN
16 Lead "Lead-Free" VFQFN
2500 tape & reel
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without
additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical
medical instruments.
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REV.A OCTOBER 6, 2005
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