HY628400ALR2-E [HYNIX]

512K x8 bit 5.0V Low Power CMOS slow SRAM; 512K ×8位5.0V低功耗CMOS SRAM慢
HY628400ALR2-E
型号: HY628400ALR2-E
厂家: HYNIX SEMICONDUCTOR    HYNIX SEMICONDUCTOR
描述:

512K x8 bit 5.0V Low Power CMOS slow SRAM
512K ×8位5.0V低功耗CMOS SRAM慢

静态存储器
文件: 总11页 (文件大小:182K)
中文:  中文翻译
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HY628400A Series  
512Kx8bit CMOS SRAM  
Document Title  
512K x8 bit 5.0V Low Power CMOS slow SRAM  
Revision History  
Revision No History  
Draft Date  
Remark  
Final  
04  
05  
Revision History Insert  
Jul.06.2000  
Revised  
Aug.04.2000  
Dec.04.2000  
Final  
Final  
- Change Iccdr Value : 15uA => 20uA  
06  
Marking Information Add  
Revised  
-
-
E.T (-25~85°C), I.T (-40~85°C) Part Insert  
AC Test Condition Add : 5pF Test Load  
07  
Changed Logo  
Apr.30.2001  
Final  
-
HYUNDAI -> hynix  
-
Marking Information Change  
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility  
for use of circuits described. No patent licenses are implied.  
Rev 07 / Apr. 2001  
Hynix Semiconductor  
HY628400A Series  
DESCRIPTION  
FEATURES  
The HY628400A is a high-speed, low power and  
4M bits CMOS SRAM organized as 512K words  
by 8 bits. The HY628400A uses Hynix's high  
performance twin tub CMOS process technology  
and was designed for high-speed and low power  
circuit technology. It is particularly well suited for  
use in high-density and low power system  
applications. This device has a data retention  
mode that guarantees data to remain valid at the  
minimum power supply voltage of 2.0V.  
·
·
·
·
Fully static operation and Tri-state outputs  
TTL compatible inputs and outputs  
Low power consumption  
Battery backup(L/LL-part)  
-. 2.0V(min) data retention  
Standard pin configuration  
-. 32pin 525mil SOP  
·
-. 32pin 400mil TSOP-II  
(Standard and Reversed)  
Product  
No.  
HY628400A  
HY628400A-E 4.5~5.5 55/70/85  
HY628400A-I 4.5~5.5 55/70/85  
Voltage  
(V)  
4.5~5.5 55/70/85  
Speed  
(ns)  
Operation  
Current/Icc(mA)  
Standby Current(uA)  
Temperature  
(°C)  
L
LL  
30  
50  
50  
10  
10  
10  
100  
100  
100  
0~70  
-25~85  
-40~85  
Note 1. Current value is max.  
PIN CONNECTION  
A18  
A16  
A14  
A12  
A7  
Vcc  
A15  
A17  
/WE  
A13  
A8  
A18  
A16  
A14  
A12  
A7  
Vcc  
A15  
A17  
/WE  
A13  
A8  
Vcc  
A15  
A17  
/WE  
A13  
A8  
A18  
A16  
A14  
A12  
A7  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
1
2
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
1
2
3
3
3
4
4
4
5
5
5
A6  
A6  
A6  
6
6
6
A5  
A9  
A5  
A9  
A9  
A5  
7
7
7
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
A4  
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
A11  
/OE  
A10  
/CS  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
A4  
A4  
8
8
8
A3  
A3  
A3  
9
9
9
A2  
A2  
A2  
10  
11  
12  
13  
14  
15  
16  
10  
11  
12  
13  
14  
15  
16  
10  
11  
12  
13  
14  
15  
16  
A1  
A1  
A1  
A0  
A0  
A0  
I/O1  
I/O2  
I/O3  
Vss  
I/O1  
I/O2  
I/O3  
Vss  
I/O1  
I/O2  
I/O3  
Vss  
SOP  
TSOP-II(Standard)  
TSOP-II(Reversed)  
PIN DESCRIPTION  
BLOCK DIAGRAM  
Pin Name  
Pin Function  
Chip Select  
Write Enable  
ROW DECODER  
A0  
I/O1  
/CS  
/WE  
/OE  
Output Enable  
Address Inputs  
Data Inputs/Outputs  
Power(4.5~5.5V)  
Ground  
A0 ~ A18  
I/O1 ~ I/O8  
Vcc  
MEMORY ARRAY  
512Kx 8  
Vss  
I/O8  
A18  
/CS  
/OE  
/WE  
Rev 07 / Apr. 2001  
2
HY628400A Series  
ORDERING INFORMATION  
Part No.  
HY628400ALG  
Speed  
Power  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
LL-part  
L-part  
Temp  
0-70°C  
0-70°C  
-25-85°C  
-25-85°C  
-40-85°C  
-40-85°C  
0-70°C  
Package  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
55/70/85  
SOP  
SOP  
SOP  
SOP  
SOP  
SOP  
HY628400ALLG  
HY628400ALG-E  
HY628400ALLG-E  
HY628400ALG-I  
HY628400ALLG-I  
HY628400ALT2  
HY628400ALLT2  
HY628400ALT2-E  
HY628400ALLT2-E  
HY628400ALT2-I  
HY628400ALLT2-I  
HY628400ALR2  
HY628400ALLR2  
HY628400ALR2-E  
HY628400ALLR2-E  
HY628400ALR2-I  
HY628400ALLR2-I  
TSOP-II (Standard)  
TSOP-II (Standard)  
TSOP-II (Standard)  
TSOP-II (Standard)  
TSOP-II (Standard)  
TSOP-II (Standard)  
TSOP-II (Reversed)  
TSOP-II (Reversed)  
TSOP-II (Reversed)  
TSOP-II (Reversed)  
TSOP-II (Reversed)  
TSOP-II (Reversed)  
0-70°C  
-25-85°C  
-25-85°C  
-40-85°C  
-40-85°C  
0-70°C  
0-70°C  
-25-85°C  
-25-85°C  
-40-85°C  
-40-85°C  
LL-part  
L-part  
LL-part  
ABSOLUTE MAXIMUM RATING (1)  
Symbol  
Vcc, VIN, VOUT  
TA  
Parameter  
Power Supply, Input/Output Voltage  
Rating  
-0.5 to 7.0  
0 to 70  
-25 to 85  
-40 to 85  
-65 to 150  
1.0  
Unit  
V
Operating Temperature  
HY628400A  
HY628400A-E  
HY628400A-I  
°C  
°C  
°C  
°C  
W
TSTG  
PD  
Storage Temperature  
Power Dissipation  
IOUT  
Data Output Current  
50  
MA  
TSOLDER  
Lead Soldering Temperature & Time  
260 ·10  
°C·sec  
Note  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent  
damage to the device. This is stress rating only and the functional operation of the device under these or  
any other conditions above those indicated in the operation of this specification is not implied.  
Exposure to the absolute maximum rating conditions for extended period may affect reliablity.  
TRUTH TABLE  
/CS  
H
L
L
L
/WE /OE  
MODE  
Deselected  
Output Disabled  
Read  
I/O OPERATION  
High-Z  
Power  
Standby  
Active  
Active  
Active  
X
H
H
L
X
H
L
High-Z  
Data Out  
Data In  
X
Write  
Note :  
1. H=VIH, L=VIL, X=don't care (VIH or VIL)  
Rev 07 / Apr. 2001  
2
HY628400A Series  
RECOMMENDED DC OPERATING CONDITION  
TA = 0¡ Éto 70¡ (ÉNormal)/-25°C to 85°C (Extended) /-40°C to 85°C (Industrial), unless otherwise specified.  
Symbol  
Vcc  
Vss  
VIH  
VIL  
Parameter  
Supply Voltage  
Ground  
Input High Voltage  
Input Low Voltage  
Min.  
4.5  
0
2.2  
-0.5(1)  
Typ.  
5.0  
0
-
-
Max.  
5.5  
0
Vcc+0.5  
0.8  
Unit  
V
V
V
V
Note :  
1. VIL = -1.5V for pulse width less than 30ns and not 100% tested.  
DC ELECTRICAL CHARACTERISTICS  
TA = 0¡ Éto 70¡ (ÉNormal)/-25°C to 85°C (Extended) /-40°C to 85°C (Industrial), unless otherwise specified.  
Symbol  
ILI  
ILO  
Parameter  
Input Leakage Current  
Output Leakage Current  
Test Condition  
Vss < VIN < Vcc  
Vss < VOUT < Vcc, /CS = VIH or  
/OE = VIH or /WE = VIL  
/CS = VIL,  
Min.  
-1  
-1  
Typ. Max. Unit  
-
-
1
1
UA  
UA  
Icc  
Operating Power Supply  
Current  
Average Operating Current  
-
-
10  
60  
MA  
MA  
VIN = VIH or VIL, II/O = 0mA  
/CS = VIL  
ICC1  
Min Duty Cycle = 100%,  
VIN = VIH or VIL, II/O = 0mA  
/CS = VIH  
ISB  
TTL Standby Current  
(TTL Input)  
-
2
MA  
VIN = VIH or VIL  
ISB1  
Standby Current  
(CMOS Input)  
/CS > Vcc - 0.2V,  
VIN > Vcc - 0.2V or  
VIN < Vss + 0.2V  
L
LL  
L-E/I  
LL-E/I  
-
-
-
-
-
-
-
-
-
-
-
100  
30  
100  
50  
0.4  
-
uA  
uA  
uA  
uA  
V
VOL  
VOH  
Output Low Voltage  
Output High Voltage  
IOL = 2.1mA  
IOH = -1mA  
2.4  
V
Note : Typical values are at Vcc = 5.0V, TA = 25°C  
CAPACITANCE  
Temp = 25°C, f= 1.0MHz  
Symbol  
CIN  
COUT  
Parameter  
Input Capacitance  
Output Capacitance  
Condition  
VIN = 0V  
VI/O = 0V  
Max.  
6
8
Unit  
pF  
pF  
Note : This parameter is sampled and not 100% tested  
Rev 07 / Apr. 2001  
3
HY628400A Series  
AC CHARACTERISTICS  
TA = 0¡ Éto 70¡ (ÉNormal)/-25°C to 85°C (Extended) /-40°C to 85°C (Industrial), unless otherwise specified.  
55ns  
70ns  
Max. Min  
85ns  
Max.  
#
Symbol  
Parameter  
Unit  
Min. Max. Min.  
READ CYCLE  
1
2
3
4
5
6
7
8
9
tRC  
tAA  
tACS  
tOE  
tCLZ  
tOLZ  
tCHZ  
tOHZ  
tOH  
Read Cycle Time  
Address Access Time  
Chip Select Access Time  
Output Enable to Output Valid  
Chip Select to Output in Low Z  
Output Enable to Output in Low Z  
Chip Deselecting to Output in High Z  
Out Disable to Output in High Z  
Output Hold from Address Change  
55  
-
-
-
10  
5
0
0
10  
-
70  
-
-
-
10  
5
0
0
10  
-
85  
-
-
-
10  
5
0
0
10  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
55  
55  
25  
-
70  
70  
40  
-
85  
85  
45  
-
-
-
-
20  
20  
-
25  
25  
-
30  
30  
-
WRITE CYCLE  
10 tWC  
11 tCW  
12 tAW  
13 tAS  
14 tWP  
15 tWR  
16 tWHZ  
17 tDW  
18 tDH  
19 tOW  
Write Cycle Time  
55  
45  
45  
0
40  
0
0
25  
0
-
-
-
-
-
-
20  
-
-
-
70  
60  
60  
0
50  
0
0
30  
0
-
-
-
-
-
-
25  
-
-
-
85  
70  
70  
0
55  
0
0
40  
0
-
-
-
-
-
-
30  
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Selection to End of Write  
Address Valid to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Write to Output in High Z  
Data to Write Time Overlap  
Data Hold from Write Time  
Output Active from End of Write  
5
5
5
AC TEST CONDITIONS  
TA = 0¡ Éto 70¡ (ÉNormal)/-25°C to 85°C (Extended) /-40°C to 85°C (Industrial), unless otherwise specified.  
Parameter Value  
Input Pulse Level  
Input Rise and Fall Time  
0.8V to 2.4V  
5ns  
Input and Output Timing Reference Level  
1.5V  
Output Load  
tCLZ,tOLZ,tCHZ,tOHZ,tWHZ  
Others  
CL = 5pF + 1TTL Load  
CL = 100pF + 1TTL Load  
AC TEST LOADS  
TTL  
CL(1)  
Note  
1. Including jig and scope capacitance  
Rev 07 / Apr. 2001  
4
HY628400A Series  
TIMING DIAGRAM  
READ CYCLE 1(Note 1,4)  
tRC  
ADDR  
/CS  
tAA  
tACS  
tOH  
tCHZ(3)  
tOE  
/OE  
tOLZ(3)  
tOHZ(3)  
tCLZ(3)  
Data  
High-Z  
Out  
Data Valid  
READ CYCLE 2(Note 1,2,4)  
tRC  
ADDR  
tAA  
tOH  
tOH  
Data  
Out  
Previous Data  
Data Valid  
READ CYCLE 3(Note 1,2,4)  
/CS  
tACS  
tCLZ(3)  
tCHZ(3)  
Data  
Out  
Data Valid  
Notes:  
1. A read occurs during the overlap of a low /OE, a high /WE and a low /CS.  
2. /OE = VIL  
3. Transition is measured + 200mV from steady state voltage.  
This parameter is sampled and not 100% tested.  
4. /CS in high for the standby, low for active  
Rev 07 / Apr. 2001  
5
HY628400A Series  
WRITE CYCLE 1(1,4,5,8) (/WE Controlled)  
tWC  
tCW  
ADDR  
tWR(2)  
/CS  
tAW  
/WE  
tWP  
tAS  
tDW  
Data Valid  
tDH  
Data In  
High-Z  
(5)  
(6)  
tWHZ(3,7)  
tOW  
Data  
Out  
WRITE CYCLE 2 (Note 1,4,5,8) (/CS Controlled)  
tWC  
ADDR  
tCW  
tAS  
tWR(2)  
/CS  
tAW  
tWP  
/WE  
tDW  
Data Valid  
tDH  
High-Z  
Data In  
High-Z  
Data  
Out  
Rev 07 / Apr. 2001  
6
HY628400A Series  
Notes:  
1. A write occurs during the overlap of a low /WE and a low /CS.  
2. tWR is measured from the earlier of /CS or /WE going high to the end of write cycle.  
3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the  
output must not be applied.  
4. If the /CS low transition occur simultaneously with the /WE low transition or after the  
/WE transition, outputs remain in a high impedance state.  
5. Q(data out) is the same phase with the write data of this write cycle.  
6. Q(data out) is the read data of the next address.  
7. Transition is measured + 200mV from steady state.  
This parameter is sampled and not 100% tested.  
8. /CS in high for the standby, low for active  
DATA RETENTION ELECTRIC CHARATERISTIC  
TA = 0¡ Éto 70¡ (ÉNormal)/-25°C to 85°C (Extended) /-40°C to 85°C (Industrial), unless otherwise specified.  
Symbol  
VDR  
Parameter  
Vcc for Data Retention  
Test Condition  
/CS > Vcc - 0.2V,  
VIN > Vcc - 0.2V or VIN < Vss + 0.2V  
Min  
2.0  
Typ Max Unit  
-
-
V
ICCDR  
Data Retention Current  
Vcc = 3.0V,  
L
LL  
L-E/I  
LL-E/I  
-
-
-
-
0
-
-
-
-
-
50  
20  
50  
30  
-
uA  
uA  
uA  
uA  
ns  
/CS1>Vcc - 0.2V,  
VIN > Vcc - 0.2V or  
VIN < Vss + 0.2V  
tCDR  
tR  
Chip Deselect to Data  
Retention Time  
Operating Recovery Time  
tRC  
(2)  
-
-
ns  
Notes:  
1. Typical values are at the condition of TA = 25°C.  
2. tRC is read cycle time.  
DATA RETENTION TIMING DIAGRAM  
DATA RETENTION MODE  
VCC  
4.5V  
tCDR  
tR  
2.2V  
VDR  
/CS > VCC-0.2V  
/CS  
VSS  
Rev 07 / Apr. 2001  
7
HY628400A Series  
PACKAGE INFORMATION  
32pin 400mil Thin Small Outline Package Standard(T2)  
MAX.  
0.404(10.2620)  
0.396(10.0580()  
UNIT : INCH(mm)  
MIN.  
0.470(11.9380)  
0.462(11.7350)  
0.829(21.0570)  
0.822(20.8790)  
GAGE PLANE  
BASE PLANE  
0-5  
0.0235(0.5970)  
0.0160(0.4060)  
0.050BSC  
(1.2700)  
0.017(0.4500)  
0.012(0.3050)  
SEATING PLANE  
0.0059(0.1500)  
0.0020(0.0500)  
0.0083(0.2100)  
0.0047(0.1200)  
0.047(1.1940)  
0.039(0.9910)  
32pin 400mil Thin Small Outline Package Reversed(R2)  
MAX.  
0.404(10.2620)  
0.396(10.0580)  
UNIT : INCH(mm)  
MIN.  
0.470(11.9380)  
0.462(11.7350)  
0.829(21.0570)  
0.822(20.8790)  
GAGE PLANE  
BASE PLANE  
0-5  
0.0235(0.5970)  
0.0160(0.4060)  
0.0083(0.2100)  
0.0047(0.1200)  
0.050 BSC  
(1.2700)  
0.017(0.4500)  
0.012(0.3050)  
SEATING PLANE  
0.0059(0.1500)  
0.0020(0.0500)  
0.047(1.1940)  
0.039(0.9910)  
Rev 07 / Apr. 2001  
8
HY628400A Series  
32pin 525mil Small Outline Package(G)  
UNIT : INCH(mm)  
0.444(11.278)  
0.438(11.125)  
0.564(14.326)  
0.810(20.574)  
0.804(20.422)  
0.546(13.868)  
0.109(2.769)  
0.0125(0.318)  
0.0061(0.155)  
0.099(2.515)  
0.011(0.279)  
0.004(0.102)  
0 deg  
8 deg  
0.0425(1.080)  
0.0235(0.597)  
0.020(0.508)  
0.014(0.356)  
0.050(1.27)BSC  
Rev 07 / Apr. 2001  
9
HY628400A Series  
MARKING INFORMATION  
Package  
Marking Example  
h
y
Y
y
n
6
i
x
8
p
K
O
R
E
A
H
2
w
4
0
0
A
c
SOP  
y
w
c
G
K
-
s
s
t
h
y
Y
y
n
6
i
x
8
p
O
R
E
A
H
2
w
4
0
0
c
A
c
TSOP-II  
y
w
T
2
-
s
s
t
Index  
hynix  
KOREA  
HY628400A  
yy  
ww  
p  
: hynix Logo  
: Origin Country  
: Part Name  
: Year ( ex : 00 = year 2000, 01 = year 2001 )  
: Work Week ( ex : 12 = ww12 )  
: Process Code  
cc  
: Power Consumption  
- L  
: Low Power  
- LL  
: Low Low Power  
G / T2  
: Package Type  
- G  
: SOP  
- T2  
: TSOP-II  
ss  
t
: Speed  
- 55  
- 70  
: 55ns  
: 70ns  
: Temperature  
- Blank  
°
: Commercial ( 0 ~ 70 C )  
°
: Extended ( -25 ~ 85 C )  
- E  
- I  
°
: Industrial ( -40 ~ 85 C )  
Note  
- Capital Letter  
- Small Letter  
: Fixed Item  
: Non-fixed Item (Except hynix)  
Rev 07 / Apr. 2001  
10  

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HYNIX

HY628400ALT2-85I

Standard SRAM, 512KX8, 85ns, CMOS, PDSO32, 0.400 INCH, TSOP2-32
HYNIX

HY628400ALT2-E

512K x8 bit 5.0V Low Power CMOS slow SRAM
HYNIX

HY628400ALT2-I

512K x8 bit 5.0V Low Power CMOS slow SRAM
HYNIX
ETC

HY628400G-10I

Standard SRAM, 512KX8, 100ns, CMOS, PDSO32, 0.525 INCH, SOP-32
HYNIX
ETC

HY628400G-70

Standard SRAM, 512KX8, 70ns, CMOS, PDSO32, 0.525 INCH, SOP-32
HYNIX