HI-8383CM-03 [HOLTIC]
Interface IC ; 接口IC\n
| 型号： | HI-8383CM-03 |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | Interface IC
|
| 文件： | 总8页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-8382, HI-8383
January 2001
GENERAL DESCRIPTION
PIN CONFIGURATION (Top View)
The HI-8382 and HI-8383 bus interface products are silicon
gate CMOS devices designed as a line driver in accordance with
theARINC 429 busspecifications.
4
3
2
1
28 27 26
Inputs are provided for clocking and synchronization. These
signals are AND'd with the DATA inputs to enhance system
performance and allow the HI-8382 to be used in a variety of
applications. Both logic and synchronization inputs feature
built-in 2,000V minimum ESD input protection as well as TTL
andCMOS compatibility.
5
6
25
24
23
22
21
20
19
N/C
DATA (A)
N/C
CLOCK
N/C
HI-8382J
7
DATA (B)
C B
8
N/C
28 - PIN
PLASTIC
PLCC
9
C A
N/C
The differential outputs of the HI-8382 are independently
programmable to either the high speed or low speed ARINC 429
output rise and fall time specifications through the use of two
external capacitors. The output voltage swing is also adjustable
by the application of an external voltage to the VREF input. The
HI-8382 has on-chip Zener diodes in series with a fuse to each
differential output protecting the ARINC bus from an overvoltage
failure. Theoutputseach have a series resistance of 37.5ohms.
The HI-8383 is identical to the HI-8382 except that the series
resistors are 13 ohms and the overvoltage protection circuitry
hasbeeneliminated.
10
11
N/C
N/C
N/C
N/C
12 13 14 15 16 17 18
(See Page 4-46 for additional package pin configurations)
FUNCTION
The HI-8382 and HI-8383 are intended for use where logic
sig nals must be converted to ARINC 429 levels such as a user
ASIC or the HI-8282 ARINC 429 Serial Transmitter/Dual
Receiver or the HI-6010 ARINC 429 Transmitter/Receiver. Holt
products are readily available for both industrial and military
applications. Please contact the Holt Sales Department for
additional information, including data sheets for the HI-8282 and
HI-6010 products.
+
HI-8382
ARINC 429 DIFFERENTIAL LINE DRIVER
FEATURES
! Low powe r CMOS
TRUTH TABLE
SYNC CLOCK DATA(A) DATA(B) AOUT BOUT COMMENTS
! TTLa nd CMOS c om pa tible inputs
! Progra m m a ble output volta ge swing
! Adjusta ble ARINC rise a nd fa ll tim e s
! Ope ra te s a t da ta ra te s up to 100 Kbits
! Ove rvolta ge prote c tion
X
L
L
X
X
L
X
X
L
0V
0V
0V
0V
0V
0V
NULL
NULL
NULL
LOW
X
H
H
H
H
H
H
H
H
L
H
L
-VREF +VREF
+VREF -VREF
H
H
HIGH
NULL
! Industria l a nd Milita ry te m pe ra ture ra nge s
! DSCC SMD pa rt num be r
H
0V
0V
HOLT INTEGRATED CIRCUITS
1
(DS8382 Rev. A)
01/01
HI-8382, HI-8383
FUNCTIONAL DESCRIPTION
The driver can beexternally powered down by applying a logic
high tothe STROBE inputpin. Ifthis featureis not being used,
the pinshouldbetiedtoground.
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input. Each logic
input, including the power enable (STROBE) input, are
TTL/CMOS compatible. Besides reducing chip current drain,
STROBE also floats each output. However the overvoltage
fuses anddiodes oftheHI-8382arenotswitchedout.
The CA and CB pins are inputs to unity gain amplifiers.
Therefore they must be allowed to swing to -5V. Provision to
switch capacitors must be done with analog switches that
allowvoltages belowtheirground.
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-8382;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing. The
differential output voltage swing will equal 2VREF. If a value of
VREF other than +5V is needed, a separate +5V power supply
is requiredforpinV1 .
+5V
+15V
V
REF
OUT
V
1
SYNC
DATA (A)
CLOCK
With the DATA (A) input at a logic high and DATA (B) input at a
logic low, AOUT will switch to the +VREF rail and BOUT will
switch to the -VREF rail (ARINC HIGH state). With both data
input signals at a logic low state, the outputs will both switch to
0V (ARINC NULLstate).
+V
-V
INPUTS
TO ARINC BUS
B
STROBE
GND
DATA (B)
C
C
The driver output impedance, ROUT, is nominally 75 ohms.
The rise and fall times of theoutputs can be calibrated through
the selection of two external capacitor values that a re
connected to the CA and CB i nput pins. Typical values for
high-speed operation (100KBPS) are CA = CB = 75pF and for
low-speedoperation(12.5to14KBPS) CA = CB = 500pF.
-15V
Figure 1. ARINC 429 BUS APPLICATION
+V
C
REF
A
OUTPUT
DRIVER (A)
DATA (A)
CLOCK
SYNC
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
FA
ROUT/2
R L
C L
LEVEL SHIFTER
AND SLOPE
FB
ROUT/2
DATA (B)
CONTROL (B)
OUTPUT
DRIVER (B)
OVER VOLTAGE
CLAMPS
CURRENT
REGULATOR
V1
Not included on HI-8383
STROBE
B
-V
GND
C
B
OUT
Figure 2. FUNCTIONAL BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HI-8382, HI-8383
SYMBOL
VREF
FUNCTION
POWER
INPUT
DESCRIPTION
THE REFERENCE VOLTAGE USED TO DETERMINE THE OUTPUT VOLTAGE SWING
STROBE
SYNC
DATA (A)
CA
A LOGIC HIGH ON THIS INPUT PLACES THE DRIVER IN POWER DOWN MODE
INPUT
SYNCHRONIZES DATA INPUTS
DATA INPUT TERMINAL A
CONNECTION FOR DATA (A) SLEW-RATE CAPACITOR
ARINC OUTPUT TERMINAL A
-12V to -15V
INPUT
INPUT
AOUT
OUTPUT
POWER
POWER
POWER
OUTPUT
INPUT
-V
GND
0.0V
+V
+12V to +15V
BOUT
ARINC OUTPUT TERMINAL B
CONNECTION FOR DATA (B) SLEW-RATE CAPACITOR
DATA INPUT TERMINAL B
SYNCHRONIZES DATA INPUTS
+5V ±5%
CB
DATA (B)
CLOCK
V1
INPUT
INPUT
POWER
All Voltages referenced to GND, TA = Operating Temperature Range (unless otherwise specified)
PARAMETER
Differential Voltage
Supply Voltage
SYMBOL
CONDITIONS
OPERATING RANGE
MAXIMUM
UNIT
VDIF
Voltage between +V and -V terminals
40
V
+V
-V
V1
+10.8 to +16.5
-10.8 to -16.5
+5 ±10%
V
V
V
+7
Voltage Reference
VREF
For ARINC 429
For Applications other than ARINC
+5 ±5%
0 to 6
6
6
V
V
Input Voltage Range
VIN
> GND -0.3
< V1 +0.3
V
V
Output Short-Circuit Duration
Output Overvoltage Protection
Operating Temperature Range
See Note: 1
See Note: 2
TA
Hi-temp & Military
Industrial
-55 to +125
-40 to +85
°C
°C
Storage Temperature Range
TSTG
Ceramic & Plastic
-65 to +150
°C
Lead Temperature
Junction Temperature
Power Dissipation
Soldering, 10 seconds
+275
+175
°C
°C
TJ
PD
16-Pin Ceramic DIP
28-Pin Ceramic LCC
28-Pin Plastic PLCC
32-Pin CERQUAD
See Note: 3
See Note: 3
See Note: 3
See Note: 3
1.725
1.120
2.143
1.725
W
W
W
W
Thermal Resistance,
(Junction-to-Ambient)
ØJA
16-Pin Ceramic DIP
28-Pin Ceramic LCC
28-Pin Plastic PLCC
32-Pin CERQUAD
86.5
133.7
70.0
°C/W
°C/W
°C/W
°C/W
86.5
Note 1. Heatsinking may be required for Output Short Circuit at +125°C and for 100KBPS at +125°C.
Note 2. The fuses used for Output Overvoltage Protection may be blown by the presence of a voltage at either output that is greater
than ±12.0V with respect to GND. (HI-8382 only)
Note 3. Derate above +25°C, 11.5 mW/°C for 16-PIN DIP and 32-PIN CERQUAD, 7.5 mW/°C for 28-PIN LCC, 14.2 mW/°C for 28-PIN PLCC
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These a re stress ratings
only. Functional operation of the device at these or any other conditions above those indicated in the operational se ctions of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
HOLT INTEGRATED CIRCUITS
3
HI-8382, HI-8383
+V = +15V, -V = -15V, V1 = VREF = +5.0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
Supply Current +V (Operating)
SYMBOL
CONDITION
(0 - 100KBPS)
MIN TYP MAX UNITS
ICCOP (+V)
ICCOP (-V)
ICCOP (V1 )
No Load
No Load
No Load
+11
mA
mA
µA
µA
uA
uA
mA
mA
mA
mA
µA
µA
V
Supply Current -V (Operating)
Supply Current V1 (Operating)
Supply Current VREF (Operating)
Supply Current +V (Power Down)
Supply Current -V (Power Down)
Supply Current +V (During Short Circuit Test)
Supply Current -V (During Short Circuit Test)
Output Short Circuit Current (Output High)
Output Short Circuit Current (Output Low)
Input Current (Input High)
(0 - 100KBPS)
(0 - 100KBPS)
(0 - 100KBPS)
-11
500
500
475
ICCOP (VREF) No Load
ICCPD (+V)
ICCPD (-V)
ISC (+V)
ISC (-V)
IOHSC
IOLSC
IIH
STROBE = HIGH
STROBE = HIGH
-475
-150
+80
Short to Ground (See Note: 1)
150
-80
Short to Ground (See Note: 1)
Short to Ground VMIN =0 (See Note: 2 )
Short to Ground VMIN =0 (See Note: 2)
1.0
Input Current (Input Low)
IIL
-1.0
Input Voltage High
VIH
2.0
Input Voltage Low
VIL
0.5
V
Output Voltage High (Output to Ground)
VOH
No Load
No Load
(0 -100KBPS)
(0 -100KBPS)
(0-100KBPS)
+VREF
-.25
+VREF
+.25
V
Output Voltage Low (Output to Ground)
VOL
-VREF
-.25
-VREF
+.25
V
Output Voltage Null
Input Capacitance
VNULL
C IN
No Load
-250
+250
mV
pF
See Note 1
15
Note 1. Not tested, but characterized at initial device design and after major process and/or design change which affects this parameter.
Note 2. Interchangeability of force and sense is acceptable.
+V = +15V, -V = -15V, V1 = VREF = +5.0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
t R
CONDITION
MIN TYP MAX UNITS
Rise Time (AOUT, BOUT)
CA = C B = 75pF
See Figure 3.
See Figure 3.
See Figure 3.
See Figure 3.
1.0
1.0
2.0
2.0
3.0
3.0
µs
µs
µs
µs
Fall Time (AOUT, BOUT)
t F
CA = C B = 75pF
CA = C B = 75pF
CA = C B = 75pF
Propagtion Delay Input to Output
Propagtion Delay Input to Output
t PLH
t PHL
2.0V
50%
0.5V
2.0V
0.5V
DATA (A) 0V
50%
DATA (B) 0V
VREF
ADJUST
BY C A
+4.75V to +5.25V
AOUT 0V
ADJUST
BY C A
-VREF
+VREF
-4.75V to -5.25V
+4.75V to +5.25V
ADJUST
BY C B
t PHL
50%
BOUT 0V
ADJUST
BY C B
50%
-VREF
-4.75V to -5.25V
+9.5V to +10.5V
t PLH
HIGH
2VREF
t R
NULL
LOW
DIFFERENTIAL
OUTPUT 0V
(AOUT - BOUT)
-9.5V to -10.5V
-2VRE
t F
NOTE: OUTPUTS UNLOADED
Figure 3. SWITCHING WAVEFORMS
HOLT INTEGRATED CIRCUITS
4
HI-8382, HI-8383
HI-8382 PACKAGE THERMAL CHARACTERISTICS
MAXIMUM ARINC LOAD 7
SUPPLY CURRENT (mA) 2
Ta = 25 oC Ta = 85 oC Ta=125 oC
ARINC 429
DATA RATE
JUNCTION TEMP, Tj (°C)
1
PACKAGE STYLE
Ta = 25 oC
Ta = 85 oC Ta=125 oC
3
Low Speed
17.6
25.4
17.9
25.8
17.2
24.5
17.4
24.8
17.0
24.2
17.1
24.4
48
56
41
47
107
110
103
112
142
150
145
147
28 Lead PLCC
4
High Speed
Low Speed
High Speed
16 Lead Ceramic SB DIP
A OUT and B OUT Shorted to Ground 5, 6, 7
SUPPLY CURRENT (mA) 2
Ta = 25 oC Ta = 85 oC Ta=125 oC
ARINC 429
DATA RATE
JUNCTION TEMP, Tj (°C)
1
PACKAGE STYLE
Ta = 25 oC
Ta = 85 oC Ta=125 oC
3
60.1
63.1
62.1
64.0
55.7
56.3
56.2
56.2
52.4
52.3
53.0
52.2
110
157
150
145
144
194
182
180
176
Low Speed
28 Lead PLCC
4
100
High Speed
Low Speed
High Speed
90
16 Lead Ceramic SB DIP
86
Notes:
1. All data taken in still air on devices soldered to a single layer copper PCB (3" X 4.5" X .062").
2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.
3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.
4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30
as this is considered unrealistic for high speed operation.
5. Similar results would be obtained with AOUT shorted to BOUT.
6. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended .
7. Data will vary d epending on air flow and the method of heat sinking employed.
HI-8383 part numbers identical except the SMD version is not available.
NUMBER
HI-8382C
HI-8382CT
DESCRIPTION
RANGE
FLOW
IN
FINISH
GOLD
GOLD
16 PIN CERAMIC SIDE BRAZED DIP
16 PIN CERAMIC SIDE BRAZED DIP
-40°C TO +85°C
-55°C TO +125°C
-55°C TO +125°C
I
NO
NO
T
HI-8382CM-01 16 PIN CERAMIC SIDE BRAZED DIP
HI-8382CM-03* 16 PIN CERAMIC SIDE BRAZED DIP
M
YES SOLDER
-55°C TO +125°C DSCC YES SOLDER
HI-8382J
28 PIN PLASTIC J -LEAD PLCC
-40°C TO +85°C
-55°C TO +125°C
-40°C TO +85°C
-55°C TO +125°C
-55°C TO +125°C
-40°C TO +85°C
-55°C TO +125°C
I
T
I
NO SOLDER
NO SOLDER
HI-8382JT
HI-8382S
HI-8382ST
28 PIN PLASTIC J -LEAD PLCC
28 PIN CERAMIC LEADLESS CHIP CARRIER
28 PIN CERAMIC LEADLESS CHIP CARRIER
NO
NO
GOLD
GOLD
T
M
I
HI-8382SM-01 28 PIN CERAMIC LEADLESS CHIP CARRIER
YES SOLDER
NO SOLDER
NO SOLDER
HI-8382U
32 PIN J-LEAD CERQUAD
32 PIN J-LEAD CERQUAD
HI-8382UT
T
HOLT INTEGRATED CIRCUITS
5
HI-8382, HI-8383
4
3
2
1 28 27 26
29 28 27 26 25 24 23 22 21
N/C
DATA (A)
N/C
5
6
7
8
9
25 CLOCK
CLOCK
30
20
19
18
17
16
15
14
N/C
N/C
+V
GND
N/C
-V
HI-8382S 24 N/C
V1 31
HI-8382U
N/C 32
23 DATA (B)
VREF
STROBE
SYNC
1
2
3
4
N/C
22 C B
28 - PIN
CERAMIC
LCC
32 - PIN
CERQUAD
C A
21 N/C
N/C 10
N/C 11
20
19
N/C
N/C
N/C
N/C
5
6
7 8 9 10 11 12 13
12 13 14 15 16 17 18
VREF 1
16 V1
15 N/C
STROBE 2
HI-8382C
SYNC 3
DATA(A) 4
CA 5
14 CLOCK
13 DATA(B)
12 CB
16 - PIN
CERAMIC
DIP
AOUT 6
-V 7
11 BOUT
10 N/C
GND 8
9 +V
HOLT INTEGRATED CIRCUITS
6
HI-8382 PACKAGE DIMENSIONS
inches (millimeters)
16-PIN CERAMIC SIDE-BRAZED DIP
Package Type: 16C
.810 MAX
(20.574 MAX)
.295 ± .010
(7.493 ± .254)
.050 ± .005
(1.270 ± .127)
PIN 1
.200 MAX
(5.080 MAX)
.035 ± .010
(.889 ± .254)
BASE
PLANE
.010 ± .002
.125 MIN
(3.175 MIN )
(.254 ± .051)
SEATING
PLANE
.018 ± .002
.100 BSC
(2.540 BSC)
.300 ± .010
(7.620 ± .254)
(.457 ± .051)
28-PIN PLASTIC PLCC
Package Type: 28J
PIN NO. 1 IDENT
PIN NO. 1
.045 x 45°
.045 x 45°
.050 ± .005
(1.27 ± .127)
.453 ± .003
(11.506 ± .076)
SQ.
.490 ± .005
(12.446 ± .127)
SQ.
.031 ± .005
(.787 ± .127)
.017 ± .004
(.432 ± .102)
SEE DETAIL
A
.009
.011
.015 ± .002
(.381 ± .051)
.173 ± .008
(4.394 ± .203)
.020 MIN
(.508 MIN )
.025
.045
DETAIL A
R
.410 ± .020
(10.414 ± .508)
HOLT INTEGRATED CIRCUITS
7
HI-8382 PACKAGE DIMENSIONS
inches (millimeters)
28-PIN CERAMIC LEADLESS CHIP CARRIER
Package Type: 28S
.080 ± .020
(2.032 ± .508)
.020 INDEX
(.508 INDEX)
PIN 1
PIN 1
.050 ± .005
(1.270 ± .127)
.451 ± .009
(11.455 ± .229)
SQ.
.050 BSC
(1.270 BSC)
.008R ± .006
(.203R ± .152)
.025 ± .003
(.635 ± .076)
.040 x 45° 3PLS
(1.016 x 45° 3PLS)
32-PIN J-LEAD CERQUAD
Package Type: 32U
31
32
1
.450 ± .008
(11.430 ± .203)
.420 ± .012
(10.668 ± .305)
.488 ± .008
(12.395 ± .203)
2
.588 ± .008
(14.935 ± .203)
.550 ± .009
(13.970 ± .229)
.190 MAX.
(4.826) MAX.
.040 TYP.
(1.016) TYP.
.083 ± .009
(2.108 ± .229)
.019 ± .003
(.483 ± .076)
.050 TYP.
(1.270) TYP.
.520 ± .012
(13.208 ± .305)
HOLT INTEGRATED CIRCUITS
8
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