GL860 [GENESYS]

USB 2.0 PC Camera Controller; USB 2.0的PC摄像头控制器
GL860
型号: GL860
厂家: GENESYS LOGIC    GENESYS LOGIC
描述:

USB 2.0 PC Camera Controller
USB 2.0的PC摄像头控制器

控制器 PC
文件: 总24页 (文件大小:265K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Genesys Logic, Inc.  
GL860  
USB 2.0 PC Camera Controller  
Datasheet Revision 1.01  
Jan. 04, 2006  
GL860 USB 2.0 PC Camera Controller  
Copyright:  
Copyright © 2006 Genesys Logic Incorporated. All rights reserved. No part of the materials may be  
reproduced in any form or by any means without prior written consent of Genesys Logic Inc..  
Disclaimer:  
ALL MATERIALS ARE PROVIDED AS ISWITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY  
KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF  
GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND  
CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR  
EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND  
NON-INFRINGEMENT OF INTELLECTUAL PROPERTY. IN NO EVENT SHALL GENESYS LOGIC  
BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING  
FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS  
MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE  
MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE.  
Tr ademar ks:  
is a registrated trademark of Genesys Logic Inc..  
All trademarks are the properties of their respective owners.  
Of f i ce:  
Genesys Logic, Inc.  
12F, No. 205, Sec. 3, Beishin Rd., Shindian City,  
Taipei, Taiwan  
Tel: (886-2) 8913-1888  
Fax: (886-2) 6629-6168  
http ://www.genesyslogic.com  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 2  
GL860 USB 2.0 PC Camera Controller  
Revision History  
Revision  
Date  
Description  
0.10  
04/29/2004 First draft release  
1. Added Pin List and Pin Description in Chapter 3.  
05/25/2004 2. Changed Features contents in Chapter 2.  
0.20  
0.30  
0.40  
0.90  
3. Changed CCD/CMOS Sensor interface function description in Chapter 4.  
06/25/2004 Changed mass contents.  
1. Removed 32-pin QFN package.  
07/26/2004 2. Changed 64-pin name.  
3. Added 100-pin PQFP package  
11/10/2004 First draft release  
1. Modify pin list and description.  
2. Added and modify sensor register.  
09/27/2005 3. Remove pin 64 pin list and pin decription.  
4. Remove features Complies with USB Video Class specification rev.  
1.0.  
1. Add 48 pin assignment.  
01/04/2006 2. Add 48 pin Descriptions  
3. Add Application circuit  
1.00  
1.01  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 3  
GL860 USB 2.0 PC Camera Controller  
TABLE OF CONTENTS  
CHAPTER 1 GENERAL DESCRIPTION................................................. 6  
CHAPTER 2 FEATURES ........................................................................... 7  
CHAPTER 3 PIN ASSIGNMENT .............................................................. 8  
3.1 PINOUT.................................................................................................... 8  
3.2 PIN LIST ................................................................................................ 10  
3.3 PIN DESCRIPTIONS ................................................................................ 13  
CHAPTER 4 FUNCTIONAL DESCRIPTION........................................ 15  
4.1 FUNCTION BLOCK ................................................................................. 15  
4.2 OPERATION MODE ................................................................................ 16  
4.2.1 with Flash Memory....................................................................... 16  
4.2.2 without Flash Memory ................................................................. 16  
CHAPTER 5 ELECTRICAL CHARACTERISTICS.............................. 17  
5.1 MAXIMUM RATINGS.............................................................................. 17  
5.2 DC CHARACTERISTICS.......................................................................... 17  
CHAPTER 6 PACKAGE DIMENSION................................................... 18  
CHAPTER 7 ORDERING INFORMATION........................................... 22  
APPENDIX A. APPLICATION CIRCUIT................................................. 23  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 4  
GL860 USB 2.0 PC Camera Controller  
LIST OF FIGURES  
FIGURE 3.1 - 100 PIN QFP PINOUT DIAGRAM..................................................................8  
FIGURE 3.2 - 48 PIN LQFP/QFN/LQFN PINOUT DIAGRAM ............................................9  
FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................15  
FIGURE 6.1 - GL860 100 PIN QFP PACKAGE.................................................................18  
FIGURE 6.2 - GL860 48 PIN LQFP PACKAGE ................................................................19  
FIGURE 6.3 - GL860 48 PIN QFN PACKAGE...................................................................20  
FIGURE 6.4 - GL860 48 PIN LQFN PACKAGE................................................................21  
LIST OF TABLES  
TABLE 3.1 - 100-PIN QFP PIN LIST................................................................................11  
TABLE 3.2 - 48-PIN LQFP/QFN/LQFN PIN LIST ..........................................................12  
TABLE 3.3 - 100-PIN QFP PIN DESCRIPTIONS................................................................13  
TABLE 3.4 - 48-PIN LQFP/QFN/LQFN PIN DESCRIPTIONS ..........................................14  
TABLE 5.1 - MAXIMUM RATINGS ...................................................................................17  
TABLE 5.2 - DC CHARACTERISTICS EXCEPT USB SIGNALS...........................................17  
TABLE 7.1 - ORDERING INFORMATION...........................................................................22  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 5  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 1 GENERAL DESCRIPTION  
The GL860 is a high performance USB 2.0 controller for PC Camera application. With the Genesys Logics  
highly recognized self-developed USB high-speed transceiver, GL860 provides up to 480Mbps bandwidth for  
fulfilling the mass bandwidth demand of video transferring. GL860 also support USB isochronous mode to  
provide certain bandwidth to insure user can get satisfied usage experience on video application even running  
high bandwidth consumption devices concurrently.  
The GL860 integrates a highly flexible sensor interface to make it easily adopted with variety sensors in which  
include most popular CCD sensor module and CMOS sensors. The Gl860s low power consumption, low  
operation temperature characteristic also make it is easy to implement a high quality PC Camera without  
worry about the noise signals of sensors to affect by high performance USB controller.  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 6  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 2 FEATURES  
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USB specification compliance  
-
-
-
Complies with 480Mbps Universal Serial Bus specification rev. 2.0.  
Complies with 12Mbps Universal Serial Bus specification rev. 2.0..  
Support USB 2.0 Isochronous Video pipe to 24MB/s.  
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Sensor interface  
-
Programmable interface for popular general CCD module/CMOS sensor  
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Non-processing video streaming (USB High-speed connection)  
Support 4 USB endpoints  
-
-
-
-
Endpoint 0: Control PIPE.  
Endpoint 1: Isochronous/Bulk data in (configurable).  
Endpoint 2: Interrupt OUT.  
Endpoint 3: Interrupt IN.  
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Embedded 8052 micro-controller  
-
-
Operate @ 15 MHz clock.  
8K ROM.  
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Support firmware stored in external FLASH memory for development of customers firmware  
Support USB remote wakeup.  
Maximum 15 GPIO ports.  
3.3V/1.8V operation.  
3.3V to 1.8V regulator is built-in.  
Capability to support on-line download program  
Available in 100-pin QFP and 48-pin LQFP/QFN/LQFN package.  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 7  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 3 PIN ASSIGNMENT  
3.1 Pinout  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
AVDD33  
AVDD33  
RREF  
GND  
GND  
DP  
DM  
AVDD33  
GND  
GND  
DVDD  
GND  
81  
82  
83  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
CMS_DAT2  
CMS_DAT3  
CMS_DAT4  
CMS_DAT5  
GPIO10  
GPIO11  
FSH_DAT0/ICE_CLK  
FSH_DAT1/ICE_RST  
FSH_DAT2/INT0  
FSH_DAT3/INT1  
P24/FSH_ADR12  
P25/FSH_ADR13  
P26/FSH_ADR14  
P27/FSH_ADR15  
VSYNC  
GND  
DVDD  
P07/FSH_ADR7  
P06/FSH_ADR6  
NC  
GL860  
NC  
GPIO14  
EXTCPU  
GPIO13  
GPIO12  
HSYNC  
GND  
DVDD33  
QFP - 100  
Figure 3.1 - 100 Pin QFP Pinout Diagram  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 8  
GL860 USB 2.0 PC Camera Controller  
Figure 3.2 - 48 Pin LQFP/QFN/LQFN Pinout Diagram  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 9  
GL860 USB 2.0 PC Camera Controller  
3.2 Pin List  
Three type packages:  
Case 1  
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l
l
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100 pin  
w/ICE and flash memory  
10 bit sensor interface  
15 GPIO pins  
QFP package  
Case 2  
l
l
l
l
48 pin  
8 bit sensor interface  
12 GPIO pins  
LQFP/QFN/LQFN package  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 10  
GL860 USB 2.0 PC Camera Controller  
Table 3.1 - 100-Pin QFP Pin List  
Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type  
1
2
3
4
5
NC  
-
I
I
I
I
26 GND  
27 DVDD  
28 NC  
P
P
-
51 NC  
-
-
76 TEST  
I
CMS_DAT6  
CMS_DAT7  
CMS_DAT8  
CMS_DAT9  
52 NC  
77 DVDD  
78 GND  
P
P
P
P
53 DVDD33  
54 X1  
P
I
29 NC  
-
79 DVDD33  
30 HRST_  
I
55 X2  
I/O 80 NC  
6
7
8
9
FSH_OEB  
FSH_WEB  
I
I
31 GPIO12  
32 GPIO13  
I/O 56 GND  
P
81 DVDD  
P
P
I
I/O 57 GPIO4  
I/O 82 GND  
I/O 83 CMS_DAT2  
I/O 84 CMS_DAT3  
FSH_ADR0 I/O 33 EXTCPU  
FSH_ADR1 I/O 34 GPIO14  
I
58 GPIO5  
I/O 59 GPIO6  
I
10 GPIO0  
11 GPIO1  
I/O 35 NC  
I/O 36 NC  
-
-
60 GPIO7  
61 GPIO8  
I/O 85 CMS_DAT4  
I/O 86 CMS_DAT5  
I
I
12 GPIO2  
I/O 37 FSH_ADR6 I/O 62 GPIO9  
I/O 87 GPIO10  
I/O  
I/O  
13 GPIO3  
I/O 38 FSH_ADR7 I/O 63 FSH_DAT4 I/O 88 GPIO11  
14 FSH_ADR2 I/O 39 DVDD  
15 FSH_ADR3 I/O 40 GND  
16 FSH_ADR4 I/O 41 GND  
17 FSH_ADR5 I/O 42 GND  
P
P
P
P
P
64 FSH_DAT5 I/O 89 FSH_DAT0 I/O  
65 NC  
66 NC  
-
-
90 FSH_DAT1 I/O  
91 FSH_DAT2 I/O  
67 FSH_DAT6 I/O 92 FSH_DAT3 I/O  
68 FSH_DAT7 I/O 93 FSH_ADR12 I/O  
18 NC  
-
-
I
I
-
-
43 AVDD33  
44 DM  
19 NC  
I/O 69 NC  
I/O 70 NC  
-
-
94 FSH_ADR13 I/O  
95 FSH_ADR14 I/O  
20 CMS_DAT0  
21 CMS_DAT1  
22 NC  
45 DP  
46 GND  
47 GND  
48 RREF  
P
P
71 FSH_ADR8 I/O 96 FSH_ADR15 I/O  
72 FSH_ADR9 I/O 97 VSYNC  
73 FSH_ADR10 I/O 98 HSYNC  
74 FSH_ADR11 I/O 99 GND  
I
I
23 NC  
A
24 NC  
25 NC  
-
-
49 AVDD33  
50 AVDD33  
P
P
P
P
75 CMS_CLK  
I/O 100 DVDD33  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 11  
GL860 USB 2.0 PC Camera Controller  
Table 3.2 - 48-Pin LQFP/QFN/LQFN Pin List  
Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type  
1
2
3
4
5
6
7
8
9
DVDD33  
CMS_DAT6  
CMS_DAT7  
CMS_DAT8  
CMS_DAT9  
GPIO0  
P
I
13 HRST_  
14 GPIO13  
15 GPIO14  
16 DVDD  
17 GND  
I
25 DVDD33  
P
I
37 DVDD  
38 GND  
P
P
I/O 26 X1  
I/O 27 X2  
I
I/O 39 DVDD33  
40 DVDD  
P
I
P
P
P
P
28 GND  
P
P
I
29 GPIO4  
30 GPIO5  
31 GPIO6  
I/O 41 GND  
P
I/O 18 GND  
I/O 19 AVDD33  
I/O 20 DM  
I/O 21 DP  
I/O 42 CMS_DAT2  
I/O 43 CMS_DAT3  
I/O 44 CMS_DAT4  
I/O 45 CMS_DAT5  
I/O 46 VSYNC  
I
GPIO1  
I
GPIO2  
I/O 32 GPIO7  
I/O 33 GPIO8  
I
GPIO3  
I
10 CMS_DAT1 I/O 22 GND  
P
A
P
34 GPIO9  
35 CMS_CLK  
36 TEST  
I/O  
I/O  
P
11 GND  
P
P
23 RREF  
I/O 47 HSYNC  
12 DVDD  
24 AVDD33  
I
48 GND  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 12  
GL860 USB 2.0 PC Camera Controller  
3.3 Pin Descriptions  
Table 3.3 - 100-Pin QFP Pin Descriptions  
Pin Name  
Pin#  
Type  
Description  
DVDD  
27,39,77,81  
P
1.8V core power  
20,21,83~86,  
2~5  
CMS_DAT0~9  
I
Sensor data bit 0~9  
Read strobe of Output enable for flash memory. Low active  
Write strobe of Write enable for flash memory. Low active  
FSH_OEB  
6
7
I
I
FSH_WEB  
8,9,14~17,  
FSH_ADR0~15 37,38,71~74  
, 93~96  
I/O  
Port 0 and Port 2 for Address of flash memory  
GPIO pins bit 0~14  
I/O  
(pd)  
10~13,57~62,  
GPIO0~14  
87,88,31,32,34  
26,40,41,42,  
GND  
46,47,56,78,  
82,99  
P
Ground  
I
HRST_  
30  
Hardware reset, low active  
(pu)  
EXTCPU  
AVDD33  
DM  
33  
43,49,50  
44  
I
P
Use external CPU mode for firmware development.  
3.3V analog power  
USB D-  
I/O  
I/O  
A
DP  
45  
USB D+  
RREF  
DVDD33  
X1  
48  
Reference R  
3.3V power  
53,79,100  
54  
P
I
12M crystal in  
12M crystal out  
X2  
55  
I/O  
89,90,91,92,  
63,64,67,68  
FSH_DAT0~7  
CMS_CLK  
TEST  
I/O  
Data bus of flash memory  
Sensor clock  
75  
76  
97  
I/O  
I
(pd)  
I/O  
I/O  
Test mode  
VSYNC  
HSYNC  
Sensor Vsync  
Sensor Hsync  
98  
1,18,19,22~25,  
28,29,35,36,  
51,52,65,66,  
69,70,80  
NC  
-
No connection  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 13  
GL860 USB 2.0 PC Camera Controller  
Table 3.4 - 48-Pin LQFP/QFN/LQFN Pin Descriptions  
Pin Name  
DVDD  
Pin#  
Type  
Description  
12,16,37,40  
10,42~45,2~5  
P
I
1.8V power for crystal  
Sensor data bit 1~9  
CMS_DAT1~9  
GPIO0~9,13,14  
I/O  
(pd)  
6~9,29~34,  
14,15  
GPIO pins bit 0~9,13,14  
11,17,18,22,  
28,38,41,48  
GND  
P
Ground  
DVDD33  
HRST  
1,25,39  
P
3.3V core power  
Hardware reset, low active  
I
13  
(pu)  
AVDD33  
DM  
19,24  
20  
P
I/O  
I/O  
A
3.3V analog power  
USB D-  
DP  
21  
USB D+  
RREF  
X1  
23  
Reference R  
12M crystal in  
12M crystal out  
Sensor clock  
26  
I
X2  
27  
I/O  
I/O  
CMS_CLK  
35  
I
TEST  
36  
Test mode  
(pd)  
VSYNC  
HSYNC  
NC  
46  
47  
10  
I/O  
I/O  
-
Sensor Vsync  
Sensor Hsync  
No connection  
Notation:  
Type  
O
Output  
Input  
I
B
Bi-directional  
B/I  
B/O  
P
Bi-directional, default input  
Bi-directional, default output  
Power / Ground  
A
Analog  
pu  
pd  
odpu  
Internal pull up  
Internal pull down  
Open drain with internal pull up  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 14  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 4 FUNCTIONAL DESCRIPTION  
4.1 Function Block  
CCD/CMOS  
Sensor I/F  
USB 2.0  
PHY  
TXFIFO  
PIE  
CPU  
8052  
Figure 4.1 - Block Diagram  
CCD Module/CMOS Sensor Interface  
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GL860 can link with popular CMOS sensor on market for PC camera application. GL860 can be  
configured by different sensor requirement. If sensor is acting as master, GL860 can accept  
HSYNC/VSYNC from sensor. If GL860 is configured as a master HSYNC/VSYNC will be provided by  
GL860 to sensor. GL860 keep the most flexibility to fit most of the sensors. The detail of configuration  
needs to refer to GL860 Application Note. For most sensors no matter of YUV format or RGB format,  
they can be easily transferred image data to PC by GL860.  
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TXFIFO  
GL860 build in 6K byte internal buffer for USB high bandwidth application. This 6K internal buffer can  
be used as transmitted buffer of isochronous pipe or bulk pipe. In USB specification, the highest  
bandwidth of isochronous pipe is 24M byte/second, that can be easily derived to maximum frame rate  
depending on configuration. For example, frame rate can be easily achieved to 30 frames per second if  
image size is 640 x 480 if raw data output and sensor clock is 15M.  
PIE  
PIE handles the USB protocol defined in chapter 8 of USB specification Revision 2.0. It co-works with  
CPU to play the role of the chips kernel. The main functions of PIE include the state machine of USB  
protocol flow, CRC check, PID error check, and timeout check. Unlike USB1.1, bit stuffing/de-stuffing  
is implemented in UTMI, not in PIE.  
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USB 2.0 PHY (UTMI )  
UTMI handles the low level USB protocol and signaling. Its designed based on the Intels UTMI  
specification 1.01. The major functions of UTMI logic are to handle the data and clock recovery, NRZI  
encoding/decoding, Bit stuffing /de-stuffing, supporting USB2.0 test modes, and serial/parallel conversion.  
CPU  
CPU is the micro-processor unit of GL860. It is an 8-bit 8052 processor with 8K ROM and 256 bytes  
RAM. It operates at 15Mhz clock to decode the USB command issued from host and then prepares the  
data to respond to the host. In addition, μC can handle GPIO (general purpose I/O) settings and  
reading content of EEPROM to support high flexibility for customers of different configurations of chip.  
These configurations include self/bus power mode setting, individual/gang mode setting, downstream  
port number setting, device removable/non-removable setting, and PID/VID setting.  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 15  
GL860 USB 2.0 PC Camera Controller  
4.2 Operation Mode  
For customized firmware, flash memory can use as external program memory of CPU. This is for customer to  
develop their firmware. This is only available for 100-pin package type.  
4.2.1 with Flash Memory  
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Only available in 100-pin QFP package  
Force EXTCPU = 0  
GPIO9 pull down  
GPIO13/GPIO14 used as serial bus to configure sensor  
4.2.2 without Flash Memory  
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If 100 pin, set EXTCPU = 0  
GPIO9 pull down  
GPIO13/GPIO14 are used as serial bus to configure sensor  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 16  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 5 ELECTRICAL CHARACTERISTICS  
5.1 Maximum Ratings  
Table 5.1 - Maximum Ratings  
Parameter  
Symbol  
Min.  
3.0  
0
Max.  
3.6  
Unit  
V
oC  
VIN  
TA  
3.3V Input Voltage  
Ambient Temperature under bias  
+100  
FOSC Frequency  
12 MHz ± 500ppm  
5.2 DC Characteristics  
Table 5.2 - DC Characteristics Except USB Signals  
Symbol  
PD  
Parameter  
Min.  
-
Typ.  
Max.  
-
Unit  
Power Dissipation  
-
mA  
V
VDD  
VIL  
Power Supply Voltage  
3
3.3  
3.6  
0.9  
-
LOW level input voltage  
HIGH level input voltage  
-
-
V
VIH  
2.0  
1.36  
1.36  
-
-
1.48  
1.48  
-
V
VTLH LOW to HIGH threshold voltage  
VTHL HIGH to LOW threshold voltage  
1.62  
1.62  
0.4  
-
V
V
VOL  
VOH  
LOW level output voltage when IOL=8mA  
HIGH level output voltage when IOH=8mA  
V
2.4  
-
V
Leakage current for pads with internal pull up or pull  
down resistor  
IOLK  
-
-
-
mA  
RDN  
RUP  
Pad internal pull down resister  
Pad internal pull up resister  
-
-
-
-
-
-
Ω
Ω
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 17  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 6 PACKAGE DIMENSION  
D
D1  
D2  
-D-  
A
A2  
A1  
51  
102  
103  
50  
Green  
Package  
-A-  
-B-  
Internal  
No.  
GL860  
Code  
No.  
AAAAAAAGAA  
YWWXXXXXXXX  
Date Code  
Lot Code  
31  
4X  
100  
aaa C A-B D  
bbb H A-B D  
30  
1
c
4X  
ddd M C A-B s D s  
e
b
SEE  
DETAIL "F"  
-
01  
-
0
-C- SEATING PLANE  
ccc  
C
02  
-
CONTROL DIMENSIONS ARE IN MILLIMETERS.  
MILLIMETER  
MIN. NOM. MAX. MIN. NOM. MAX.  
3.40 0.134  
INCH  
SYMBOL  
R1  
R2  
A
A1  
A2  
D
0.25  
2.50  
0.010  
2.72 2.90 0.098 0.107 0.114  
23.20 BASIC  
17.20 BASIC  
20.00 BASIC  
14.00 BASIC  
18.85 BASIC  
12.35 BASIC  
0.913 BASIC  
0.677 BASIC  
0.787 BASIC  
0.551 BASIC  
0.742 BASIC  
0.486 BASIC  
GAGE PLANE  
E
S
L
D1  
E1  
D2  
E2  
R1  
R2  
0.25 mm  
0-3  
L1  
DETAIL "F"  
0.13  
0.005  
0.13  
0
0
0.30 0.005  
0.012  
7
NOTES :  
-
0
7
0
0
-
DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD  
PROTRUSION. ALLOWABLE PROTRUSION IS 0.25  
mm PER SIDE. D1 AND E1 ARE MAXIMUM  
PLASTIC BODY SIZE DIMENSIONS INCLUDING  
MOLD MISMATCH.  
01  
1.  
2.  
0-2  
15 REF  
15 REF  
15 REF  
15 REF  
-
03  
c
L
0.11 0.15 0.23 0.004 0.006 0.009  
0.73 0.88 1.03 0.029 0.035 0.041  
L1  
S
b
1.60 REF  
0.063 REF  
0.008  
0.22 0.30 0.38 0.009 0.012 0.015  
0.65 BASIC 0.026 BASIC  
TOLERANCES OF FORM AND POSITION  
DIMENSION b DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
0.20  
PROTRUSION SHALL NOT CAUSE THE LEAD  
WIDTH TO EXCEED THE MAXIMUM b DIMENSION  
BY MORE THAN 0.08mm. DAMBAR CAN NOT BE  
LOCATED ON THE LOWER RADIUS OR THE FOOT.  
MINIMUM SPACE BETWEEN PROTRUSION AND  
AN ADJACENT LEAD IS 0.07mm.  
e
aaa  
bbb  
ccc  
0.25  
0.20  
0.13  
0.010  
0.008  
0.005  
ddd  
0.10  
0.004  
Figure 6.1 - GL860 100 Pin QFP Package  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 18  
GL860 USB 2.0 PC Camera Controller  
D
D1  
D2  
A
A2  
D
A1  
25  
36  
37  
24  
Green  
Package  
Internal  
No.  
B
A
GL860  
AAAAAAAGAA  
Code  
No.  
YWWXXXXXXXX  
Date Code  
Lot Code  
48  
13  
4X  
aaa C A B D  
1
12  
4X  
bbb H A B D  
e
c
b
s s  
D
ddd M C A  
B
-
01  
-
0
SEATING  
PLANE  
C
ccc  
C
CONTROL DIMENSIONS ARE IN MILLIMETERS.  
MILLIMETER  
MIN. NOM. MAX. MIN. NOM. MAX.  
INCH  
SYMBOL  
02  
-
A
1.60  
0.063  
0.006  
R1  
R2  
A1  
A2  
D
0.05  
1.35  
0.15 0.002  
1.40  
1.45 0.053 0.055 0.057  
0.354 BASIC  
0.354 BASIC  
0.276 BASIC  
0.276 BASIC  
0.217 BASIC  
0.217 BASIC  
0.003  
9.00 BASIC  
9.00 BASIC  
7.00 BASIC  
7.00 BASIC  
5.50 BASIC  
5.50 BASIC  
H
E
GAGE PLANE  
D1  
E1  
D2  
E2  
R1  
R2  
0.25mm  
S
L
03  
-
0.08  
0.08  
0°  
0.20 0.003  
7°  
0.008  
7°  
-
0
3.5°  
0°  
0°  
11°  
3.5°  
-
01  
0°  
NOTES :  
02  
-
11°  
11°  
0.09  
0.45  
12°  
12°  
13°  
13°  
0.20 0.004  
0.75 0.018 0.024 0.030  
0.039 REF  
12°  
12°  
13°  
13°  
0.008  
-
03  
11°  
1. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD  
c
PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 mm  
PER SIDE. D1 AND E1 ARE MAXIMUM PLASTIC BODY  
SIZE DIMENSIONS INCLUDING MOLD MISMATCH.  
L
L1  
S
b
e
0.60  
1.00 REF  
0.20  
0.17  
0.008  
0.20  
0.50 BASIC  
0.27 0.007 0.008 0.011  
0.020 BASIC  
2.  
DIMENSION b DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION  
SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED THE  
MAXIMUM b DIMENSION BY MORE THAN 0.08mm.  
DAMBAR CAN NOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN  
PROTRUSION AND AN ADJACENT LEAD IS 0.07mm.  
TOLERANCES OF FORM AND POSITION  
aaa  
bbb  
ccc  
ddd  
0.20  
0.20  
0.08  
0.08  
0.008  
0.008  
0.003  
0.003  
Figure 6.2 - GL860 48 Pin LQFP Package  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 19  
GL860 USB 2.0 PC Camera Controller  
Figure 6.3 - GL860 48 Pin QFN Package  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 20  
GL860 USB 2.0 PC Camera Controller  
Figure 6.4 - GL860 48 Pin LQFN Package  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 21  
GL860 USB 2.0 PC Camera Controller  
CHAPTER 7 ORDERING INFORMATION  
Table 7.1 - Ordering Information  
Part Number  
GL860  
Package  
100-pin QFP  
Status  
GL860  
48-pin LQFP/QFN/LQFN  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 22  
GL860 USB 2.0 PC Camera Controller  
Appendix A. Application circuit  
The schematic below represents a very basic example to the controller and is subject to variations depending  
on application intentions.  
Y1  
VDD1_8  
VDD3_3  
C3  
12MHz  
R1 1M  
C1 0.1uF  
VDD3_3  
C4  
C5  
0.1u  
C2 0.1uF  
20p  
20p  
U1  
VDD3_3  
C7  
VDD1_8  
81  
82  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
DVDD8  
DGND8  
CMS_DAT2  
CMS_DAT3  
CMS_DAT4  
CMS_DAT5  
GPIO10  
GPIO11  
FSH_DAT0-ICE_CLK  
FSH_DAT1-ICE_RST_  
FSH_DAT2-INT0_  
FSH_DAT3-INT1_  
P24-FSH_ADR12  
P25-FSH_ADR13  
P26-FSH_ADR14  
P27-FSH_ADR15  
VSYNC  
AVDD4_1  
AVDD4  
RREF  
AGND4_1  
AGND4  
DP  
C6  
C8  
0.1uF  
CMS_DAT2 83  
CMS_DAT3 84  
CMS_DAT4 85  
CMS_DAT5 86  
R2 720(1%)  
DP  
0.1u 0.1u  
GPIO10  
GPIO11  
FSH_DAT0  
FSH_DAT1  
FSH_DAT2  
FSH_DAT3  
87  
88  
89  
90  
91  
92  
DM  
VDD3_3  
DM  
AVDD3  
AGND3  
DGND2_1  
DGND2  
DVDD2  
GL860_QFP_100  
VDD1_8  
FSH_ADR12 93  
FSH_ADR13 94  
FSH_ADR14 95  
FSH_ADR15 96  
38 FSH_ADR7  
37 FSH_ADR6  
C9  
P07-FSH_ADR7  
P06-FSH_ADR6  
NC11  
C10  
0.1u  
36  
35  
34  
33  
32  
31  
0.1u  
NC10  
GPIO14  
EXTCPU  
GPIO13  
VSYNC  
HSYNC  
97  
98  
99  
GPIO14  
EXCPU  
GPIO13  
HSYNC  
DGND9  
DVDD9  
100  
VDD3_3  
GPIO12  
C11  
0.1uF  
VDD3_3  
GPIO13 R3 4.7K  
VDD3_3  
GPIO14 R4 4.7K  
GL860_QFP100  
VDD3_3  
R5 20K  
C12  
0.1uF  
R6 240K  
VDD1_8  
C13  
0.1uF  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 23  
GL860 USB 2.0 PC Camera Controller  
VDD1_8 VDD3_3  
VDD1_8  
C3  
C1  
0.1uF  
C2  
0.1uF  
0.1uF  
U1  
VDD3_3  
C4  
1
2
3
4
5
6
7
8
9
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
DVDD9  
TEST  
CMS_CLK  
GPIO9  
GPIO8  
GPIO7  
CMS_DAT6  
CMS_DAT7  
CMS_DAT8  
CMS_DAT9  
CMS_CLK  
GPIO9  
GPIO8  
GPIO7  
GPIO6  
GPIO5  
GPIO4  
CMS_DAT6  
CMS_DAT7  
CMS_DAT8  
CMS_DAT9  
GPIO0  
GPIO1  
GPIO2  
0.1uF  
GPIO6  
GPIO5  
GPIO4  
DGND5  
X2  
GPIO1  
GPIO2  
GPIO3  
GL860_LQFP/QFN/LQFN_48  
GPIO3  
VDD1_8  
10  
11  
12  
CMS_DAT1  
DGND1  
DVDD1  
Y1  
X1  
DVDD5  
VDD3_3  
C5  
0.1uF  
12MHz  
R1  
1M  
C6  
C7  
C8  
0.1uF  
20p  
20p  
VDD3_3  
GL860_LQFP48  
VDD3_3  
C9  
GPIO13 R2 10K  
VDD3_3  
GPIO14 R4 10K  
VDD3_3  
R3  
R6  
20K  
C10  
R5  
720R (1%)  
0.1uF  
0.1uF  
VDD1_8  
C11  
VDD3_3  
C12  
240K  
0.1uF  
0.1uF  
©2000-2006 Genesys Logic Inc. - All rights reserved.  
Page 24  

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