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MB88151APNF-G-801-JNEFE1

更新时间：2024-09-18 06:45:59

品牌：FUJITSU

描述：Spread Spectrum Clock Generator

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MB88151APNF-G-801-JNEFE1 概述

Spread Spectrum Clock Generator 扩频时钟发生器

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FUJITSU SEMICONDUCTOR

DATA SHEET

DS04-29127-1E

ASSP

Spread Spectrum Clock Generator

MB88151A

■ DESCRIPTION

MB88151A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary

radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with

the internal modulator. It corresponds to both of the center spread which modulates frequency in modulation off

as Middle Centered and down spread which modulates so as not to exceed frequency in modulation off.

■ FEATURES

MB88151A-

100/101

(multiply-by-1)

MB88151A-

200/201

(multiply-by-2)

MB88151A-

400/401

(multiply-by-4)

MB88151A-

500/501

(multiply-by-1/2)

MB88151A-

800/801

(multiply-by-8)

Input

frequency/

Output

16.6 MHz to 33.4 MHz/ 16.6 MHz to 33.4 MHz/ 16.6 MHz to 33.4 MHz/ 16.6 MHz to 33.4 MHz/

16.6 MHz to 33.4 MHz 33.2 MHz to 66.8 MHz 66.4 MHz to 133.6 MHz 8.3 MHz to 16.7 MHz

8.3 MHz to 16.7 MHz

66.4 MHz to 133.6 MHz

frequency

Modulation

clock

cycle-cycle

jitter

Less than100 ps

Less than 100 ps

Less than 150 ps

Less than 200 ps

Less than 150 ps

• Modulation rate : 0.5%, 1.5% (Center spread), − 1.0%, − 3.0% (Down spread)

• Equipped with oscillation circuit : Range of oscillation 8.3 MHz to 33.4 MHz

• Modulation clock output Duty : 40% to 60%

• Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load)

• Power supply voltage : 3.3 V 0.3 V

• Operating temperature : − 40 °C to + 85 °C

• Package : SOP 8-pin

MB88151A

■ PRODUCT LINEUP

MB88151A has five kinds of multiplication type.

Product

Input frequency range

16.6 MHz to 33.4 MHz

8.3 MHz to 16.7 MHz

Multiplier ratio

Multiply-by-1

Multiply-by-2

Multiply-by-4

Multiply-by-1/2

Multiply-by-8

Output frequency range

16.6 MHz to 33.4 MHz

33.2 MHz to 66.8 MHz

66.4 MHz to 133.6 MHz

8.3 MHz to 16.7 MHz

66.4 MHz to 133.6 MHz

MB88151A-100/101

MB88151A-200/201

MB88151A-400/401

MB88151A-500/501

MB88151A-800/801

■ PIN ASSIGNMENT

TOP VIEW

XIN

XOUT

VDD

MB88151A

SEL0

SEL1

ENS/XPD

CKOUT

FPT-8P-M02

■ PIN DESCRIPTION

Pin name

XIN

I/O

Pin no.

Description

Resonator connection pin/clock input pin

GND pin

V^SS

⎯

SEL0

SEL1

CKOUT

Modulation rate setting pin

Modulated clock output pin

Modulation enable setting pin (with pull-up resistance)/

Power down pin (with pull-up resistor)*

ENS/XPD

V^DD

⎯

Power supply voltage pin

Resonator connection pin

XOUT

* : XPD = 800 kΩ pull-up resistor at “L”

MB88151A

■ I/O CIRCUIT TYPE

Circuit type

Remarks

CMOS hysteresis input

SEL0,

SEL1

CMOS hysteresis input with 50 kΩ +

800 kΩ (Typ) pull-up resistors

50 kΩ

800 kΩ

Note : If “L” is input to XPD when the

XPD function is selected, 50 kΩ

pull-up resistor is disconnected.

ENS

• CMOS output

• IOL = 4 mA

CKOUT

Note : For XIN and XOUT pins, refer to “■OSCILLATION CIRCUIT”.

MB88151A

■ HANDLING DEVICES

Preventing Latch-up

A latch-up can occur if, on this device, (a) a voltage higher than V^DDor a voltage lower than VSS is applied to an

input or output pin or (b) a voltage higher than the rating is applied between VDD pin and VSS pin. The latch-up,

if it occurs, significantly increases the power supply current and may cause thermal destruction of an element.

When you use this device, be very careful not to exceed the maximum rating.

Handling unused pins

Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or

pull-down resistor.

Unused output pin should be opened.

The attention when the external clock is used

Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.

Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.

Power supply pins

Please design connecting the power supply pin of this device by as low impedance as possible from the current

supply source.

We recommend connecting electrolytic capacitor (about 10 µF) and the ceramic capacitor (about 0.01 µF) in

parallel between V^SSpin and VDD pin near the device, as a bypass capacitor.

Oscillation circuit

Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that

electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring.

Design the printed circuit board that surrounds the XIN and XOUT pins with ground.

MB88151A

■ BLOCK DIAGRAM

VDD

Modulation rate

setting

SEL1

SEL0

Modulation rate

setting

PLL block

CKOUT

Modulation enable setting/

Power down setting

Modulation

clock output

ENS/XPD

XOUT

Reference clock

XIN

Rf = 1 MΩ

V^SS

−

Charge

pump

Phase

compare

V/I

conversion

IDAC

ICO

Modulation clock

output

−

Reference clock

Loop filter

−

Modulation

rate setting/

Modulation

Modulation logic

enable setting

MB88151A PLL block

A glitchless IDAC (current output D/A converter) provides precise modulation,

thereby dramatically reducing EMI.

MB88151A

■ PIN SETTING

When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization

wait time for the modulation clock take the maximum value of “■ ELECTRICAL CHARACTERISTICS • AC

Characteristics Lock-up time”.

ENS modulation enable setting (MB88151A-100/200/400/500/800)

ENS

Modulation

No modulation

Modulation

Note : Spectrum does not spread when “L” is set to ENS. The clock with low jitter can be obtained. Because of ENS

has Pull-up resistance, spectrum spread when “H” is set to it or open the terminal.

XPD Power down setting (MB88151A-101/201/401/501/801)

XPD

Status

Power down Status

Operating status

Note : CKOUT of output pins are fixed to “L” output during power down.

SEL0, SEL1 Modulation rate setting

SEL1

SEL0

Modulation rate

1.5%

Modulation type

Center spread

Down spread

0.5%

− 1.0%

− 3.0%

Note : The modulation rate can be changed at the level of the terminal.

MB88151A

• Center spread

Spectrum is spread (modulated) by centering on the frequency in modulation off.

Modulation width 3.0%

Radiation level

−1.5%

+1.5%

Frequency

Frequency in modulation off

Center spread example of 1.5% modulation rate

• Down spread

Spectrum is spread (modulated) below the frequency in modulation off.

Modulation width 3.0%

Radiation level

−3.0%

Frequency

Frequency in modulation off

Down spread example of − 3.0% modulation rate

MB88151A

■ ABSOLUTE MAXIMUM RATINGS

Rating

Parameter

Symbol

Unit

Min

Max

+ 4.0

Power supply voltage*

Input voltage*

V^DD

− 0.5

VSS − 0.5

VDD + 0.5

+ 125

Output voltage*

V^O

VSS − 0.5

Storage temperature

Operation junction temperature

Output current

T^ST

− 55

°C

− 40

+ 125

I^O

− 14

+ 14

Overshoot

V^IOVER

VIUNDER

⎯

VDD + 1.0 (tOVER ≤ 50 ns)

⎯

Undershoot

VSS−1.0 (tUNDER ≤ 50 ns)

* : The parameter is based on VSS = 0.0 V.

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

Overshoot/Undershoot

t^UNDER≤ 50 ns

V^IOVER≤ VDD + 1.0 V

VDD

Input pin

VSS

V^IUNDER≤ VSS − 1.0 V

t^OVER≤ 50 ns

MB88151A

■ RECOMMENDED OPERATING CONDITIONS

(VSS = 0.0 V)

Value

Typ

3.3

Parameter

Symbol

Conditions

Unit

Max

Min

3.0

Power supply voltage

“H” level input voltage

V^DD

VDD

⎯

3.6

VIH

XIN,

SEL0,

SEL1,

ENS

V^DD× 0.8

⎯

VDD + 0.3

“L” level input voltage

V^IL

⎯

VSS

⎯

VDD × 0.2

Input clock

duty cycle

8.3 MHz to

33.4 MHz

t^DCI

XIN

Operating temperature

⎯

− 40

⎯

+ 85

°C

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

FUJITSU representatives beforehand.

Input clock duty cycle (tDCI = tb/ta)

1.5 V

XIN

MB88151A

■ ELECTRICAL CHARACTERISTICS

• DC Characteristics

(Ta = − 40 °C to + 85 °C, V^DD= 3.3 V 0.3 V, VSS = 0.0 V)

Value

Parameter

Symbol

Conditions

Unit

Min

Typ

Max

Noloadcapacitanceat

output 24 MHz

⎯

5.0

7.0

MB88151A-100

Power supply current

I^CC

VDD

At power down

MB88151A-101

⎯

µA

“H” level output,

I^OH= − 4 mA

V^OH

V^DD− 0.5

⎯

VDD

Output voltage

CKOUT

“L” level output,

V^OL

Z^O

V^SS

⎯

0.4

I^OL= 4 mA

Output impedance

Input capacitance

CKOUT 8.3 MHz to 133.6 MHz

⎯

Ω

XIN,

Ta = + 25 °C,

SEL0,

C^IN

V^DD= VI = 0.0 V,

SEL1,

⎯

f = 1 MHz

ENS

8.3 MHz to 66.8 MHz

CKOUT 66.8 MHz to 100 MHz

100 MHz to 133.6 MHz

⎯

Load capacitance

C^L

⎯

R^PUE

R^PUP

ENS

XPD

VIL = 0.0 V

500

200

1200

Input pull-up resistance

kΩ

800

MB88151A

• AC Characteristics

(Ta = − 40 °C to + 85 °C, V^DD= 3.3 V 0.3 V, VSS = 0.0 V)

Value

Parameter

Symbol

Conditions

Unit

Min

Typ

Max

XIN,

XOUT

Fundamental

oscillation

Oscillation frequency

f^x

8.3

⎯

33.4

MHz

External clock input

(multiply-by-1, 2, 4,

divided by 2)

16.6

⎯

33.4

Input frequency

fⁱⁿ

XIN

MHz

External clock input

(multiply-by-8)

8.3

16.6

33.2

66.4

8.3

⎯

16.7

33.4

MB88151A-100/101

(Multiply by 1)

MB88151A-200/201

(Multiply by 2)

66.8

MB88151A-400/401

(Multiply by 4)

Output frequency

f^OUT

CKOUT

133.6

16.7

MHz

MB88151A-500/501

(2-frequency division)

MB88151A-800/801

(multiply-by-8)

66.4

133.6

0.4 V to 2.4 V

Load capacitance 15 pF

Output slew rate

CKOUT

0.4

⎯

4.0

V/ns

Output clock duty cycle

t^DCC

1.5 V

MB88151A-100/101,

MB88151A-200/201,

MB88151A-400/401,

MB88151A-500/501

fin/2200 fin/1900 fin/1600

kHz

(clks)

Modulation period

(Number of input clocks

per modulation)

(2200)

(1900)

(1600)

f^MOD

(nMOD)

CKOUT

fin/880

(880)

fin/760

(760)

fin/640

(640)

kHz

(clks)

MB88151A-800/801

8.3 MHz to 80 MHz

⎯

Lock-up time

t^LK

80 MHz to 133.6 MHz

MB88151A-100/101,

MB88151A-200/201

No load capacitance,

Ta = + 25 °C, V^DD= 3.3 V

⎯

100

MB88151A-400/401,

Cycle-cycle jitter

t^JC

CKOUT MB88151A-800/801

No load capacitance,

ps-rms

⎯

150

200

Ta = + 25 °C, V^DD= 3.3 V

MB88151A-500/501

No load capacitance,

Ta = + 25 °C, V^DD= 3.3 V

Note : The modulation clock stabilization wait time is required after the power is turned on, the IC recovers from

power saving, or after FREQ (frequency range) or ENS (modulation ON/OFF) setting is changed. For the

modulation clock stabilization wait time, assign the maximum value for lock-up time.

MB88151A

f (Output frequency)

Modulation waveform

MOD (Min)

fMOD (Max)

Clock time

n^MOD(Max)

Clock time

n^MOD(Min)

MB88151A contains the modulation period to realize the efficient EMI reduction.

The modulation period f^MODdepends on the input frequency and changes between fMOD (Min) and fMOD (Max) .

Furthermore, the average value of fMOD equals the typical value of the electrical characteristics.

MB88151A

■ OUTPUT CLOCK DUTY CYCLE (tDCC = tb/ta)

1.5 V

CKOUT

■ INPUT FREQUENCY (fin = 1/tin)

tin

0.8 VDD

XIN

■ OUTPUT SLEW RATE (SR)

2.4 V

0.4 V

CKOUT

Note : SR = (2.4 − 0.4) /tr, SR = (2.4 − 0.4) /tf

■ CYCLE-CYCLE JITTER (tJC = | tn − tn+1 |)

CKOUT

tn+1

Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after

(or, immediately before) .

MB88151A

■ MODULATION WAVEFORM

• 1.5% modulation rate, Example of center spread

CKOUT

Output frequency

+ 1.5 %

Frequency at modulation OFF

Time

− 1.5 %

fMOD

• −1.0% modulation rate, Example of down spread

CKOUT

Output frequency

Frequency at modulation OFF

Time

− 0.5 %

− 1.0 %

fMOD

MB88151A

■ LOCK-UP TIME

3.0 V

V^DD

Internal clock

stabilization wait time

XIN

Setting pin

SEL0,

V^IH

SEL1,

t^LK

ENS

(lock-up time )

CKOUT

If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock

signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”).

For the input clock stabilization time, check the characteristics of the resonator or oscillator used.

XIN

ENS

tLK

t^LK

(lock-up time )

CKOUT

For modulation enable control using the ENS pin during normal operation, the set clock signal is output from

CKOUT pin at most the lock-up time (t^LK) after the level at the ENS pin is determined.

Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output

clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-

cycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset

of the device at the succeeding stage after the lock-up time.

MB88151A

XIN

Internal clock

stabilization wait time

XPD

tLK

(lock-up time)

CKOUT

When the power down is controlled by XPD pin, the desired clock is obtained after the pin is set to H level until

the maximum lock-up time tLK is elapsed.

MB88151A

■ OSCILLATION CIRCUIT

The figure below shows the connection example about general resonator. The oscillation circuit has the built-in

resistance (1 MΩ) . The value of capacity (C1 and C2) is required adjusting to the most suitable value of individual

resonator.

The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which

you use for the most suitable value.

Input the clock to XIN pin, and do not connect anything with XOUT pin if you use the external clock (you do not

use the resonator).

• When using the resonator

MB88151A LSI Internal

Rf (1 MΩ)

XIN Pin

XOUT Pin

MB88151A LSI External

C²

• When using an external clock

MB88151A LSI Internal

XOUT Pin

Rf (1 MΩ)

XIN Pin

MB88151A LSI External

External clock

OPEN

Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter

characteristic.

MB88151A

■ INTERCONNECTION CIRCUIT EXAMPLE

C¹

Xtal

MB88151A

SEL0

SEL1

ENS

C1, C2 : Oscillation stabilization capacitance (refer to “■OSCILLATION CIRCUIT”.)

: Capacitor of 10 µF or higher

: Capacitor about 0.01 µF (connect a capacitor of good high frequency

property (ex. laminated ceramic capacitor) to close to this device.)

: Impedance matching resistor for board pattern

MB88151A

■ SPECTRUM EXAMPLE CHARACTERISTICS

The condition of the examples of the characteristic is shown as follows : Input frequency = 20 MHz (Output

frequency = 20 MHz : Using MB88151A-100 (Multiply-by-1)), Power - supply voltage = 3.3 V, None load capacity,

Modulation rate = 1.5% (center spread).

Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz

(ATT use for − 6dB).

CH B Spectrum

10 dB /REF 0 dBm

No modulation

−6.54 dBm

Avg

1.5% modulation

−24.45 dBm

SWP 2.505 s

SPAN 4 MHZ

RBW# 1 kH^Z

VBW 1 kHZ

ATT 6 dB

CENTER 20 MH^Z

MB88151A

■ ORDERING INFORMATION

Input frequency Multiplier Output frequency

Part number

Package

Remarks

range

ratio

range

MB88151APNF-G-100-JNE1

MB88151APNF-G-101-JNE1

Multiply-

by-1

16.6 MHz to 33.4 MHz

MB88151APNF-G-200-JNE1

MB88151APNF-G-201-JNE1

Multiply-

by-2

33.2 MHz to 66.8 MHz

66.4 MHz to 133.6 MHz

8.3 MHz to 16.7 MHz

66.4 MHz to 133.6 MHz

16.6 MHz to 33.4 MHz

33.2 MHz to 66.8 MHz

66.4 MHz to 133.6 MHz

8.3 MHz to 16.7 MHz

66.4 MHz to 133.6 MHz

16.6 MHz to 33.4 MHz

33.2 MHz to 66.8 MHz

66.4 MHz to 133.6 MHz

8.3 MHz to 16.7 MHz

66.4 MHz to 133.6 MHz

16.6 MHz to

33.4 MHz

MB88151APNF-G-400-JNE1

MB88151APNF-G-401-JNE1

Multiply-

by-4

MB88151APNF-G-500-JNE1

MB88151APNF-G-501-JNE1

Multiply-

by-1/2

MB88151APNF-G-800-JNE1

MB88151APNF-G-801-JNE1

8.3 MHz to

16.7 MHz

Multiply-

by-8

MB88151APNF-G-100-JNEFE1

MB88151APNF-G-101-JNEFE1

Multiply-

by-1

MB88151APNF-G-200-JNEFE1

MB88151APNF-G-201-JNEFE1

Multiply-

by-2

16.6 MHz to

33.4 MHz

8-pin plastic

SOP

Emboss

taping

MB88151APNF-G-400-JNEFE1

MB88151APNF-G-401-JNEFE1

Multiply-

by-4

(FPT-8P-M02)

(EF type)

MB88151APNF-G-500-JNEFE1

MB88151APNF-G-501-JNEFE1

Multiply-

by-1/2

MB88151APNF-G-800-JNEFE1

MB88151APNF-G-801-JNEFE1

8.3 MHz to

16.7 MHz

Multiply-

by-8

MB88151APNF-G-100-JNERE1

MB88151APNF-G-101-JNERE1

Multiply-

by-1

MB88151APNF-G-200-JNERE1

MB88151APNF-G-201-JNERE1

Multiply-

by-2

16.6 MHz to

33.4 MHz

Emboss

taping

(ER type)

MB88151APNF-G-400-JNERE1

MB88151APNF-G-401-JNERE1

Multiply-

by-4

MB88151APNF-G-500-JNERE1

MB88151APNF-G-501-JNERE1

Multiply-

by-1/2

MB88151APNF-G-800-JNERE1

MB88151APNF-G-801-JNERE1

8.3 MHz to

16.7 MHz

Multiply-

by-8

MB88151A

■ PACKAGE DIMENSION

8-pin plastic SOP

Lead pitch

1.27 mm

3.9 × 5.05 mm

Gullwing

Package width

package length

Lead shape

Sealing method

Mounting height

Weight

Plastic mold

1.75 mm MAX

0.06 g

(FPT-8P-M02)

8-pin plastic SOP

(FPT-8P-M02)

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

+0.25

¹5.05 ^–0.20.199 ⁺^–.^.⁰⁰⁰¹⁸⁰

0.22 –⁺0⁰.^.0⁰7³

.009 ⁺^–.^.⁰⁰⁰⁰³¹

*²3.90 0.30 6.00 0.40

(.154 .012) (.236 .016)

Details of "A" part

45˚

1.55 0.20

(Mounting height)

(.061 .008)

0.25(.010)

0.40(.016)

0~8˚

"A"

1.27(.050)

0.44 0.08

(.017 .003)

0.13(.005)

0.50 0.20

(.020 .008)

0.15 0.10

(.006 .004)

(Stand off)

0.60 0.15

(.024 .006)

0.10(.004)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

2002 FUJITSU LIMITED F08004S-c-4-7

Please confirm the latest Package dimension by following URL.

http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html

MB88151A

FUJITSU LIMITED

The contents of this document are subject to change without notice.

Customers are advised to consult with FUJITSU sales

representatives before ordering.

The information, such as descriptions of function and application

circuit examples, in this document are presented solely for the

purpose of reference to show examples of operations and uses of

Fujitsu semiconductor device; Fujitsu does not warrant proper

operation of the device with respect to use based on such

information. When you develop equipment incorporating the

device based on such information, you must assume any

responsibility arising out of such use of the information. Fujitsu

assumes no liability for any damages whatsoever arising out of

the use of the information.

Any information in this document, including descriptions of

function and schematic diagrams, shall not be construed as license

of the use or exercise of any intellectual property right, such as

patent right or copyright, or any other right of Fujitsu or any third

party or does Fujitsu warrant non-infringement of any third-party’s

intellectual property right or other right by using such information.

Fujitsu assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result

from the use of information contained herein.

The products described in this document are designed, developed

and manufactured as contemplated for general use, including

without limitation, ordinary industrial use, general office use,

personal use, and household use, but are not designed, developed

and manufactured as contemplated (1) for use accompanying fatal

risks or dangers that, unless extremely high safety is secured, could

have a serious effect to the public, and could lead directly to death,

personal injury, severe physical damage or other loss (i.e., nuclear

reaction control in nuclear facility, aircraft flight control, air traffic

control, mass transport control, medical life support system, missile

launch control in weapon system), or (2) for use requiring

extremely high reliability (i.e., submersible repeater and artificial

satellite).

Please note that Fujitsu will not be liable against you and/or any

third party for any claims or damages arising in connection with

above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You

must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and

equipment such as redundancy, fire protection, and prevention of

over-current levels and other abnormal operating conditions.

If any products described in this document represent goods or

technologies subject to certain restrictions on export under the

Foreign Exchange and Foreign Trade Law of Japan, the prior

authorization by Japanese government will be required for export

of those products from Japan.

The company names and brand names herein are the trademarks or

registered trademarks of their respective owners.

Edited

Business Promotion Dept.

F0703

MB88151APNF-G-801-JNEFE1 相关器件

型号	制造商	描述	价格	文档
MB88151APNF-G-801-JNERE1	FUJITSU	Spread Spectrum Clock Generator	获取价格
MB88151A_10	FUJITSU	Spread Spectrum Clock Generator	获取价格
MB88151PNF-G-100-JNE1	FUJITSU	Clock Generator, 33.4MHz, CMOS, PDSO8, PLASTIC, SOP-8	获取价格
MB88151PNF-G-500-JN-ERE1	FUJITSU	Clock Generator, 16.7MHz, CMOS, PDSO8, PLASTIC, SOP-8	获取价格
MB88152	FUJITSU	Spread Spectrum Clock Generator	获取价格
MB88152A	FUJITSU	Spread Spectrum Clock Generator	获取价格
MB88152A	CYPRESS	Spread Spectrum Clock Generator	获取价格
MB88152A-100	FUJITSU	Spread Spectrum Clock Generator	获取价格
MB88152A-101	FUJITSU	Spread Spectrum Clock Generator	获取价格
MB88152A-102	FUJITSU	Spread Spectrum Clock Generator	获取价格