MB88152A [CYPRESS]
Spread Spectrum Clock Generator;
| 型号： | MB88152A |
| 厂家： | 
CYPRESS |
| 描述： | Spread Spectrum Clock Generator |
| 文件： | 总25页 (文件大小：556K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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offer these products to new and existing customers with the series name, product name, and
ordering part number with the prefix “CY”.
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About Cypress
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automotive, industrial, smart home appliances, consumer electronics and medical products.
Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable,
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MB88152A
Spread Spectrum Clock Generator
MB88152A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation
noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal mod-
ulator. It corresponds to both of the center spread which modulates input frequency as Middle Centered and down
spread which modulates so as not to exceed input frequency.
Features
■ Input frequency : 16.6 MHz to 134 MHz
■ Output frequency : 16.6 MHz to 134 MHz
■ Modulation rate :
0.5%, 1.5% (Center spread), − 1.0%, − 3.0% (Down spread)
■ Equipped with oscillation circuit: Range of oscillation 16.6 MHz to 48 MHz
■ Modulation clock output Duty : 40% to 60%
■ Modulation clock Cycle-Cycle Jitter : Less than 100 ps
■ Low current consumption by CMOS process : 5.0 mA (24 MHz : Typ-sample, no load)
■ Power supply voltage : 3.3 V 0.3 V
■ Operating temperature : − 40° to +85 °C
■ Package : SOP 8-pin
Cypress Semiconductor Corporation
Document Number: 002-08308 Rev. *B
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised Monday, December 25, 2017
MB88152A
Contents
Output Clock Duty Cycle (tDCC = tb/ta) ...................... 15
Input Frequency (fin = 1/tin) ......................................... 15
Output Slew Rate (SR) .................................................. 15
Cycle-cycle Jitter (tJC = | tn − tn + 1 |) ......................... 15
Modulation Waveform .................................................... 16
Lock-up Time .................................................................. 17
Oscillation Circuit ........................................................... 18
Interconnection Circuit Example .................................. 19
Example Characteristics ................................................ 20
Ordering Information...................................................... 21
Product Line-up ................................................................ 3
Pin Assignment ................................................................ 3
Pin Description ................................................................. 3
I/O Circuit Type ................................................................. 4
Handling Devices .............................................................. 5
Block Diagram .................................................................. 6
Pin Setting ......................................................................... 7
Modulation enable setting ........................................... 7
SEL modulation rate setting ........................................ 7
Frequency setting ........................................................ 7
Absolute Maximum Ratings ........................................... 9
Recommended Operating Conditions .......................... 10
Package Dimension ........................................................ 22
Document History ...........................................................23
Sales, Solutions, and Legal Information ......................24
Electrical Characteristics ............................................... 12
DC Characteristics ....................................................12
AC Characteristics .....................................................13
Document Number: 002-08308 Rev. *B
Page 2 of 24
MB88152A
1. Product Line-up
MB88152A has three kinds of input frequency, and two kinds of modulation type (center/down spread), total six line-ups.
Product
MB88152A-100
Input/Output Frequency
16.6 MHz to 134 MHz
16.6 MHz to 67 MHz
16.6 MHz to 67 MHz
40 MHz to 134 MHz
Modulation Type
Down spread
Modulation Enable Pin
No
MB88152A-101
MB88152A-111
MB88152A-112
Yes
Yes
Center spread
2. Pin Assignment
TOP VIEW
XIN
1
2
3
4
8
7
6
5
XENS
FREQ
XIN
1
2
3
4
8
FREQ1
FREQ0
MB88152A-101
MB88152A-111
MB88152A-112
XOUT
XOUT
7
6
5
MB88152A-100
V
SS
VDD
VSS
VDD
SEL
CKOUT
SEL
CKOUT
SOB008
SOB008
3. Pin Description
Pin Name
I/O
Pin No.
Description
XIN
I
1
2
3
4
5
6
7
8
Crystal resonator connection pin/clock input pin
Crystal resonator connection pin
GND pin
XOUT
O
−
I
VSS
SEL
Modulation rate setting pin
CKOUT
VDD
O
−
I
Modulated clock output pin
Power supply voltage pin
FREQ/FREQ0
XENS/FREQ1
Frequency setting pin
I
Modulation enable setting pin/frequency setting pin
Document Number: 002-08308 Rev. *B
Page 3 of 24
MB88152A
4. I/O Circuit Type
Pin
Circuit Type
Remarks
CMOS hysteresis input
SEL
FREQ
FREQ0
FREQ1
XENS
CKOUT
■ CMOS output
■ IOL = 4 mA
Note: For XIN and XOUT pins, refer to “Oscillation Circuit”.
Document Number: 002-08308 Rev. *B
Page 4 of 24
MB88152A
5. Handling Devices
Preventing Latch-up
A latch-up can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an input or output pin or
(b) a voltage higher than the rating is applied between VDD and VSS pins. The latch-up, if it occurs, significantly increases the power
supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the max-
imum rating.
Handling Unused Pins
■ Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or
pull-down resistor.
■ Unused output pin should be opened.
The Attention when the External Clock is Used
■ Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.
■ Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.
Power Supply Pins
■ Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source.
■ We recommend connecting electrolytic capacitor (about 10 μF) and the ceramic capacitor (about 0.01 μF) in parallel between VSS
and VDD pins near the device, as a bypass capacitor.
Oscillation Circuit
■ Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN
or XOUT pin and resonator (or ceramic oscillator) do not intersect other wiring.
■ Design the printed circuit board that surrounds the XIN and XOUT pins with ground.
Document Number: 002-08308 Rev. *B
Page 5 of 24
MB88152A
6. Block Diagram
V
DD
Modulation rate setting
Frequency setting
SEL
FREQ/FREQ0
Modulation enable /
Frequency setting
PLL block
CKOUT
Clock output
XENS/FREQ1
XOUT
Reference clock
XIN
Rf = 1 MΩ
V
SS
1
−
M
Charge
pump
Phase
compare
V/I
IDAC
ICO
conversion
Modulation
clock
output
Reference
clock
1
−
N
Loop filter
1
−
L
Modulation
rate setting/
Modulation
Modulation logic
MB88152A PLL block
enable setting
A glitchless IDAC (current output D/A converter) provides precise modulation, thereby
dramatically reducing EMI.
Document Number: 002-08308 Rev. *B
Page 6 of 24
MB88152A
7. Pin Setting
When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization wait time for the mod-
ulation clock takes the maximum value of Lock-Up time in “AC Characteristics of Electrical Characteristics”.
7.1 Modulation Enable Setting
XENS
Modulation
MB88152A-101,
L
Modulation
MB88152A-111, MB88152A-112
H
No modulation
Note: MB88152A-100 and MB88152A-110 do not have XENS pin.
7.2 SEL Modulation Rate Setting
SEL
Modulation Rate
Remarks
L
0.5%
− 1.0%
1.5%
MB88152A-111,
MB88152A-112
Center spread
MB88152A-100,
MB88152A-101
Down spread
Center spread
Down spread
H
MB88152A-111,
MB88152A-112
− 3.0%
MB88152A-100,
MB88152A-101
Note: The modulation rate can be changed at the level of the terminal.
7.3 Frequency Setting
FREQ
Frequency
L
16.6 MHz to 40 MHz
40 MHz to 80 MHz
33 MHz to 67 MHz
66 MHz to 134 MHz
MB88152A-101, MB88152A-111
MB88152A-112
H
MB88152A-101, MB88152A-111
MB88152A-112
Note: MB88152A-100 and MB88152A-110 do not have FREQ pin.
FREQ1
FREQ0
Frequency
MB88152A-100
L
L
16.6 MHz to 40 MHz
33 MHz to 67 MHz
40 MHz to 80 MHz
66 MHz to 134 MHz
L
H
L
H
H
H
Note: MB88152A-101, MB88152A-111 and MB88152A-112 have neither FREQ0 pin nor FREQ1 pin.
Document Number: 002-08308 Rev. *B
Page 7 of 24
MB88152A
7.3.1 Center Spread
Spectrum is spread (modulated) by centering on the input frequency.
3.0% modulation width
Radiation level
−3.0%
Frequency
Input frequency
Center spread example of 1.5% Modulation rate
7.3.2 Down Spread
Spectrum is spread (modulated) below the input frequency.
3.0% modulation width
Radiation level
−3.0%
Frequency
Input frequency
Down spread example of − 3.0% Modulation rate
Document Number: 002-08308 Rev. *B
Page 8 of 24
MB88152A
8. Absolute Maximum Ratings
Rating
Parameter
Symbol
Unit
Min
Max
Power supply voltagea
Input voltagea
VDD
− 0.5
VSS − 0.5
VSS − 0.5
− 55
− 40
− 14
+ 4.0
V
VI
VDD + 0.5
VDD + 0.5
+ 125
+ 125
+ 14
V
Output voltagea
VO
V
Storage temperature
Operation junction temperature
Output current
TST
°C
°C
mA
V
TJ
IO
Overshoot
VIOVER
VIUNDER
−
VDD + 1.0 (tOVER ≤ 50 ns)
−
Undershoot
VSS − 1.0 (tUNDER ≤ 50 ns)
V
a. The parameter is based on VSS
=
0.0 V.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Overshoot/Undershoot
tUNDER ≤ 50 ns
VIOVER ≤ VDD + 1.0 V
V
DD
Input pin
V
SS
tOVER ≤ 50 ns
VIUNDER ≤ VSS − 1.0 V
Document Number: 002-08308 Rev. *B
Page 9 of 24
MB88152A
9. Recommended Operating Conditions
(VSS = 0.0 V)
Value
Typ
Parameter
Symbol
Pin
Conditions
Unit
Min
Max
Power supply voltage
“H” level input voltage
VDD
VIH
VDD
−
−
3.0
3.3
3.6
V
V
SEL,
FREQ/FREQ0,
XENS/FREQ1
VDD x 0.8
−
VDD + 0.3
XIN
16.6 MHz to 100 MHz
100 MHz to 134 MHz
−
VDD x 0.8
VDD x 0.9
VSS
−
−
−
VDD + 0.3
VDD + 0.3
VDD x 0.2
V
V
V
“L” level input voltage
VIL
SEL,
FREQ/FREQ0,
XENS/FREQ1
XIN
XIN
XIN
16.6 MHz to 100 MHz
100 MHz to 134 MHz
16.6 MHz to 100 MHz
100 MHz to 134 MHz
VSS
VSS
40
−
−
VDD x 0.2
V
VDD x 0.1
V
Input clock
duty cycle
tDCI
50
60
55
−
%
45
50
Input clock
slew rate
SRIN
Input frequency
40 MHz to 100 MHz
0.0475xfin −
V/ns
− 1.75
Input frequency
100 MHz to 134 MHz
3
−
−
−
Operating
temperature
Ta
−
−
−40
+ 85
⋅C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor
device. All of the device's electrical characteristics are warranted when the device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation outside these
ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet.
Users considering application outside the listed conditions are advised to contact their representatives beforehand.
Input clock duty cycle (tDCI = tb/ta)
t
a
t
b
1.5 V
XIN
Document Number: 002-08308 Rev. *B
Page 10 of 24
MB88152A
Input clock slew rate (SRIN)
VDD x 0.80
VDD x 0.20
XIN
trin
tfin
Note: SRIN = (VDD x 0.80 - VDD x 0.20) /trin, SRIN = (VDD x 0.80 - VDD x 0.20) /tfin
Document Number: 002-08308 Rev. *B
Page 11 of 24
MB88152A
10. Electrical Characteristics
10.1 DC Characteristics
(Ta = −40°C to + 85°C, VDD = 3.3 V 0.3 V, VSS = 0.0 V)
Value
Parameter
Symbol
ICC
Pin
Conditions
Unit
Min
Typ
Max
7.0
Power supply current
VDD
24 MHz output
No load capacitance
−
5.0
mA
Output voltage
VOH
VOL
CKOUT
VDD − 0.5 −
VDD
V
V
I“OHH”=lev−el4oumtpAut
I“OLL” =lev4eml oAutput
VSS
−
0.4
Output impedance
Input capacitance
ZO
CKOUT
16.6 MHz to 134 MHz
−
−
45
−
16
Ω
pF
CIN
XIN,
SEL,
FREQ/
FREQ0,
XENS/
FREQ1
Ta = + 25 °C
VDD = VI = 0.0 V
f = 1 MHz
−
Load capacitance
CL
CKOUT
16.6 MHz to 67 MHz
67 MHz to 100 MHz
100 MHz to 134 MHz
−
−
−
−
−
−
15
10
7
pF
Document Number: 002-08308 Rev. *B
Page 12 of 24
MB88152A
10.2 AC Characteristics
(Ta = −40°C to + 85°C, VDD = 3.3 V 0.3 V, VSS = 0.0 V)
Value
Parameter
Symbol
Pin
XIN,
Conditions
Unit
MHz
Min
16.6
Typ
Max
Oscillation frequency
fx
Fundamental oscillation
3rd over tone
−
−
−
−
−
−
−
−
−
40
48
XOUT
40
Input frequency
fin
XIN
MB88152A-100
16.6
16.6
40
134
67
MHz
MHz
MB88152A-101/111
MB88152A-112
134
134
67
Output frequency
fOUT
CKOUT
CKOUT
MB88152A-100
16.6
16.6
40
MB88152A-101/111
MB88152A-112
134
4.0
Output slew rate
SR
0.4 V to 2.4 V
Load capacitance 15 pF
0.4
V/ns
Output clock duty cycle
tDCC
CKOUT
CKOUT
1.5 V
40
−
60
%
Modulation frequency
(Number of input clocks
per modulation)
fMOD
(nMOD)
MB88152A-100
FREQ[1 : 0] = (00)
MB88152A-100
FREQ[1 : 0] = (01)
fin/2640
(2640)
fin/2280
(2280)
fin/1920 kHz
(1920)
(clks)
fin/4400
(4400)
fin/3800
(3800)
fin/3200
(3200)
MB88152A-100
FREQ[1 : 0] = (10)
fin/5280
(5280)
fin/4560
(4560)
fin/3840
(3840)
MB88152A-100
FREQ[1 : 0] = (11)
fin/8800
(8800)
fin/7600
(7600)
fin/6400
(6400)
MB88152A-101/111
FREQ = 0
fin/2640
(2640)
fin/2280
(2280)
fin/1920
(1920)
MB88152A-101/111
FREQ = 1
fin/4400
(4400)
fin/3800
(3800)
fin/3200
(3200)
MB88152A-112
FREQ = 0
fin/5280
(5280)
fin/4560
(4560)
fin/3840
(3840)
MB88152A-112
FREQ = 1
fin/8800
(8800)
fin/7600
(7600)
fin/6400
(6400)
Lock-Up time
tLK
CKOUT
CKOUT
16.6 MHz to 80 MHz
−
−
−
2
5
ms
80 MHz to 134 MHz
3
8
Cycle-cycle jitter
tJC
No load capacitance,
Ta = + 25 °C,
VDD = 3.3 V
−
100
ps-rms
Document Number: 002-08308 Rev. *B
Page 13 of 24
MB88152A
<Definition of modulation frequency and number of input clocks per modulation>
fout (Output frequency)
Modulation wave form
t
f
MOD (Min)
fMOD (Max)
t
Clock count
nMOD (Max)
Clock count
nMOD (Min)
■ MB88152A contains the modulation period to realize the efficient EMI reduction.
■ The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) .
■ Furthermore, the average value of fMOD equals the typical value of the electrical characteristics.
Document Number: 002-08308 Rev. *B
Page 14 of 24
MB88152A
11. Output Clock Duty Cycle (tDCC = tb/ta)
ta
tb
1.5 V
CKOUT
12. Input Frequency (fin = 1/tin)
tin
0.8 VDD
XIN
13. Output Slew Rate (SR)
2.4 V
0.4 V
CKOUT
tr
tf
Note: SR = (2.4−0.4) /tr, SR = (2.4−0.4) /tf
14. Cycle-cycle Jitter (tJC = | tn − tn + 1 |)
CKOUT
tn
tn+1
Note: Cycle-cycle jitter is defined the difference between a certain cycle and immediately after
(or, immediately before) .
Document Number: 002-08308 Rev. *B
Page 15 of 24
MB88152A
15. Modulation Waveform
1.5% modulation rate, Example of center spread
CKOUT
output frequency
+ 1.5 %
Frequency at modulation OFF
Time
− 1.5 %
fMOD
−1.0% modulation rate, Example of down spread
CKOUT
output frequency
Frequency at modulation OFF
Time
− 0.5 %
− 1.0 %
f
MOD
Document Number: 002-08308 Rev. *B
Page 16 of 24
MB88152A
16. Lock-up Time
3.0 V
Internal clock
stabilization wait time
VDD
XIN
Setting pin
SEL
FREQ1/XENS
FREQ0/FREQ
V
IH
tLK
(lock-up time )
CKOUT
If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock signal is output from
CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”). For the input clock stabilization time,
check the characteristics of the resonator or oscillator used.
XIN
V
IH
tLK
V
IL
(lock-up time )
XENS
(lock-up time )
tLK
CKOUT
For modulation enable control using the XENS pin during normal operation, the set clock signal is output from
CKOUT pin at most the lock-up time (tLK) after the level at the XENS pin is determined.
Note: When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output clock signal becomes
stable,theoutputfrequency,outputclockdutycycle,modulationperiod,andcycle-cyclejittercannotbeguaranteed.Itistherefore
advisable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time.
Document Number: 002-08308 Rev. *B
Page 17 of 24
MB88152A
17. Oscillation Circuit
The left side of figures below shows the connection example about general resonator. The oscillation circuit has the built-in feedback
resistance (Rf). The value of capacity (C1 and C2) is required adjusting to the most suitable value of an individual resonator.
The right side of figures below shows the example of connecting for the 3rd over-tone resonator. The value of capacity (C1, C2 and
C3) and inductance (L1) is needed adjusting to the most suitable value of an individual resonator. The most suitable value is different
by individual resonator. Please refer to the resonator manufacturer which you use for the most suitable value. When an external
clock is used (the resonator is not used), input the clock to XIN pin and do not connect anything with XOUT pin.
When using the resonator
MB88152A Internal
R
f
(1 MΩ)
Rf (1 MΩ)
XOUT Pin
XOUT Pin
XIN Pin
XIN Pin
MB88152A External
L
1
C1
C2
C
1
C2
C3
Fundamental resonator
3rd over tone resonator
When using an external clock
MB88152A LSI Internal
XOUT Pin
Rf (1 MΩ)
XIN Pin
MB88152A LSI External
External clock
OPEN
Note: A jitter characteristic of an input clock may cause an affect to a cycle-cycle jitter characteristic.
Document Number: 002-08308 Rev. *B
Page 18 of 24
MB88152A
18. Interconnection Circuit Example
XENS/FREQ1
1
2
3
8
7
6
5
FREQ/FREQ0
MB88152A
+
C1
C2
4
C
4
C3
SEL
R
1
C1, C2 : Oscillation stabilization capacitance (refer to "Oscillation Circuit”.)
C3
C4
: Capacitor of 10 μF or higher
: Capacitor about 0.01 μF (connect a capacitor of good high frequency
property (ex. laminated ceramic capacitor) to close to this device.)
: Impedance matching resistor for board pattern
R1
Document Number: 002-08308 Rev. *B
Page 19 of 24
MB88152A
19. Example Characteristics
The condition of the examples of the characteristics is shown as follows : Input frequency = 20 MHz (Output frequency = 20 MHz :
Use for MB88152A-111)
Power-supply voltage = 3.3 V, None load capacity, Modulation rate = 1.5% (center spread) .
Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with, RBW = 1 kHz (ATT use for −6 dB) .
CH B Spectrum
10 dB /REF 0 dBm
No modulation
−7.44 dBm
Avg
4
1.5% modulation
−25.75 dBm
SWP 2.505 s
SPAN 4 MHZ
RBW# 1 kHZ
CENTER 20 MHZ
VBW 1 kHZ
ATT 6 dB
Document Number: 002-08308 Rev. *B
Page 20 of 24
MB88152A
20. Ordering Information
Input/Output
Frequency
Modulation
Enable pin
Part Number
Modulation Type
Package
Remarks
MB88152APNF-G-100-JNE1
MB88152APNF-G-101-JNE1
MB88152APNF-G-111-JNE1
MB88152APNF-G-112-JNE1
MB88152APNF-G-100-JNEFE1
MB88152APNF-G-101-JNEFE1
MB88152APNF-G-111-JNEFE1
MB88152APNF-G-112-JNEFE1
MB88152APNF-G-100-JNERE1
MB88152APNF-G-101-JNERE1
MB88152APNF-G-111-JNERE1
MB88152APNF-G-112-JNERE1
16.6 MHz to 134 MHz Down spread
No
8-pin plastic
SOP
(SOB008)
16.6 MHz to 67 MHz
16.6 MHz to 67 MHz
40 MHz to 134 MHz
Down spread
Center spread
Center spread
Yes
Yes
Yes
No
16.6 MHz to 134 MHz Down spread
8-pin plastic
SOP
(SOB008)
Emboss
taping
(EF type)
16.6 MHz to 67 MHz
16.6 MHz to 67 MHz
40 MHz to 134 MHz
Down spread
Center spread
Center spread
Yes
Yes
Yes
No
16.6 MHz to 134 MHz Down spread
8-pin plastic
SOP
(SOB008)
Emboss
taping
(ER type)
16.6 MHz to 67 MHz
16.6 MHz to 67 MHz
40 MHz to 134 MHz
Down spread
Center spread
Center spread
Yes
Yes
Yes
Document Number: 002-08308 Rev. *B
Page 21 of 24
MB88152A
21. Package Dimension
ꢈ
0.25
H D
ꢃ;
4
D
ꢏ
ꢅ
ꢅ
ꢏ
㻰
㻭
5
ꢈ
4
E1 E
45°
INDEX AREA
ꢇ
ꢇ
0.25
H D
ꢃ;
h
ꢀ
ꢄ
ꢄ
ꢀ
0.20
C A-B D
SIDE VIEW
㻮
5
BOTTOM VIEW
TOP VIEW
A
DETAIL A
A2
L2
ș
GAUGE
PLANE
A
㻯
SEATING
PLANE
C
A'
c
e
0.10
A-B
b
ꢎ
A1
L
L1
10
SECTION A-A'
b
0.13
C
D
8
SIDE VIEW
DETAIL A
127(6
ꢁꢂ $/ꢂ ', 0(16, 21ꢂ $5ꢂ, ꢂ 0, //, 0(7( ꢁ
ꢁꢂ ', 0(16, 21, 1 ꢂ $1ꢂ 7 2/(5$1&, 1 ꢂ 3( ꢂꢂ $6 0ꢂ <ꢀ ꢁ ꢅ ꢆ ꢀꢇꢇ ꢁ
DIMENSIONS
SYMBOL
A
MIN. NOM. MAX.
1.75
ꢁꢂ ', 0(16, 21, 1 ꢂ ꢂ, 1&/ 8'ꢂ 02/ ꢂ )/$6 ꢉꢂ ', 0(16, 21, 1 ꢂ (ꢂ '2(ꢂ 12ꢂ, 1&/ 8'(
ꢂꢂꢂꢂ, 17(5/($ ꢂ )/$6 ꢂ 2ꢂ 3527586, 2 ꢁꢂ, 17(5/($ ꢂ )/$6 ꢂ 2ꢂ 3527586, 216
ꢂꢂꢂꢂ 6+$/ꢂ 12ꢂ (;&(( ꢂ ꢁ ꢊꢃꢂ Pꢂ 3( ꢂ 6, ' ꢁꢂ ꢂ DQꢂ (ꢂ ', 0(16, 2ꢂ $5ꢂ '(7(50, 1('
0.25
1.50
0.05
1.30
A1
A2
D
ꢂꢂꢂꢂ $ꢂ '$78 ꢂ
ꢁ
1.40
ꢁꢂ 7+ꢂ 3$&.$*ꢂ 7 2ꢂ 0$ꢂ %ꢂ 6 0$//( ꢂ 7+$ ꢂ 7+ꢂ 3$&.$*ꢂ %277 2 ꢁ
ꢂꢂꢂꢂ ', 0(16, 21, 1 ꢂꢂ ꢂ DQꢂ (ꢂ $5ꢂ '(7(50, 1( ꢂ $ꢂ 7+ꢂ 287(50267
ꢂꢂꢂꢂ (;75( 0(ꢂ 2ꢂ 7+ꢂ 3/$67, ꢂ %2'ꢂ (;&/ 86, 9ꢂ 2ꢂ 02/ ꢂ )/$6 ꢉ
ꢂꢂꢂꢂ 7+ꢂ %$ ꢂ %855 ꢉꢂ *$7 ꢂ %855ꢂ $1ꢂ, 17(5/($ ꢂ )/$6 ꢉꢂ %8ꢂ, 1&/ 8', 1*
ꢂꢂꢂꢂ $1ꢂ 0, 6 0$7&ꢂ %(7 :(( ꢂ 7+ꢂ 7 2ꢂ $1ꢂ %277 2 ꢂ 2ꢂ 7+ꢂ 3/$67, ꢂ %2' ꢁ
5.05 BSC.
6.00 BSC.
3.90 BSC
E
E
1
ꢁꢂ '$780ꢂ
ꢂ ꢂ ꢂ 7 ꢂ %ꢂ '(7(50, 1( ꢂ $ꢂ '$78 ꢂ ꢁ
ș
0°
0.15
0.36
0.45
8°
ꢁꢂ ꢍ ꢂ, ꢂ 7+ꢂ 0$;, 08 ꢂ 180%( ꢂ 2ꢂ 7(50, 1$ꢂ 326, 7, 21ꢂ ) 2ꢂ 7+ꢂ 63(&, ), ('
ꢂꢂꢂꢂꢂ 3$&.$*ꢂ /(1*7 ꢁ
0.25
0.52
0.75
c
b
L
L
L
e
h
ꢁꢂ 7+ꢂ ', 0(16, 2ꢂ $33/ ꢂ 7 ꢂ 7+ꢂ )/$ꢂ 6(&7, 2ꢂ 2ꢂ 7+ꢂ /($ ꢂ %(7 :(( ꢂ ꢁ ꢀꢂ PP
ꢂꢂꢂꢂ 7 ꢂ ꢁ ꢃꢅ Pꢂ )52 ꢂ 7+ꢂ /($ ꢂ 7,
0.44
ꢁ
0.60
ꢁꢂ ', 0(16, 2ꢂ ꢍ Eꢂ '2(ꢂ 12ꢂ, 1&/ 8'ꢂ 7+ꢂ '$ 0%$ ꢂ 3527586, 2 ꢁꢂ $// 2 :$%/(
ꢂꢂꢂꢂ '$ 0%$ ꢂ 3527586, 2ꢂ 6+$/ꢂ %ꢂ ꢁ ꢀꢊ Pꢂ 7 27$ꢂ, ꢂ (;&(6ꢂ 2ꢂ 7+ꢂ ꢍ Eꢂ ', 0(16, 21
ꢂꢂꢂꢂ $ꢂ 0$;, 08 ꢂ 0$7(5, $ꢂ &21', 7, 2 ꢁ
1.05 REF
0.25 BSC
1
ꢂꢂꢂꢂ 7+ꢂ '$ 0%$ ꢂ 0$ꢂ 12ꢂ %ꢂ / 2&$7( ꢂ 2ꢂ 7+ꢂ / 2 :( ꢂ 5$', 8ꢂ 2ꢂ 7+ꢂ ) 22ꢁ
2
ꢁꢂ 7+, ꢂ &+$ 0)( ꢂ )($785ꢂ, ꢂ 237, 21$ ꢁꢂ / ꢂ, ꢂ, ꢂ 12ꢂ 35(6(1 ꢉꢂ 7+( ꢂ ꢂ 3, ꢂ ꢀ
ꢂꢂꢂꢂ, '(17, ), ( ꢂ 086ꢂ %ꢂ / 2&$7( ꢂ :, 7+, ꢂ 7+ꢂ, 1'(ꢂ $5(ꢂ, 1', &$7('
1.27 BSC.
0.40 BSC.
ꢀ ꢁꢂ ꢍ $ꢀꢂ, ꢂ '(), 1( ꢂ $ꢂ 7+ꢂ 9(57, &$ꢂ ', 67$1&ꢂ )52 ꢂ 7+ꢂ 6($7, 1 ꢂ 3/$1ꢂ 7 2
ꢂꢂꢂꢂꢂꢂꢂ 7+ꢂ / 2 :(6ꢂꢂ 32, 1ꢂ 2ꢂ 7+ꢂ 3$&.$*ꢂ %2'ꢂ (;&/ 8', 1 ꢂ 7+ꢂ /, ꢂ $1ꢂ 25
ꢂꢂꢂꢂꢂꢂꢂ 7+(50$ꢂ (1+$1&( 0(1ꢂ 2ꢂ &$9, 7 ꢂ '2 :ꢂ 3$&.$*ꢂ &21), *85$7, 21 ꢁ
002-15856 Rev.**
11. JEDEC SPECIFICATION NO. REF : N/A
Document Number: 002-08308 Rev. *B
Page 22 of 24
MB88152A
Document History
Document Title: MB88152A Spread Spectrum Clock Generator
Document Number: 002-08308
Orig. of
Change
Submission
Date
Revision
ECN
Description of Change
**
–
TAOA
TAOA
06/29/2009 Initial release.
*A
5560671
12/28/2016 Migrated Spansion datasheet “DS04-29125-3E” into Cypress Template.
Deleated EOL part number: MB88152A-102/110
12/25/2017 Updated Package Dimensions: Updated to Cypress format
Changed the package name from FPT-8P-M02 to SOB008
*B
6003426
TAOA
Document Number: 002-08308 Rev. *B
Page 23 of 24
MB88152A
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24
© Cypress Semiconductor Corporation, 2006-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document,
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Document Number: 002-08308 Rev. *B
Revised December 25, 2017
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