MB84VD22182EE-85-PBS [FUJITSU]
SPECIALTY MEMORY CIRCUIT, PBGA73, PLASTIC, FBGA-73;型号: | MB84VD22182EE-85-PBS |
厂家: | FUJITSU |
描述: | SPECIALTY MEMORY CIRCUIT, PBGA73, PLASTIC, FBGA-73 静态存储器 内存集成电路 |
文件: | 总57页 (文件大小:1159K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-50213-2E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM
CMOS
32M (× 8/×16) FLASH MEMORY &
4M (× 8/×16) STATIC RAM
MB84VD2218XEB-85/MB84VD2219XEB-85
MB84VD2218XEE-85/MB84VD2219XEE-85
■ FEATURES
• Power Supply Voltage of 2.7 V to 3.3 V
• High Performance
85 ns maximum access time (Flash)
85 ns maximum access time (SRAM)
• Operating Temperature
–25 °C to +85 °C
• Package 73-ball BGA
(Continued)
■ PRODUCT LINE UP
Flash Memory
SRAM
+0.3 V
−0.3 V
+0.3 V
−0.3 V
Power Supply Voltage (V)
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
VCCf* = 3.0 V
VCCs* = 3.0 V
85
85
35
85
85
45
* : Both VCCf and VCCs must be in recommended operation range when either part is being accessed.
■ PACKAGE
73-ball plastic FBGA
(BGA-73P-M01)
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
1.FLASH MEMORY
• Simultaneous Read/Write Operations (Dual Bank)
Multiple devices available with different bank sizes
Host system can program or erase in one bank, then immediately and simultaneously read from the other bank.
Zero latency between read and write operations
Read-while-erase
Read-while-program
• Minimum 100,000 Write/Erase Cycles
• Sector Erase Architecture
Eight 4 K words and sixty three 32 K words
Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture
MB84VD2218X: Top sector
MB84VD2219X: Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready-Busy Output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic Sleep Mode
When addresses remain stable, automatically switch themselves to low power mode.
• Low VCCf Write Prohibition ≤ 2.5 V
• Hidden ROM (Hi-ROM) Region
64 K byte of Hi-ROM, accessible through a new “Hi-ROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC Input Pin
Allows protection of boot sectors at VIL, regardless of sector protection/unprotection status.
(MB84VD2218XEB/EE:SA69,SA70 MB84VD2219XEB/EE:SA0,SA1)
Allows removal of boot sector protection at VIH.
Program time will reduce by 40% at VACC.
• Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device
• Please refer to “MBM29DL32XTE/BE” in datasheet for detailed functions
2.SRAM
• Power Dissipation
Operating: 40 mA Max.
Standby : 7 µA Max.
• Power down features using CE1s and CE2s
• Data Retention Supply Voltage: 1.5 V to 3.3 V
• CE1s and CE2s Chip Select
• Byte Data Control: LBs(DQ0 to DQ7), UBs(DQ8 to DQ15)
2
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ PIN ASSIGNMENT
FBGA
(Top View)
Marking Side
A10
B10
F10
G10
N.C.
L10
M10
N.C.
N.C.
N.C.
N.C.
N.C.
D9
A15
E9
F9
G9
A16
H9
J9
N.C.
N.C.
CIOf
VSS
C8
A11
D8
A12
E8
A13
F8
G8
SA
H8
J8
K8
A14
DQ15/A-1 DQ7
DQ14
C7
A8
D7
A19
E7
A9
F7
G7
H7
J7
K7
A10
DQ6
DQ13
DQ12
DQ5
B6
C6
D6
E6
A20
H6
J6
K6
L6
N.C.
WE
CE2s
DQ4
VCCs
CIOs
N.C.
B5
C5
D5
E5
H5
J5
K5
L5
WP/ACC RESET
N.C.
RY/BY
DQ3
VCCf
DQ11
N.C.
C4
D4
E4
A18
F4
G4
H4
J4
K4
LBs
UBs
A17
DQ1
DQ9
DQ10
DQ2
C3
A7
D3
A6
E3
A5
F3
A4
G3
H3
J3
K3
VSS
OE
DQ0
DQ8
D2
A3
E2
A2
F2
A1
G2
A0
H2
J2
CEf
CE1s
A1
B1
C1
F1
G1
L1
M1
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
(BGA-73P-M01)
3
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ PIN DESCRIPTION
Pin Name
A0 to A17
A–1, A18 to A20
SA
Function
Input/Output
Address Inputs (Common)
Address Inputs (Flash)
Address Input (SRAM)
I
I
I
DQ0 to DQ15
CEf
Data Inputs/Outputs (Common)
Chip Enable (Flash)
I/O
I
I
CE1s
Chip Enable (SRAM)
CE2s
Chip Enable (SRAM)
I
OE
Output Enable (Common)
Write Enable (Common)
I
WE
I
RY/BY
UBs
Ready/Busy Outputs (Flash) Open Drain Output
Upper Byte Control (SRAM)
Lower Byte Control (SRAM)
O
I
LBs
I
I/O Configuration (Flash)
CIOf = VCCf is Word mode (×16), CIOf = VSS is Byte mode (×8)
CIOf
I
I
I/O Configuration (SRAM)
CIOs = VCCs is Word mode (×16), CIOs = VSS is Byte mode (×8)
CIOs
RESET
WP/ACC
N.C.
Hardware Reset Pin/Sector Protection Unlock (Flash)
Write Protection / Acceleration (Flash)
No Internal Connection
I
I
—
VSS
Device Ground (Common)
Power
Power
Power
VCCf
Device Power Supply (Flash)
VCCs
Device Power Supply (SRAM)
4
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ BLOCK DIAGRAM
VCCf
VSS
A0 to A20
RY/BY
A0 to A20
A–1
WP/ACC
RESET
CEf
32 M bit
Flash Memory
DQ0 to DQ15/A–1
CIOf
DQ0 to DQ15/A–1
VCCs
VSS
A0 to A17
DQ0 to DQ15
4 M bit
SA
LBs
UBs
WE
Static RAM
OE
CE1s
CE2s
CIOs
5
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ DEVICE BUS OPERATIONS
Table 1. 1 User Bus Operations (Flash=Word mode; CIOf=Vccf, SRAM=Word mode; CIOs=Vccs)
WP/
ACC*
1,
3
6
CEf CE1s CE2s OE WE
LBs UBs DQ0 to DQ7 DQ8 to DQ15 RESET
Operation * *
SA*
5
H
X
X
L
Full Standby
H
H
L
X
X
X
X
X
High-Z
High-Z
H
X
H
X
H
X
X
X
X
H
X
H
High-Z
High-Z
High-Z
High-Z
L
H
Output Disable
H
X
H
X
H
X
H
X
X
L
X
L
X
L
H
L
H
H
L
X
X
X
X
X
X
X
X
X
High-Z
DOUT
DIN
High-Z
DOUT
DIN
2
L
H
H
X
X
Read from Flash *
Write to Flash
L
H
L
H
L
L
L
DOUT
High-Z
DOUT
DOUT
DOUT
Read from SRAM
Write to SRAM
H
L
H
L
H
X
H
X
H
L
High-Z
DIN
L
DIN
H
X
L
H
X
X
X
L
X
X
H
L
L
High-Z
DIN
DIN
H
X
X
H
High-Z
Temporary Sector
Group
X
X
X
X
X
X
VID
4
Unprotection*
H
X
X
L
Flash Hardware
Reset
X
X
X
X
X
X
X
X
X
X
X
X
High-Z
X
High-Z
X
L
X
L
Boot Block Sector
Write Protection
X
X
X
Legend: L = VIL, H = VIH, X = VIL or VIH. See “ ELECTRICAL CHARACTERISTICS 1.DC Characteristics” for
voltage levels.
*1 : Other operations except for indicated this column are prohibited.
*2 : WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
*3 : Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once.
*4 : It is also used for the extended sector group protections.
*5 : WP/ACC = VIL; protection of boot sectors.
WP/ACC = VIH; removal of boot sectors protection.
WP/ACC = VACC (9V) ; program time will reduce by 40%.
*6 : SA; Don’t care or Open.
6
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 1. 2 User Bus Operations (Flash=Word mode; CIOf=Vccf, SRAM=Byte mode; CIOs=Vss)
WP/
1,
3
6
6
CEf CE1s CE2s OE WE SA
DQ0 to DQ7 DQ8 to DQ15 RESET
LBs* UBs*
Operation * *
5
ACC*
H
X
X
L
Full Standby
H
H
L
X
X
X
X
X
High-Z
High-Z
H
H
X
H
X
H
X
X
X
X
H
X
H
High-Z
High-Z
High-Z
High-Z
L
H
Output Disable
X
H
X
H
X
H
X
L
X
L
H
L
H
H
L
X
X
X
X
X
X
X
X
X
High-Z
DOUT
DIN
High-Z
DOUT
DIN
X
L
2
L
H
H
X
X
Read from Flash *
Write to Flash
X
L
L
H
Read from SRAM
Write to SRAM
H
H
H
H
L
H
L
SA
SA
X
X
X
X
DOUT
DIN
High-Z
High-Z
H
H
X
X
L
X
Temporary Sector
Group
Unprotection*
X
X
X
X
X
X
X
X
X
X
VID
X
4
H
X
X
L
Flash Hardware
Reset
X
X
X
X
X
X
X
X
X
X
X
X
High-Z
X
High-Z
X
L
X
L
Boot Block Sector
Write Protection
X
X
X
Legend: L = VIL, H = VIH, X = VIL or VIH. See “ ELECTRICAL CHARACTERISTICS 1.DC Characteristics” for
voltage levels.
*1 : Other operations except for indicated this column are prohibited.
*2 : WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
*3 : Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once .
*4 : It is also used for the extended sector group protections.
*5 : WP/ACC = VIL; protection of boot sectors.
WP/ACC = VIH; removal of boot sectors protection.
WP/ACC = VACC (9V); program time will reduce by 40%.
*6 : LBs, UBs; Don’t care or Open.
7
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 1. 3 User Bus Operations (Flash=Byte mode; CIOf=Vss, SRAM=Byte mode; CIOs=Vss)
DQ0 to DQ8 to
WP/
ACC*
1,
3
6
6
CEf CE1s CE2s DQ15/A–1 OE WE SA
RESET
Operation * *
LBs* UBs*
5
DQ7
DQ14
H
X
X
L
Full Standby
H
H
L
X
X
X
X
X
X
High-Z High-Z
H
X
X
X
H
X
H
X
X
X
X
H
X
H
High-Z High-Z
High-Z High-Z
L
H
Output Disable
H
X
H
X
H
X
H
X
L
X
L
A–1
A–1
A–1
H
L
H
H
L
X
X
X
X
X
X
X
X
X
High-Z High-Z
X
L
2
L
DOUT
DIN
X
X
H
H
X
X
Read from Flash *
X
L
Write to Flash
L
H
Read from SRAM
Write to SRAM
H
H
H
H
X
X
L
H
L
SA
SA
X
X
X
X
DOUT High-Z
H
H
X
X
L
X
DIN
High-Z
Temporary Sector
Group
Unprotection*
X
X
X
X
X
X
X
X
X
X
X
VID
X
4
H
X
X
L
Flash Hardware
Reset
X
X
X
X
X
X
X
X
X
X
X
X
X
X
High-Z High-Z
L
X
L
Boot Block Sector
Write Protection
X
X
X
X
X
Legend: L = VIL, H = VIH, X = VIL or VIH. See “
ELECTRICAL CHARACTERISTICS 1.DC Characteristics” for
voltage levels.
*1 : Other operations except for indicated this column are prohibited.
*2 : WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
*3 : Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once.
*4 : It is also used for the extended sector group protections.
*5 : WP/ACC = VIL; protection of boot sectors.
WP/ACC = VIH; removal of boot sectors protection.
WP/ACC = VACC (9V); program time will reduce by 40%.
*6 : LBs, UBs; Don’t care or Open.
8
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ FLEXIBLE SECTOR-ERASE ARCHITECTURE on FLASH MEMORY
• Eight 4 K words and sixty three 32 K words
• Individual-sector, multiple-sector or bulk-erase capability
Word Mode
Byte Mode
1FFFFFh
1FF000h
1FE000h
1FD000h
1FC000h
1FB000h
1FA000h
1F9000h
1F8000h
1F0000h
1E8000h
1E0000h
1D8000h
1D0000h
1C8000h
1C0000h
1B8000h
1B0000h
1A8000h
1A0000h
198000h
190000h
188000h
180000h
178000h
170000h
168000h
160000h
158000h
150000h
148000h
140000h
138000h
130000h
128000h
120000h
118000h
110000h
108000h
100000h
0F8000h
0F0000h
0E8000h
0E0000h
0D8000h
0D0000h
0C8000h
0C0000h
0B8000h
0B0000h
0A8000h
0A0000h
098000h
090000h
088000h
080000h
078000h
070000h
068000h
060000h
058000h
050000h
048000h
040000h
038000h
030000h
028000h
020000h
018000h
010000h
008000h
000000h
3FFFFFh
3FE000h
3FC000h
3FA000h
3F8000h
3F6000h
3F4000h
3F2000h
3F0000h
3E0000h
3D0000h
3C0000h
3B0000h
3A0000h
390000h
380000h
370000h
360000h
350000h
340000h
330000h
320000h
310000h
300000h
2F0000h
2E0000h
2D0000h
2C0000h
2B0000h
2A0000h
290000h
280000h
270000h
260000h
250000h
240000h
230000h
220000h
210000h
200000h
1F0000h
1E0000h
1D0000h
1C0000h
1B0000h
1A0000h
190000h
180000h
170000h
160000h
150000h
140000h
130000h
120000h
110000h
100000h
0F0000h
0E0000h
0D0000h
0C0000h
0B0000h
0A0000h
090000h
080000h
070000h
060000h
050000h
040000h
030000h
020000h
010000h
000000h
SA70 : 8KB (4KW)
SA69 : 8KB (4KW)
SA68 : 8KB (4KW)
SA67 : 8KB (4KW)
SA66 : 8KB (4KW)
SA65 : 8KB (4KW)
SA64 : 8KB (4KW)
SA63 : 8KB (4KW)
SA62 : 64KB (32KW)
SA61 : 64KB (32KW)
SA60 : 64KB (32KW)
SA59 : 64KB (32KW)
SA58 : 64KB (32KW)
SA57 : 64KB (32KW)
SA56 : 64KB (32KW)
SA55 : 64KB (32KW)
SA54 : 64KB (32KW)
SA53 : 64KB (32KW)
SA52 : 64KB (32KW)
SA51 : 64KB (32KW)
SA50 : 64KB (32KW)
SA49 : 64KB (32KW)
SA48 : 64KB (32KW)
SA47 : 64KB (32KW)
SA46 : 64KB (32KW)
SA45 : 64KB (32KW)
SA44 : 64KB (32KW)
SA43 : 64KB (32KW)
SA42 : 64KB (32KW)
SA41 : 64KB (32KW)
SA40 : 64KB (32KW)
SA39 : 64KB (32KW)
SA38 : 64KB (32KW)
SA37 : 64KB (32KW)
SA36 : 64KB (32KW)
SA35 : 64KB (32KW)
SA34 : 64KB (32KW)
SA33 : 64KB (32KW)
SA32 : 64KB (32KW)
SA31 : 64KB (32KW)
SA30 : 64KB (32KW)
SA29 : 64KB (32KW)
SA28 : 64KB (32KW)
SA27 : 64KB (32KW)
SA26 : 64KB (32KW)
SA25 : 64KB (32KW)
SA24 : 64KB (32KW)
SA23 : 64KB (32KW)
SA22 : 64KB (32KW)
SA21 : 64KB (32KW)
SA20 : 64KB (32KW)
SA19 : 64KB (32KW)
SA18 : 64KB (32KW)
SA17 : 64KB (32KW)
SA16 : 64KB (32KW)
SA15 : 64KB (32KW)
SA14 : 64KB (32KW)
SA13 : 64KB (32KW)
SA12 : 64KB (32KW)
SA11 : 64KB (32KW)
SA10 : 64KB (32KW)
SA9 : 64KB (32KW)
SA8 : 64KB (32KW)
SA7 : 64KB (32KW)
SA6 : 64KB (32KW)
SA5 : 64KB (32KW)
SA4 : 64KB (32KW)
SA3 : 64KB (32KW)
SA2 : 64KB (32KW)
SA1 : 64KB (32KW)
SA0 : 64KB (32KW)
Bank 1
MB84VD22182EB/EE
Bank 1
MB84VD22183EB/EE
Bank 1
MB84VD22184EB/EE
Bank 2
MB84VD22182EB/EE
Bank 2
MB84VD22183EB/EE
Bank 2
MB84VD22184EB/EE
MB84VD2218XEB/EE Sector Architecture (Top Boot Block)
(Continued)
9
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Word Mode
Byte Mode
1FFFFFh
1F8000h
1F0000h
1E8000h
1E0000h
1D8000h
1D0000h
1C8000h
1C0000h
1B8000h
1B0000h
1A8000h
1A0000h
198000h
190000h
188000h
180000h
178000h
170000h
168000h
160000h
158000h
150000h
148000h
140000h
138000h
130000h
128000h
120000h
118000h
110000h
108000h
100000h
0F8000h
0F0000h
0E8000h
0E0000h
0D8000h
0D0000h
0C8000h
0C0000h
0B8000h
0B0000h
0A8000h
0A0000h
098000h
090000h
088000h
080000h
078000h
070000h
068000h
060000h
058000h
050000h
048000h
040000h
038000h
030000h
028000h
020000h
018000h
010000h
008000h
007000h
006000h
005000h
004000h
003000h
002000h
001000h
000000h
3FFFFFh
3F0000h
3E0000h
3D0000h
3C0000h
3B0000h
3A0000h
390000h
380000h
370000h
360000h
350000h
340000h
330000h
320000h
310000h
300000h
2F0000h
2E0000h
2D0000h
2C0000h
2B0000h
2A0000h
290000h
280000h
270000h
260000h
250000h
240000h
230000h
220000h
210000h
200000h
1F0000h
1E0000h
1D0000h
1C0000h
1B0000h
1A0000h
190000h
180000h
170000h
160000h
150000h
140000h
130000h
120000h
110000h
100000h
0F0000h
0E0000h
0D0000h
0C0000h
0B0000h
0A0000h
090000h
080000h
070000h
060000h
050000h
040000h
030000h
020000h
010000h
00E000h
00C000h
00A000h
008000h
006000h
004000h
002000h
000000h
SA70 : 64KB (32KW)
SA69 : 64KB (32KW)
SA68 : 64KB (32KW)
SA67 : 64KB (32KW)
SA66 : 64KB (32KW)
SA65 : 64KB (32KW)
SA64 : 64KB (32KW)
SA63 : 64KB (32KW)
SA62 : 64KB (32KW)
SA61 : 64KB (32KW)
SA60 : 64KB (32KW)
SA59 : 64KB (32KW)
SA58 : 64KB (32KW)
SA57 : 64KB (32KW)
SA56 : 64KB (32KW)
SA55 : 64KB (32KW)
SA54 : 64KB (32KW)
SA53 : 64KB (32KW)
SA52 : 64KB (32KW)
SA51 : 64KB (32KW)
SA50 : 64KB (32KW)
SA49 : 64KB (32KW)
SA48 : 64KB (32KW)
SA47 : 64KB (32KW)
SA46 : 64KB (32KW)
SA45 : 64KB (32KW)
SA44 : 64KB (32KW)
SA43 : 64KB (32KW)
SA42 : 64KB (32KW)
SA41 : 64KB (32KW)
SA40 : 64KB (32KW)
SA39 : 64KB (32KW)
SA38 : 64KB (32KW)
SA37 : 64KB (32KW)
SA36 : 64KB (32KW)
SA35 : 64KB (32KW)
SA34 : 64KB (32KW)
SA33 : 64KB (32KW)
SA32 : 64KB (32KW)
SA31 : 64KB (32KW)
SA30 : 64KB (32KW)
SA29 : 64KB (32KW)
SA28 : 64KB (32KW)
SA27 : 64KB (32KW)
SA26 : 64KB (32KW)
SA25 : 64KB (32KW)
SA24 : 64KB (32KW)
SA23 : 64KB (32KW)
SA22 : 64KB (32KW)
SA21 : 64KB (32KW)
SA20 : 64KB (32KW)
SA19 : 64KB (32KW)
SA18 : 64KB (32KW)
SA17 : 64KB (32KW)
SA16 : 64KB (32KW)
SA15 : 64KB (32KW)
SA14 : 64KB (32KW)
SA13 : 64KB (32KW)
SA12 : 64KB (32KW)
SA11 : 64KB (32KW)
SA10 : 64KB (32KW)
SA9 : 64KB (32KW)
SA8 : 64KB (32KW)
SA7 : 8KB (4KW)
SA6 : 8KB (4KW)
SA5 : 8KB (4KW)
SA4 : 8KB (4KW)
SA3 : 8KB (4KW)
SA2 : 8KB (4KW)
SA1 : 8KB (4KW)
SA0 : 8KB (4KW)
Bank 2
MB84VD22194EB/EE
Bank 2
MB84VD22193EB/EE
Bank 2
MB84VD22192EB/EE
Bank 1
MB84VD22194EB/EE
Bank 1
MB84VD22193EB/EE
Bank 1
MB84VD22192EB/EE
MB84VD2219XEB/EE Sector Architecture (Bottom Boot Block)
10
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 2.1 Sector Address Tables (MB84VD22182EB/EE)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA0
SA1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000000h to 00FFFFh
010000h to 01FFFFh
020000h to 02FFFFh
030000h to 03FFFFh
040000h to 04FFFFh
050000h to 05FFFFh
060000h to 06FFFFh
070000h to 07FFFFh
080000h to 08FFFFh
090000h to 09FFFFh
0A0000h to 0AFFFFh
000000h to 007FFFh
008000h to 00FFFFh
010000h to 017FFFh
018000h to 01FFFFh
020000h to 027FFFh
028000h to 02FFFFh
030000h to 037FFFh
038000h to 03FFFFh
040000h to 047FFFh
048000h to 04FFFFh
050000h to 057FFFh
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
0B0000h to 0BFFFFh 058000h to 05FFFFh
0C0000h to 0CFFFFh 060000h to 067FFFh
0D0000h to 0DFFFFh 068000h to 06FFFFh
0E0000h to 0EFFFFh
0F0000h to 0FFFFFh
100000h to 10FFFFh
110000h to 11FFFFh
120000h to 12FFFFh
130000h to 13FFFFh
140000h to 14FFFFh
070000h to 077FFFh
078000h to 07FFFFh
080000h to 087FFFh
088000h to 08FFFFh
090000h to 097FFFh
098000h to 09FFFFh
0A0000h to 0A7FFFh
Bank 2
150000h to 15FFFFh 0A8000h to 0AFFFFh
160000h to 16FFFFh 0B0000h to 0B7FFFh
170000h to 17FFFFh 0B8000h to 0BFFFFh
180000h to 18FFFFh 0C0000h to 0C7FFFh
190000h to 19FFFFh 0C8000h to 0CFFFFh
1A0000h to 1AFFFFh 0D0000h to 0D7FFFh
1B0000h to 1BFFFFh 0D8000h to 0DFFFFh
1C0000h to 1CFFFFh 0E0000h to 0E7FFFh
1D0000h to 1DFFFFh 0E8000h to 0EFFFFh
1E0000h to 1EFFFFh 0F0000h to 0F7FFFh
1F0000h to 1FFFFFh 0F8000h to 0FFFFFh
(Continued)
11
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA32
SA33
SA34
SA35
SA36
SA37
SA38
SA39
SA40
SA41
SA42
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
200000h to 20FFFFh
210000h to 21FFFFh
220000h to 22FFFFh
230000h to 23FFFFh
240000h to 24FFFFh
250000h to 25FFFFh
260000h to 26FFFFh
270000h to 27FFFFh
280000h to 28FFFFh
290000h to 29FFFFh
2A0000h to 2AFFFFh
100000h to 107FFFh
108000h to 10FFFFh
110000h to 117FFFh
118000h to 11FFFFh
120000h to 127FFFh
128000h to 12FFFFh
130000h to 137FFFh
138000h to 13FFFFh
140000h to 147FFFh
148000h to 14FFFFh
150000h to 157FFFh
SA43
Bank 2
2B0000h to 2BFFFFh 158000h to 15FFFFh
2C0000h to 2CFFFFh 160000h to 167FFFh
2D0000h to 2DFFFFh 168000h to 16FFFFh
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
SA53
SA54
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
2E0000h to 2EFFFFh
2F0000h to 2FFFFFh
300000h to 30FFFFh
310000h to 31FFFFh
320000h to 32FFFFh
330000h to 33FFFFh
340000h to 34FFFFh
170000h to 177FFFh
178000h to 17FFFFh
180000h to 187FFFh
188000h to 18FFFFh
190000h to 197FFFh
198000h to 19FFFFh
1A0000h to 1A7FFFh
350000h to 35FFFFh 1A8000h to 1AFFFFh
360000h to 36FFFFh 1B0000h to 1B7FFFh
370000h to 37FFFFh 1B8000h to 1BFFFFh
380000h to 38FFFFh 1C0000h to 1C7FFFh
390000h to 39FFFFh 1C8000h to 1CFFFFh
3A0000h to 3AFFFFh 1D0000h to 1D7FFFh
3B0000h to 3BFFFFh 1D8000h to 1DFFFFh
3C0000h to 3CFFFFh 1E0000h to 1E7FFFh
3D0000h to 3DFFFFh 1E8000h to 1EFFFFh
3E0000h to 3EFFFFh 1F0000h to 1F7FFFh
Bank 1
SA63
3F0000h to 3F1FFFh
3F2000h to 3F3FFFh
1F8000h to 1F8FFFh
1F9000h to 1F9FFFh
SA64
SA65
SA66
SA67
SA68
SA69
SA70
0
0
1
0
1
0
3F4000h to 3F5FFFh 1FA000h to 1FAFFFh
3F6000h to 3F7FFFh 1FB000h to 1FBFFFh
3F8000h to 3F9FFFh 1FC000h to 1FCFFFh
3FA000h to 3FAFFFh 1FD000h to 1FDFFFh
3FC000h to 3FCFFFh 1FE000h to 1FEFFFh
3FE000h to 3FFFFFh 1FF000h to 1FFFFFh
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
12
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 2.2 Sector Address Tables (MB84VD22192EB/EE)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA0
SA1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000000h to 001FFFh
002000h to 003FFFh
004000h to 005FFFh
006000h to 007FFFh
008000h to 009FFFh
00A000h to 00BFFFh
000000h to 000FFFh
001000h to 001FFFh
002000h to 002FFFh
003000h to 003FFFh
004000h to 004FFFh
005000h to 005FFFh
SA2
0
1
0
SA3
0
1
1
SA4
1
0
0
SA5
1
0
1
SA6
1
1
0
00C000h to 00DFFFh 006000h to 006FFFh
SA7
1
1
1
00E000h to 00FFFFh
010000h to 01FFFFh
020000h to 02FFFFh
030000h to 03FFFFh
040000h to 04FFFFh
050000h to 05FFFFh
060000h to 06FFFFh
070000h to 07FFFFh
080000h to 08FFFFh
090000h to 09FFFFh
0A0000h to 0AFFFFh
007000h to 007FFFh
008000h to 00FFFFh
010000h to 017FFFh
018000h to 01FFFFh
020000h to 027FFFh
028000h to 02FFFFh
030000h to 037FFFh
038000h to 03FFFFh
040000h to 047FFFh
048000h to 04FFFFh
050000h to 057FFFh
Bank 1
SA8
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
SA32
SA33
SA34
SA35
0B0000h to 0BFFFFh 058000h to 05FFFFh
0C0000h to 0CFFFFh 060000h to 067FFFh
0D0000h to 0DFFFFh 068000h to 06FFFFh
0E0000h to 0EFFFFh
0F0000h to 0FFFFFh
100000h to 10FFFFh
110000h to 11FFFFh
120000h to 12FFFFh
130000h to 13FFFFh
140000h to 14FFFFh
070000h to 077FFFh
078000h to 07FFFFh
080000h to 087FFFh
088000h to 08FFFFh
090000h to 097FFFh
098000h to 09FFFFh
0A0000h to 0A7FFFh
Bank 2
150000h to 15FFFFh 0A8000h to 0AFFFFh
160000h to 16FFFFh 0B0000h to 0B7FFFh
170000h to 17FFFFh 0B8000h to 0BFFFFh
180000h to 18FFFFh 0C0000h to 0C7FFFh
190000h to 19FFFFh 0C8000h to 0CFFFFh
1A0000h to 1AFFFFh 0D0000h to 0D7FFFh
1B0000h to 1BFFFFh 0D8000h to 0DFFFFh
1C0000h to 1CFFFFh 0E0000h to 0E7FFFh
(Continued)
13
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA36
SA37
SA38
SA39
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1D0000h to 1DFFFFh 0E8000h to 0EFFFFh
1E0000h to 1EFFFFh 0F0000h to 0F7FFFh
1F0000h to 1FFFFFh 0F8000h to 0FFFFFh
200000h to 20FFFFh
210000h to 21FFFFh
220000h to 22FFFFh
230000h to 23FFFFh
240000h to 24FFFFh
250000h to 25FFFFh
260000h to 26FFFFh
270000h to 27FFFFh
280000h to 28FFFFh
290000h to 29FFFFh
2A0000h to 2AFFFFh
100000h to 107FFFh
108000h to 10FFFFh
110000h to 117FFFh
118000h to 11FFFFh
120000h to 127FFFh
128000h to 12FFFFh
130000h to 137FFFh
138000h to 13FFFFh
140000h to 147FFFh
148000h to 14FFFFh
150000h to 157FFFh
2B0000h to 2BFFFFh 158000h to 15FFFFh
2C0000h to 2CFFFFh 160000h to 167FFFh
2D0000h to 2DFFFFh 168000h to 16FFFFh
SA53
SA54
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
2E0000h to 2EFFFFh
2F0000h to 2FFFFFh
300000h to 30FFFFh
310000h to 31FFFFh
320000h to 32FFFFh
330000h to 33FFFFh
340000h to 34FFFFh
170000h to 177FFFh
178000h to 17FFFFh
180000h to 187FFFh
188000h to 18FFFFh
190000h to 197FFFh
198000h to 19FFFFh
1A0000h to 1A7FFFh
Bank 2
350000h to 35FFFFh 1A8000h to 1AFFFFh
360000h to 36FFFFh 1B0000h to 1B7FFFh
370000h to 37FFFFh 1B8000h to 1BFFFFh
380000h to 38FFFFh 1C0000h to 1C7FFFh
390000h to 39FFFFh 1C8000h to 1CFFFFh
3A0000h to 3AFFFFh 1D0000h to 1D7FFFh
3B0000h to 3BFFFFh 1D8000h to 1DFFFFh
3C0000h to 3CFFFFh 1E0000h to 1E7FFFh
3D0000h to 3DFFFFh 1E8000h to 1EFFFFh
3E0000h to 3EFFFFh 1F0000h to 1F7FFFh
3F0000h to 3FFFFFh 1F8000h to 1FFFFFh
14
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 2.3 Sector Address Tables (MB84VD22183EB/EE)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA0
SA1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000000h to 00FFFFh
010000h to 01FFFFh
020000h to 02FFFFh
030000h to 03FFFFh
040000h to 04FFFFh
050000h to 05FFFFh
060000h to 06FFFFh
070000h to 07FFFFh
080000h to 08FFFFh
090000h to 09FFFFh
0A0000h to 0AFFFFh
000000h to 007FFFh
008000h to 00FFFFh
010000h to 017FFFh
018000h to 01FFFFh
020000h to 027FFFh
028000h to 02FFFFh
030000h to 037FFFh
038000h to 03FFFFh
040000h to 047FFFh
048000h to 04FFFFh
050000h to 057FFFh
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
0B0000h to 0BFFFFh 058000h to 05FFFFh
0C0000h to 0CFFFFh 060000h to 067FFFh
0D0000h to 0DFFFFh 068000h to 06FFFFh
0E0000h to 0EFFFFh
0F0000h to 0FFFFFh
100000h to 10FFFFh
110000h to 11FFFFh
120000h to 12FFFFh
130000h to 13FFFFh
140000h to 14FFFFh
070000h to 077FFFh
078000h to 07FFFFh
080000h to 087FFFh
088000h to 08FFFFh
090000h to 097FFFh
098000h to 09FFFFh
0A0000h to 0A7FFFh
Bank 2
150000h to 15FFFFh 0A8000h to 0AFFFFh
160000h to 16FFFFh 0B0000h to 0B7FFFh
170000h to 17FFFFh 0B8000h to 0BFFFFh
180000h to 18FFFFh 0C0000h to 0C7FFFh
190000h to 19FFFFh 0C8000h to 0CFFFFh
1A0000h to 1AFFFFh 0D0000h to 0D7FFFh
1B0000h to 1BFFFFh 0D8000h to 0DFFFFh
1C0000h to 1CFFFFh 0E0000h to 0E7FFFh
1D0000h to 1DFFFFh 0E8000h to 0EFFFFh
1E0000h to 1EFFFFh 0F0000h to 0F7FFFh
1F0000h to 1FFFFFh 0F8000h to 0FFFFFh
(Continued)
15
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA32
SA33
SA34
SA35
SA36
SA37
SA38
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
200000h to 20FFFFh
210000h to 21FFFFh
220000h to 22FFFFh
230000h to 23FFFFh
240000h to 24FFFFh
250000h to 25FFFFh
260000h to 26FFFFh
270000h to 27FFFFh
280000h to 28FFFFh
290000h to 29FFFFh
2A0000h to 2AFFFFh
100000h to 107FFFh
108000h to 10FFFFh
110000h to 117FFFh
118000h to 11FFFFh
120000h to 127FFFh
128000h to 12FFFFh
130000h to 137FFFh
138000h to 13FFFFh
140000h to 147FFFh
148000h to 14FFFFh
150000h to 157FFFh
SA39
Bank 2
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
SA53
SA54
SA55
SA56
SA57
SA58
2B0000h to 2BFFFFh 158000h to 15FFFFh
2C0000h to 2CFFFFh 160000h to 167FFFh
2D0000h to 2DFFFFh 168000h to 16FFFFh
2E0000h to 2EFFFFh
2F0000h to 2FFFFFh
300000h to 30FFFFh
310000h to 31FFFFh
320000h to 32FFFFh
330000h to 33FFFFh
340000h to 34FFFFh
170000h to 177FFFh
178000h to 17FFFFh
180000h to 187FFFh
188000h to 18FFFFh
190000h to 197FFFh
198000h to 19FFFFh
1A0000h to 1A7FFFh
350000h to 35FFFFh 1A8000h to 1AFFFFh
360000h to 36FFFFh 1B0000h to 1B7FFFh
370000h to 37FFFFh 1B8000h to 1BFFFFh
380000h to 38FFFFh 1C0000h to 1C7FFFh
390000h to 39FFFFh 1C8000h to 1CFFFFh
3A0000h to 3AFFFFh 1D0000h to 1D7FFFh
3B0000h to 3BFFFFh 1D8000h to 1DFFFFh
3C0000h to 3CFFFFh 1E0000h to 1E7FFFh
3D0000h to 3DFFFFh 1E8000h to 1EFFFFh
3E0000h to 3EFFFFh 1F0000h to 1F7FFFh
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
Bank 1
3F0000h to 3F1FFFh
3F2000h to 3F3FFFh
1F8000h to 1F8FFFh
1F9000h to 1F9FFFh
0
0
1
0
1
0
3F4000h to 3F5FFFh 1FA000h to 1FAFFFh
3F6000h to 3F7FFFh 1FB000h to 1FBFFFh
3F8000h to 3F9FFFh 1FC000h to 1FCFFFh
3FA000h to 3FAFFFh 1FD000h to 1FDFFFh
3FC000h to 3FCFFFh 1FE000h to 1FEFFFh
3FE000h to 3FFFFFh 1FF000h to 1FFFFFh
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
16
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 2.4 Sector Address Tables (MB84VD22193EB/EE)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA0
SA1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000000h to 001FFFh
002000h to 003FFFh
004000h to 005FFFh
006000h to 007FFFh
008000h to 009FFFh
00A000h to 00BFFFh
000000h to 000FFFh
001000h to 001FFFh
002000h to 002FFFh
003000h to 003FFFh
004000h to 004FFFh
005000h to 005FFFh
SA2
0
1
0
SA3
0
1
1
SA4
1
0
0
SA5
1
0
1
SA6
1
1
0
00C000h to 00DFFFh 006000h to 006FFFh
SA7
1
1
1
00E000h to 00FFFFh
010000h to 01FFFFh
020000h to 02FFFFh
030000h to 03FFFFh
040000h to 04FFFFh
050000h to 05FFFFh
060000h to 06FFFFh
070000h to 07FFFFh
080000h to 08FFFFh
090000h to 09FFFFh
0A0000h to 0AFFFFh
007000h to 007FFFh
008000h to 00FFFFh
010000h to 017FFFh
018000h to 01FFFFh
020000h to 027FFFh
028000h to 02FFFFh
030000h to 037FFFh
038000h to 03FFFFh
040000h to 047FFFh
048000h to 04FFFFh
050000h to 057FFFh
SA8
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
SA32
SA33
SA34
SA35
Bank 1
0B0000h to 0BFFFFh 058000h to 05FFFFh
0C0000h to 0CFFFFh 060000h to 067FFFh
0D0000h to 0DFFFFh 068000h to 06FFFFh
0E0000h to 0EFFFFh
0F0000h to 0FFFFFh
100000h to 10FFFFh
110000h to 11FFFFh
120000h to 12FFFFh
130000h to 13FFFFh
140000h to 14FFFFh
070000h to 077FFFh
078000h to 07FFFFh
080000h to 087FFFh
088000h to 08FFFFh
090000h to 097FFFh
098000h to 09FFFFh
0A0000h to 0A7FFFh
150000h to 15FFFFh 0A8000h to 0AFFFFh
160000h to 16FFFFh 0B0000h to 0B7FFFh
Bank 2
170000h to 17FFFFh 0B8000h to 0BFFFFh
180000h to 18FFFFh 0C0000h to 0C7FFFh
190000h to 19FFFFh 0C8000h to 0CFFFFh
1A0000h to 1AFFFFh 0D0000h to 0D7FFFh
1B0000h to 1BFFFFh 0D8000h to 0DFFFFh
1C0000h to 1CFFFFh 0E0000h to 0E7FFFh
(Continued)
17
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA36
SA37
SA38
SA39
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1D0000h to 1DFFFFh 0E8000h to 0EFFFFh
1E0000h to 1EFFFFh 0F0000h to 0F7FFFh
1F0000h to 1FFFFFh 0F8000h to 0FFFFFh
200000h to 20FFFFh
210000h to 21FFFFh
220000h to 22FFFFh
230000h to 23FFFFh
240000h to 24FFFFh
250000h to 25FFFFh
260000h to 26FFFFh
270000h to 27FFFFh
280000h to 28FFFFh
290000h to 29FFFFh
2A0000h to 2AFFFFh
100000h to 107FFFh
108000h to 10FFFFh
110000h to 117FFFh
118000h to 11FFFFh
120000h to 127FFFh
128000h to 12FFFFh
130000h to 137FFFh
138000h to 13FFFFh
140000h to 147FFFh
148000h to 14FFFFh
150000h to 157FFFh
2B0000h to 2BFFFFh 158000h to 15FFFFh
2C0000h to 2CFFFFh 160000h to 167FFFh
2D0000h to 2DFFFFh 168000h to 16FFFFh
SA53
SA54
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
2E0000h to 2EFFFFh
2F0000h to 2FFFFFh
300000h to 30FFFFh
310000h to 31FFFFh
320000h to 32FFFFh
330000h to 33FFFFh
340000h to 34FFFFh
170000h to 177FFFh
178000h to 17FFFFh
180000h to 187FFFh
188000h to 18FFFFh
190000h to 197FFFh
198000h to 19FFFFh
1A0000h to 1A7FFFh
Bank 2
350000h to 35FFFFh 1A8000h to 1AFFFFh
360000h to 36FFFFh 1B0000h to 1B7FFFh
370000h to 37FFFFh 1B8000h to 1BFFFFh
380000h to 38FFFFh 1C0000h to 1C7FFFh
390000h to 39FFFFh 1C8000h to 1CFFFFh
3A0000h to 3AFFFFh 1D0000h to 1D7FFFh
3B0000h to 3BFFFFh 1D8000h to 1DFFFFh
3C0000h to 3CFFFFh 1E0000h to 1E7FFFh
3D0000h to 3DFFFFh 1E8000h to 1EFFFFh
3E0000h to 3EFFFFh 1F0000h to 1F7FFFh
3F0000h to 3FFFFFh 1F8000h to 1FFFFFh
18
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 2.5 Sector Address Tables (MB84VD22184EB/EE)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA0
SA1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000000h to 00FFFFh
010000h to 01FFFFh
020000h to 02FFFFh
030000h to 03FFFFh
040000h to 04FFFFh
050000h to 05FFFFh
060000h to 06FFFFh
070000h to 07FFFFh
080000h to 08FFFFh
090000h to 09FFFFh
0A0000h to 0AFFFFh
000000h to 007FFFh
008000h to 00FFFFh
010000h to 017FFFh
018000h to 01FFFFh
020000h to 027FFFh
028000h to 02FFFFh
030000h to 037FFFh
038000h to 03FFFFh
040000h to 047FFFh
048000h to 04FFFFh
050000h to 057FFFh
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
0B0000h to 0BFFFFh 058000h to 05FFFFh
0C0000h to 0CFFFFh 060000h to 067FFFh
0D0000h to 0DFFFFh 068000h to 06FFFFh
0E0000h to 0EFFFFh
0F0000h to 0FFFFFh
100000h to 10FFFFh
110000h to 11FFFFh
120000h to 12FFFFh
130000h to 13FFFFh
140000h to 14FFFFh
070000h to 077FFFh
078000h to 07FFFFh
080000h to 087FFFh
088000h to 08FFFFh
090000h to 097FFFh
098000h to 09FFFFh
0A0000h to 0A7FFFh
Bank 2
150000h to 15FFFFh 0A8000h to 0AFFFFh
160000h to 16FFFFh 0B0000h to 0B7FFFh
170000h to 17FFFFh 0B8000h to 0BFFFFh
180000h to 18FFFFh 0C0000h to 0C7FFFh
190000h to 19FFFFh 0C8000h to 0CFFFFh
1A0000h to 1AFFFFh 0D0000h to 0D7FFFh
1B0000h to 1BFFFFh 0D8000h to 0DFFFFh
1C0000h to 1CFFFFh 0E0000h to 0E7FFFh
1D0000h to 1DFFFFh 0E8000h to 0EFFFFh
1E0000h to 1EFFFFh 0F0000h to 0F7FFFh
1F0000h to 1FFFFFh 0F8000h to 0FFFFFh
(Continued)
19
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA32
SA33
SA34
SA35
SA36
SA37
SA38
SA39
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
200000h to 20FFFFh
210000h to 21FFFFh
220000h to 22FFFFh
230000h to 23FFFFh
240000h to 24FFFFh
250000h to 25FFFFh
260000h to 26FFFFh
270000h to 27FFFFh
280000h to 28FFFFh
290000h to 29FFFFh
2A0000h to 2AFFFFh
100000h to 107FFFh
108000h to 10FFFFh
110000h to 117FFFh
118000h to 11FFFFh
120000h to 127FFFh
128000h to 12FFFFh
130000h to 137FFFh
138000h to 13FFFFh
140000h to 147FFFh
148000h to 14FFFFh
150000h to 157FFFh
2B0000h to 2BFFFFh 158000h to 15FFFFh
2C0000h to 2CFFFFh 160000h to 167FFFh
2D0000h to 2DFFFFh 168000h to 16FFFFh
2E0000h to 2EFFFFh
2F0000h to 2FFFFFh
300000h to 30FFFFh
310000h to 31FFFFh
320000h to 32FFFFh
330000h to 33FFFFh
340000h to 34FFFFh
170000h to 177FFFh
178000h to 17FFFFh
180000h to 187FFFh
188000h to 18FFFFh
190000h to 197FFFh
198000h to 19FFFFh
1A0000h to 1A7FFFh
SA51
SA52
SA53
SA54
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
Bank 1
350000h to 35FFFFh 1A8000h to 1AFFFFh
360000h to 36FFFFh 1B0000h to 1B7FFFh
370000h to 37FFFFh 1B8000h to 1BFFFFh
380000h to 38FFFFh 1C0000h to 1C7FFFh
390000h to 39FFFFh 1C8000h to 1CFFFFh
3A0000h to 3AFFFFh 1D0000h to 1D7FFFh
3B0000h to 3BFFFFh 1D8000h to 1DFFFFh
3C0000h to 3CFFFFh 1E0000h to 1E7FFFh
3D0000h to 3DFFFFh 1E8000h to 1EFFFFh
3E0000h to 3EFFFFh 1F0000h to 1F7FFFh
3F0000h to 3F1FFFh
3F2000h to 3F3FFFh
1F8000h to 1F8FFFh
1F9000h to 1F9FFFh
0
0
1
0
1
0
3F4000h to 3F5FFFh 1FA000h to 1FAFFFh
3F6000h to 3F7FFFh 1FB000h to 1FBFFFh
3F8000h to 3F9FFFh 1FC000h to 1FCFFFh
3FA000h to 3FAFFFh 1FD000h to 1FDFFFh
3FC000h to 3FCFFFh 1FE000h to 1FEFFFh
3FE000h to 3FFFFFh 1FF000h to 1FFFFFh
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
20
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 2.6 Sector Address Tables (MB84VD22194EB/EE)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA0
SA1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
000000h to 001FFFh
002000h to 003FFFh
004000h to 005FFFh
006000h to 007FFFh
008000h to 009FFFh
00A000h to 00BFFFh
000000h to 000FFFh
001000h to 001FFFh
002000h to 002FFFh
003000h to 003FFFh
004000h to 004FFFh
005000h to 005FFFh
SA2
0
1
0
SA3
0
1
1
SA4
1
0
0
SA5
1
0
1
SA6
1
1
0
00C000h to 00DFFFh 006000h to 006FFFh
SA7
1
1
1
00E000h to 00FFFFh
010000h to 01FFFFh
020000h to 02FFFFh
030000h to 03FFFFh
040000h to 04FFFFh
050000h to 05FFFFh
060000h to 06FFFFh
070000h to 07FFFFh
080000h to 08FFFFh
090000h to 09FFFFh
0A0000h to 0AFFFFh
007000h to 007FFFh
008000h to 00FFFFh
010000h to 017FFFh
018000h to 01FFFFh
020000h to 027FFFh
028000h to 02FFFFh
030000h to 037FFFh
038000h to 03FFFFh
040000h to 047FFFh
048000h to 04FFFFh
050000h to 057FFFh
SA8
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA26
SA27
SA28
SA29
SA30
SA31
SA32
SA33
SA34
Bank 1
0B0000h to 0BFFFFh 058000h to 05FFFFh
0C0000h to 0CFFFFh 060000h to 067FFFh
0D0000h to 0DFFFFh 068000h to 06FFFFh
0E0000h to 0EFFFFh
0F0000h to 0FFFFFh
100000h to 10FFFFh
110000h to 11FFFFh
120000h to 12FFFFh
130000h to 13FFFFh
140000h to 14FFFFh
070000h to 077FFFh
078000h to 07FFFFh
080000h to 087FFFh
088000h to 08FFFFh
090000h to 097FFFh
098000h to 09FFFFh
0A0000h to 0A7FFFh
150000h to 15FFFFh 0A8000h to 0AFFFFh
160000h to 16FFFFh 0B0000h to 0B7FFFh
170000h to 17FFFFh 0B8000h to 0BFFFFh
180000h to 18FFFFh 0C0000h to 0C7FFFh
190000h to 19FFFFh 0C8000h to 0CFFFFh
1A0000h to 1AFFFFh 0D0000h to 0D7FFFh
1B0000h to 1BFFFFh 0D8000h to 0DFFFFh
(Continued)
21
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Sector Address
Address Range Address Range
Bank Sector
Bank Address
(Byte mode)
(Word mode)
A20 A19 A18 A17 A16 A15 A14 A13 A12 A11
SA35
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1C0000h to 1CFFFFh 0E0000h to 0E7FFFh
1D0000h to 1DFFFFh 0E8000h to 0EFFFFh
1E0000h to 1EFFFFh 0F0000h to 0F7FFFh
1F0000h to 1FFFFFh 0F8000h to 0FFFFFh
SA36
Bank 1
SA37
SA38
SA39
SA40
SA41
SA42
SA43
SA44
SA45
SA46
SA47
SA48
SA49
SA50
SA51
SA52
SA53
200000h to 20FFFFh
210000h to 21FFFFh
220000h to 22FFFFh
230000h to 23FFFFh
240000h to 24FFFFh
250000h to 25FFFFh
260000h to 26FFFFh
270000h to 27FFFFh
280000h to 28FFFFh
290000h to 29FFFFh
2A0000h to 2AFFFFh
100000h to 107FFFh
108000h to 10FFFFh
110000h to 117FFFh
118000h to 11FFFFh
120000h to 127FFFh
128000h to 12FFFFh
130000h to 137FFFh
138000h to 13FFFFh
140000h to 147FFFh
148000h to 14FFFFh
150000h to 157FFFh
2B0000h to 2BFFFFh 158000h to 15FFFFh
2C0000h to 2CFFFFh 160000h to 167FFFh
2D0000h to 2DFFFFh 168000h to 16FFFFh
2E0000h to 2EFFFFh
2F0000h to 2FFFFFh
300000h to 30FFFFh
310000h to 31FFFFh
320000h to 32FFFFh
330000h to 33FFFFh
340000h to 34FFFFh
170000h to 177FFFh
178000h to 17FFFFh
180000h to 187FFFh
188000h to 18FFFFh
190000h to 197FFFh
198000h to 19FFFFh
1A0000h to 1A7FFFh
SA54
Bank 2
SA55
SA56
SA57
SA58
SA59
SA60
SA61
SA62
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
350000h to 35FFFFh 1A8000h to 1AFFFFh
360000h to 36FFFFh 1B0000h to 1B7FFFh
370000h to 37FFFFh 1B8000h to 1BFFFFh
380000h to 38FFFFh 1C0000h to 1C7FFFh
390000h to 39FFFFh 1C8000h to 1CFFFFh
3A0000h to 3AFFFFh 1D0000h to 1D7FFFh
3B0000h to 3BFFFFh 1D8000h to 1DFFFFh
3C0000h to 3CFFFFh 1E0000h to 1E7FFFh
3D0000h to 3DFFFFh 1E8000h to 1EFFFFh
3E0000h to 3EFFFFh 1F0000h to 1F7FFFh
3F0000h to 3FFFFFh 1F8000h to 1FFFFFh
22
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 3.1 Sector Group Address (MB84VD2218XEB/EE)
(Top Boot Block)
Sector Group
A20
A19
A18
A17
A16
0
A15
0
A14
A13
A12
Sectors
SGA0
0
0
0
0
X
X
X
SA0
0
1
SGA1
0
0
0
0
1
0
X
X
X
SA1 to SA3
1
1
SGA2
SGA3
SGA4
SGA5
SGA6
SGA7
SGA8
SGA9
SGA10
SGA11
SGA12
SGA13
SGA14
SGA15
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA4 to SA7
SA8 to SA11
SA12 to SA15
SA16 to SA19
SA20 to SA23
SA24 to SA27
SA28 to SA31
SA32 to SA35
SA36 to SA39
SA40 to SA43
SA44 to SA47
SA48 to SA51
SA52 to SA55
SA56 to SA59
SGA16
1
1
1
1
0
1
X
X
X
SA60 to SA62
1
0
SGA17
SGA18
SGA19
SGA20
SGA21
SGA22
SGA23
SGA24
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
SA63
SA64
SA65
SA66
SA67
SA68
SA69
SA70
1
1
1
1
1
1
1
1
1
1
1
1
1
1
23
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 3.2 Sector Group Address (MB84VD2219XEB/EE)
(Bottom Boot Block)
Sector Group
SGA0
A20
0
A19
0
A18
0
A17
0
A16
0
A15
0
A14
0
A13
0
A12
0
Sectors
SA0
SGA1
0
0
0
0
0
0
0
0
1
SA1
SGA2
0
0
0
0
0
0
0
1
0
SA2
SGA3
0
0
0
0
0
0
0
1
1
SA3
SGA4
0
0
0
0
0
0
1
0
0
SA4
SGA5
0
0
0
0
0
0
1
0
1
SA5
SGA6
0
0
0
0
0
0
1
1
0
SA6
SGA7
0
0
0
0
0
0
1
1
1
SA7
0
1
SGA8
0
0
0
0
1
0
X
X
X
SA8 to SA10
1
1
SGA9
SGA10
SGA11
SGA12
SGA13
SGA14
SGA15
SGA16
SGA17
SGA18
SGA19
SGA20
SGA21
SGA22
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA11 to SA14
SA15 to SA18
SA19 to SA22
SA23 to SA26
SA27 to SA30
SA31 to SA34
SA35 to SA38
SA39 to SA42
SA43 to SA46
SA47 to SA50
SA51 to SA54
SA55 to SA58
SA59 to SA62
SA63 to SA66
SGA23
SGA24
1
1
1
1
1
1
1
1
0
1
X
X
X
X
X
X
SA67 to SA69
SA70
1
0
1
1
24
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 4 Flash Memory Autoselect Codes
Type
A12 to A19
A6
A1
A0
A–1*1
VIL
VIL
X
Code (HEX)
04h
Manufacturer’s Code
X
VIL
VIL
VIL
Byte
Word
Byte
55h
MB84VD22182EB
MB84VD22182EE
X
X
X
X
X
X
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIL
VIH
VIH
VIH
VIH
VIH
2255h
56h
VIL
X
MB84VD22192EB
MB84VD22192EE
Word
Byte
2256h
50h
VIL
X
MB84VD22183EB
MB84VD22183EE
Word
Byte
2250h
53h
Device
Code
VIL
X
MB84VD22193EB
MB84VD22193EE
Word
Byte
2253h
5Ch
VIL
X
MB84VD22184EB
MB84VD22184EE
Word
Byte
225Ch
5Fh
VIL
X
MB84VD22194EB
MB84VD22194EE
VIL
VIL
VIL
VIH
VIH
VIL
Word
225Fh
Sector Group
Address
Sector Group Protection
*1: A–1 is for Byte mode.
VIL
01h*2
*2: Output 01h at protected sector address and output 00h at unprotected sector address.
25
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Table 5 Flash Memory Command Definitions
Fourth Bus
Bus
Write
Cycles
Req’d
First Bus
Second Bus
Write Cycle
Third Bus
Fifth Bus
Sixth Bus
Read/Write
Cycle
Command
Sequence
Write Cycle
Write Cycle
Write Cycle Write Cycle
Addr. Data Addr. Data
Addr. Data Addr. Data Addr. Data Addr. Data
1
1
3
XXXh F0h
—
—
—
—
—
—
—
—
—
—
Read/Reset *
Word
Byte
555h
AAh
2AAh
555h
555h
AAAh
1
55h
F0h
RA
RD
—
—
—
—
Read/Reset*
AAAh
(BA)
555h
Word
Byte
555h
AAh
2AAh
555h
Autoselect
3
55h
90h
—
—
—
—
—
—
—
—
(BA)
AAAh
AAAh
Word
Byte
Word
Byte
Word
Byte
555h
AAh
2AAh
555h
2AAh
555h
2AAh
555h
—
555h
AAAh
555h
AAAh
555h
AAAh
—
Program
4
6
6
55h
55h
55h
A0h
80h
80h
PA
PD
—
—
AAAh
555h
AAh
555h
AAAh
555h
AAAh
—
2AAh
555h
2AAh
555h
—
555h
Chip Erase
AAh
AAh
55h
55h
10h
30h
AAAh
AAAh
555h
AAh
Sector Erase
SA
AAAh
Sector Erase Suspend
Sector Erase Resume
1
1
BA
BA
B0h
30h
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Word
Byte
Word
Byte
Word
Byte
555h
AAAh
2AAh
555h
555h
AAAh
Set to
Fast Mode
3
2
2
AAh
55h
PD
20h
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Fast Program *2
XXXh A0h
BA
PA
—
—
Reset from Fast
Mode*2
F0h*6
90h XXXh
—
Word
Byte
Extended
Sector Group
4
XXXh 60h SPA
55h
60h
SPA
40h SPA
SD
—
—
—
—
Protection*3
Word
Byte
Word
Byte
Word
Byte
Word
Byte
Query*4
1
3
4
6
98h
AAh
AAh
AAh
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
AAh
555h
AAAh
555h
AAAh
555h
AAAh
2AAh
555h
2AAh
555h
2AAh
555h
555h
AAAh
555h
AAAh
555h
AAAh
Hi-ROM Entry
55h
55h
55h
88h
A0h
80h
Hi-ROM
Program*5
PA
PD
AAh
555h
2AAh
555h
Hi-ROM
Erase*5
55h HRA 30h
AAAh
(HRBA)
555h
Word
Byte
555h
2AAh
555h
Hi-ROM Exit*5
4
AAh
55h
90h XXXh 00h
—
—
—
—
(HRBA)
AAAh
AAAh
*1 : Both Read/Reset commands are functionally equivalent, resetting the device to the Read mode.
*2 : This command is valid during Fast Mode.
*3 : This command is valid during RESET=VID.
*4 : The valid address is A0 to A6.
*5 : This command is valid during Hi-ROM mode.
*6 : The data “00h” is also acceptable.
26
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
Address bits A11 to A20 = X = “H” or “L” for all address commands except for Program Address (PA),
Sector Address (SA) and Bank Address (BA).
Bus operations are defined in Table 2 "User Bus Operations".
RA = Address of the memory location to be read
PA = Address of the memory location to be programmed
Addresses are latched on the falling edge of the write pulse.
SA = Address of the sector to be erased
The combination of A20, A19, A18, A17, A16, A15, A14, A13, and A12 will uniquely select any sector.
BA = Bank address (A15 to A20)
SPA = Sector group address to be protected
Set sector group address (SGA) and (A6, A1, A0) = (0, 1, 0).
HRA= Address of the Hidden-ROM area
MB84VD2218XEB/EE (Top Boot Type)
Word mode: 1F8000h to 1FFFFFh
Byte mode: 3F0000h to 3FFFFFh
MB84VD2219XEB/EE (Bottom Boot Type) Word mode: 000000h to 007FFFh
Byte mode: 000000h to 00FFFFh
HRBA = Bank address of the Hidden-ROM area
MB84VD2218XEB/EE (Top Boot Type)
: A15 = A16 = A17 = A18 = A19 = A20 = 1
MB84VD2219XEB/EE (Bottom Boot Type) : A15 = A16 = A17 = A18 = A19 = A20 = 0
RD = Data read from location RA during read operation
PD = Data to be programmed at location PA
SD = Sector protection verify data
Output 01h at protected sector addresses and output 00h at unprotected sector addresses.
The system should generate the following address patterns;
Word mode : 555h or 2AAh to addresses A0 to A10
Byte mode : AAAh or 555h to addresses A–1 and A0 to A10
27
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Unit
Min.
–55
–25
Max.
+125
Storage Temperature
Ambient Temperature with Power Applied
Tstg
TA
°C
°C
V
+85
1
VCCf +0.4
VCCs +0.4
+4.0
Voltage with Respect to Ground All pins *
except RESET and WP/ACC
VIN, VOUT
–0.3
V
1
VCCf/VCCs Supply *
VCCf, VCCs
VIN
–0.3
–0.5
–0.5
V
2
RESET *
+ 13.0
+10.5
V
3
WP/ACC *
VIN
V
*1 : Minimum DC voltage on input or I/O pins is –0.3 V. During voltage transitions, input or I/O pins may undershoot
VSS to –2.0 V for periods of up to 20 ns. Maximum DC voltage on input or I/O pins is VCCf +0.4 V or VCCs+0.4 V.
During voltage transitions, input or I/O pins may overshoot to VCCf+2.0 V or VCCs+2.0 V for periods of up to 20 ns.
*2 : Minimum DC input voltage on RESET pin is –0.5 V. During voltage transitions, RESET pins may undershoot
VSS to –2.0 V for periods of up to 20 ns.
Voltage difference between input and supply voltage (VIN-VCCf or VCCs) does not exceed 9.0 V.
Maximum DC input voltage on RESET pin is +13.0 V which may overshoot to 14.0 V for periods of up to 20 ns.
*3 : Minimum DC input voltage on WP/ACC pin is –0.5 V. During voltage transitions, WP/ACC pin may undershoot
Vss to –2.0 V for periods of up to 20 ns. Maximum DC input voltage on WP/ACC pin is +10.5 V which may
overshoot to 12.0 V for periods of up to 20 ns, when VCCf is applied.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Unit
Min.
–25
Max.
+85
Ambient Temperature
VCCf/VCCs Supply Voltages
TA
°C
V
VCCf, VCCs
+2.7
+3.3
Note: Operating ranges define those limits between which the functionality of the device is guaranteed.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
28
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ ELECTRICAL CHARACTERISTICS
1. DC Characteristics
Value
Symbol
Parameter
Test Conditions
VIN = VSS to VCCf, VCCs
Unit
Min.
–1.0
–1.0
Typ.
—
Max.
+1.0
+1.0
Input Leakage Current
Output Leakage Current
ILI
µA
µA
ILO
VOUT = VSS to VCCf, VCCs
—
RESET Inputs Leakage
Current
VCCf= VCCf Max., VCCs= VCCs Max.,
RESET = 12.5V
ILIT
ILIA
—
—
—
—
35
20
µA
ACC Input Leakage
Current
VCCf= VCCf Max.,VCCs= VCCs Max.,
WP/ACC = VACC Max.
mA
tCYCLE = 5 MHz Byte
—
—
—
—
—
—
—
—
16
18
7
mA
tCYCLE = 5 MHz Word
tCYCLE = 1 MHz Byte
tCYCLE = 1 MHz Word
Flash VCC Active Current
CEf = VIL,
OE = VIH
ICC1f
1
(Read)*
mA
mA
mA
7
Flash VCC Active Current
ICC2f
ICC3f
CEf = VIL, OE = VIH
CEf = VIL, OE = VIH
—
—
35
2
(Program / Erase) *
Byte
Word
Byte
Word
—
—
—
—
—
—
—
—
51
53
51
53
Flash VCC Active Current
5
(Read-While-Program)*
Flash VCC Active Current
ICC4f
ICC5f
CEf = VIL, OE = VIH
CEf = VIL, OE = VIH
mA
mA
5
(Read-While-Erase)*
Flash VCC Active Current
(Erase-Suspend-Program)
—
—
—
—
35
40
VCCs = VCC Max.,
CE1s = VIL,
SRAM VCC Active Current
SRAM VCC Active Current
Flash VCC Standby Current
ICC1s
tCYCLE =10 MHz
mA
CE2s = VIH
CE1s = 0.2 V,
ICC2s CE2s = VCCs – 0.2 V
tCYCLE = 10 MHz
tCYCLE = 1 MHz
—
—
—
—
40
8
mA
mA
VCCf = VCC Max., CEf = VCCf ± 0.3 V,
ISB1f
RESET = VCCf ± 0.3 V,
—
—
1
1
5
5
µA
µA
WP/ACC = VCCf ± 0.3 V
Flash VCC Standby Current
(RESET)
VCCf = VCC Max., RESET = VSS ± 0.3 V,
WP/ACC = VCCf± 0.3 V
ISB2f
VCCf = VCC Max., CEf = VSS ± 0.3 V,
RESET = VCCf ± 0.3 V,
Flash VCC Current
(Automatic Sleep Mode)*
ISB3f
—
1
5
µA
3
WP/ACC = VCCf ± 0.3 V
VIN = VCCf± 0.3 V or VSS ± 0.3 V
SRAM VCC Standby Current
ISB1s
CE1s > VCCs – 0.2 V, CE2s > VCCs – 0.2 V
—
—
—
—
7
7
µA
µA
SRAM VCC Standby Current ISB2s CE2s < 0.2 V
(Continued)
29
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Value
Symbol
Parameter
Test Conditions
Unit
Min.
–0.3
2.4
Typ.
—
Max.
0.5
Input Low Level
VIL
VIH
—
—
V
V
VCC+0.3*6
Input High Level
—
Voltage for Sector
Protection, and Temporary
Sector Unprotection
VID
—
11.5
—
12.5
V
4
(RESET)*
Voltage for Program
Acceleration (WP/ACC) *
VACC
VOL
—
8.5
—
9.0
—
—
—
9.5
0.4
—
V
V
V
V
4
VCCf = VCCf Min.,VCCs = VCCs Min.,
IOL=1.0 mA
Output Low Voltage Level
Output High Voltage Level
VCCf = VCCf Min.,VCCs = VCCs Min.,
IOH=-0.5 mA
VOH
VLKO
2.4
2.3
Flash Low VCCf Lock-Out
Voltage
—
2.5
*1 : The ICC current listed includes both the DC operating current and the frequency dependent component.
*2 : ICC active while Embedded Algorithm (program or erase) is in progress.
*3 : Automatic sleep mode enables the low power mode when address remains stable for 150 ns.
*4 : Applicable for only VCCf applying.
*5 : Embedded Algorithm (program or erase) is in progress (@5 MHz).
*6 : VCC indicates lower of VCCf or VCCs.
30
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
2. AC Characteristics
• CE Timing
Symbol
Value
Parameter
CE Recover Time
Test Setup
Unit
JEDEC Standard
Min.
Max.
—
tCCR
—
0
—
ns
• Timing Diagram for Alternating SRAM to Flash
CEf
tCCR
tCCR
CE1s
CE2s
tCCR
tCCR
31
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Read Only Operations Characteristics (Flash)
Symbol
Value (Note)
Parameter
Read Cycle Time
Test Setup
Unit
JEDEC
tAVAV
Standard
Min.
Max.
tRC
—
85
—
ns
ns
CEf = VIL
OE = VIL
Address to Output Delay
tAVQV
tACC
—
85
Chip Enable to Output Delay
Output Enable to Output Delay
Chip Enable to Output High-Z
Output Enable to Output High-Z
tELQV
tGLQV
tEHQZ
tGHQZ
tCE
tOE
tDF
tDF
OE = VIL
—
—
—
—
85
35
30
30
ns
ns
ns
ns
—
—
—
Output Hold Time From Addresses,
CEf or OE, Whichever Occurs First
tAXQX
—
tOH
—
—
0
—
ns
µs
RESET Pin Low to Read Mode
tREADY
—
20
Note: Test Conditions
Output Load:1 TTL gate and 30 pF
Input Rise and Fall Times: 5 ns
Input Pulse Levels: 0.0 V or 3.0 V
Timing Measurement Reference Level
Input: 1.5 V
Output: 1.5 V
32
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Read Cycle (Flash)
tRC
Address Stable
Address
tACC
CEf
tOE
tDF
OE
tOEH
WE
DQ
tCE
High-Z
High-Z
Output Valid
tRC
Address
CEf
Address Stable
tACC
tRH
tRH
tCE
tRP
RESET
DQ
tOH
High-Z
Output Valid
33
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Erase/Program Operations Characteristics (Flash)
Symbol
Value
Typ.
—
Parameter
Unit
JEDEC
tAVAV
tAVWL
—
Standard
Min.
85
0
Max.
—
Write Cycle Time
tWC
tAS
ns
ns
ns
ns
Address Setup Time (WE to Addr.)
—
—
Address Setup Time to CEf Low During Toggle Bit Polling
Address Hold Time (WE to Addr.)
tASO
tAH
15
45
—
—
tWLAX
—
—
Address Hold Time from CE or OE High During Toggle Bit
Polling
—
tAHT
0
—
—
ns
Data Setup Time
tDVWH
tWHDX
—
tDS
tDH
35
0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
s
Data Hold Time
Output Enable Setup Time
tOES
0
Read
Output Enable Hold Time
0
—
tOEH
Toggle and Data Polling
10
20
20
0
CEf High During Toggle Bit Polling
OE High During Toggle Bit Polling
Read Recover Time Before Write (OE to CEf)
Read Recover Time Before Write (OE to WE)
WE Setup Time (CEf to WE)
CEf Setup Time (WE to CEf)
WE Hold Time (CEf to WE)
CEf Hold Time (WE to CEf)
Write Pulse Width
—
tCEPH
tOEPH
tGHEL
tGHWL
tWS
—
tGHEL
tGHWL
tWLEL
tELWL
tEHWH
tWHEH
tWLWH
tELEH
tWHWL
tEHEL
0
0
tCS
0
tWH
0
tCH
0
tWP
35
35
30
30
—
—
—
CEf Pulse Width
tCP
Write Pulse Width High
tWPH
tCPH
CEf Pulse Width High
Byte Programming Operation
Word Programming Operation
tWHWH1
tWHWH1
tWHWH2
16
1
1
tWHWH2
Sector Erase Operation *
(Continued)
34
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
(Continued)
Symbol
Value
Typ.
—
Parameter
Unit
JEDEC
—
Standard
Min.
50
Max.
—
VCCf Setup Time
tVCS
tVLHT
tVIDR
tVACCR
tRB
µs
µs
ns
ns
ns
ns
ns
ns
ns
µs
µs
2
—
4
—
—
Voltage Transition Time *
2
—
500
500
0
—
—
Rise Time to VID
*
Rise Time to VACC
—
—
—
Recover Time from RY/BY
—
—
—
RESET Pulse Width
—
tRP
500
—
—
—
Delay Time from Embedded Output Enable
RESET High Level Period Before Read
Program/Erase Valid to RY/BY Delay
—
tEOE
tRH
—
85
—
—
200
—
—
—
tBUSY
tTOW
tSPD
—
90
—
3
Erase Time-out Time *
—
50
—
4
—
—
—
20
Erase Suspend Transition Time *
*1 : This does not include the preprogramming time.
*2 : This timing is for Sector Protection Operation.
*3 : The time between writes must be less than “tTOW” otherwise that command will not be accepted and erasure
will start. A time-out or “tTOW” from the rising edge of last CEf or WE whichever happens first will initiate the
execution of the Sector Erase command(s).
*4 : When the Erase Suspend command is written during the Sector Erase operation, the device will take maximum
of “tSPD” to suspend the erase operation.
35
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle (WE control) (Flash)
3rd Bus Cycle
Data Polling
555h
PA
PA
Address
CEf
tWC
tRC
tAS
tAH
tCH
tCS
tCE
OE
tGHWL
tOE
tWHWH1
tWP
tWPH
WE
tOH
tDS
tDH
PD
DOUT
DOUT
A0h
DQ7
DQ
Notes: • PA is the address of the memory location to be programmed.
• PD is the data to be programmed at byte address.
• DQ7 is the output of the complement of the data written to the device.
• DOUT is the output of the data written to the device.
• Figure indicates last two bus cycles out of four bus cycle sequence.
• These waveforms are for the ×16 mode (the addresses differ from ×8 mode).
36
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle (CEf control) (Flash)
3rd Bus Cycle
Data Polling
Address
PA
PA
555h
tWC
tAH
tAS
WE
tWS
tWH
OE
tGHEL
tWHWH1
tCP
tCPH
CEf
tDS
tDH
PD
DOUT
DQ7
A0h
DQ
Notes: • PA is the address of the memory location to be programmed.
• PD is the data to be programmed at byte address.
• DQ7 is the output of the complement of the data written to the device.
• DOUT is the output of the data written to the device.
• Figure indicates last two bus cycles out of four bus cycle sequence.
• These waveforms are for the ×16 mode (the addresses differ from ×8 mode).
37
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• AC Waveforms Chip/Sector Erase Operations (Flash)
SA*
2AAh
555h
2AAh
555h
555h
Address
CEf
tWC
tAS
tAH
tCS
tCH
OE
tWP
tWPH
tGHWL
WE
tDS
tDH
30h for Sector Erase
10h/
30h
AAh
AAh
55h
80h
55h
DQ
tVCS
VCCf
*: SA is the sector address for Sector Erase. Address = 555h for Chip Erase.
Note: These waveforms are for the ×16 mode (the addresses differ from ×8 mode).
38
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• AC Waveforms for Data Polling during Embedded Algorithm Operations (Flash)
CEf
tCH
tDF
tOE
OE
tOEH
WE
t
CE
*
High-Z
High-Z
DQ7 =
Data In
Data In
DQ7
DQ7
Valid Data
tWHWH1 or 2
DQ
(DQ0 to DQ6)
DQ0 to DQ6
Valid Data
DQ0 to DQ6 = Output Flag
tBUSY
tEOE
RY/BY
*: DQ7 = Valid Data (the device has completed the Embedded operation).
39
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• AC Waveforms for Toggle Bit during Embedded Algorithm Operations (Flash)
Address
tAHT
tASO
tAHT
tAS
CEf
tCEPH
WE
OE
tOEH
tOEH
tOEPH
*
tOE
tCE
tDH
Toggle
Data
Toggle
Data
Toggle
Data
Stop
Toggling
Output
Valid
DQ6/DQ2
RY/BY
Data
tBUSY
* : DQ6 stops toggling (the device has completed the Embedded operation).
40
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Back-to-back Read/Write Timing Diagram (Flash)
Read
Command
Read
Command
Read
Read
tRC
tWC
tRC
tWC
tRC
tRC
BA2
BA2
(PA)
BA2
(PA)
Address
CEf
BA1
BA1
BA1
(555h)
tACC
tCE
tAS
tAS
tAH
tAHT
tOE
tCEPH
OE
WE
DQ
tDF
tGHWL
tOEH
tWP
tDS
tDH
tDF
Valid
Output
Valid
Valid
Output
Valid
Valid
Output
Status
Intput
Intput
(A0h)
(PD)
Note: This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2.
BA1: Address of Bank 1.
BA2: Address of Bank 2.
41
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• RY/BY Timing Diagram during Write/Erase Operations (Flash)
CEf
The rising edge of the last write pulse
WE
Entire programming
or erase operations
RY/BY
tBUSY
• RESET, RY/BY Timing Diagram (Flash)
WE
RESET
tRP
tRB
RY/BY
tREADY
42
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Temporary Sector Group Unprotection (Flash)
VCCf
tVIDR
tVCS
tVLHT
VID
3V
3V
RESET
CEf
WE
tVLHT
tVLHT
Program or Erase Command Sequence
Unprotection Period
RY/BY
43
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Extended Sector Group Protection (Flash)
VCCf
tVCS
RESET
tVLHT
tVIDR
tWC
tWC
Address
SGAx
SGAx
SGAy
A6, A0
A1
CEf
OE
TIME-OUT
tWP
WE
Data
60h
60h
60h
40h
01h
tOE
SGAx: Sector Group Address to be protected
SGAy : Next Group Sector Address to be protected
TIME-OUT : Time-Out window = 250 µs (Min.)
44
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Accelerated Program (Flash)
VCC
tVACCR
tVCS
tVLHT
VACC
3 V
3 V
WP/ACC
CEf
WE
tVLHT
tVLHT
Program Command Sequence
Acceleration Period
RY/BY
45
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Read Cycle (SRAM)
Parameter
Value
Symbol
Unit
Min.
85
—
—
—
—
—
5
Max.
—
Read Cycle Time
tRC
tAA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
85
85
85
45
85
—
Chip Enable (CE1s) Access Time
tCO1
tCO2
tOE
Chip Enable (CE2s) Access Time
Output Enable Access Time
LBs, UBs to Output Valid
tBA
Chip Enable (CE1s Low and CE2s High) to Output Active
Output Enable Low to Output Active
LBs, UBs Enable Low to Output Active
Chip Enable (CE1s High or CE2s Low) to Output High-Z
Output Enable High to Output High-Z
LBs, UBs Output Enable to Output High-Z
Output Data Hold Time
tCOE
tOEE
tBE
0
—
0
—
tOD
—
—
—
10
35
35
35
—
tODO
tBD
tOH
Note : Test Conditions
Output Load : 1TTL gate and 30 pF
Input Rise and Fall Times : 5 ns
Input Pulse Levels : 0.0 V to VCCs
Timing Measurement Reference Level
Input : 0.5 × VCCs
Output : 0.5 × VCCs
46
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Read Cycle (SRAM)
tRC
Address
tAA
tOH
tCO1
CE1s
CE2s
tCOE
tOD
tCO2
tOD
tOE
OE
tODO
tOEE
LBs, UBs
tBA
tBD
tBE
tCOE
DQ
Valid Data Out
Note : WE remains “H” during the read cycle.
47
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle (SRAM)
Parameter
Value
Symbol
Unit
Min.
85
60
70
70
70
0
Max.
—
Write Cycle Time
Write Pulse Width
tWC
tWP
tCW
tAW
tBW
tAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
Chip Enable to End of Write
Address valid to End of Write
UBs, LBs to End of Write
Address Setup Time
—
—
—
—
Write Recovery Time
WE Low to Output High-Z
WE High to Output Active
Data Setup Time
tWR
tODW
tOEW
tDS
0
—
—
0
35
—
35
0
—
Data Hold Time
tDH
—
48
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle *3 (WE control) (SRAM)
tWC
Address
tAS
tWP
tWR
WE
CE1s
CE2s
tAW
tCW
tCW
tBW
LBs, UBs
tOEW
tODW
DOUT
1
2
*
*
tDS
tDH
4
4
DIN
Valid Data In
*
*
*1 : If CE1s goes “L” (or CE2s goes “H”) coincident with or after WE goes “L”, the output will
remain at High-Z.
*2 : If CE1s goes “H” (or CE2s goes “L”) coincident with or before WE goes “H”, the output will
remain at High-Z.
*3 : If OE is “H” during the write cycle, the outputs will remain at High-Z.
*4 : Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
49
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle * 1 (CE1s control) (SRAM)
tWC
Address
tAS
tWP
tWR
WE
tAW
tCW
CE1s
CE2s
tCW
tBW
LBs, UBs
tBE
tCOE
tODW
DOUT
tDS
tDH
2
DIN
Valid Data In
*
*1 : If OE is “H” during the write cycle, the outputs will remain at High-Z.
*2 : Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
50
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle * 1 (CE2s Control) (SRAM)
tWC
Address
tAS
tWP
tWR
WE
tCW
CE1s
CE2s
tAW
tCW
tBW
LBs, UBs
tBE
tCOE
tODW
DOUT
tDS
tDH
2
DIN
Valid Data In
*
*1 : If OE is “H” during the write cycle, the outputs will remain at High-Z.
*2 : Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
51
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• Write Cycle *1 (LBs, UBs Control) (SRAM)
tWC
Address
tWP
tWR
WE
tCW
CE1s
tCW
CE2s
tAW
tBW
tAS
LBs, UBs
tBE
tCOE
tODW
DOUT
tDS
tDH
2
Valid Data In
*
DIN
*1 : If OE is “H” during the write cycle, the outputs will remain at High-Z.
*2 : Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
52
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ ERASE AND PROGRAMMING PERFORMANCE (Flash)
Limits
Parameter
Unit
Comment
Min.
Typ.
Max.
Excludes programming time
prior to erasure
Sector Erase Time
—
1
10
s
Excludes system-level
overhead
Byte Programming Time
Word Programming Time
—
—
8
300
360
µs
µs
Excludes system-level
overhead
16
Excludes system-level
overhead
Chip Programming Time
Erase/Program Cycle
—
—
—
100
—
s
100,000
cycle
■ DATA RETENTION CHARACTERISTICS (SRAM)
Value
Unit
Parameter
Symbol
Min.
Typ.
Max.
3.3
7
Data Retention Supply Voltage
VDH
IDDS2
tCDR
tR
1.5
—
0
—
V
Standby Current
VDH = 3.0 V
1.5
—
µA
ns
ns
Chip Deselect to Data Retention Mode Time
Recovery Time
—
tRC
—
—
Note: tRC: Read Cycle Time
• CE1s Controlled Data Retention Mode *1
VCCs
DATA RETENTION MODE
2.7 V
2
2
*
*
VIH
VDH
VCCS –0.2 V
CE1s
tCDR
tR
GND
53
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
• CE2s Controlled Data Retention Mode *3
VCCs
DATA RETENTION MODE
2.7 V
VDH
VIH
CE2s
tCDR
tR
VIL
0.2 V
GND
*1 : In CE1s controlled data retention mode, input level of CE2s should be fixed Vccs to Vccs–0.2 V or Vss
to 0.2 V during data retention mode. Other input and input/output pins can be used between –0.3 V and Vccs
+ 0.3 V.
*2 : When CE1s is operating at the VIH Min. level (2.2 V), the standby current is given by ISB1s during the transition
of VCCs from 3.6 V to 2.2 V.
*3 : In CE2s controlled data retention mode, input and input/output pins can be used between –0.3 V and Vccs + 0.3 V.
■ PIN CAPACITANCE
Value
Parameter
Symbol
CIN
Test Setup
VIN = 0
Unit
Typ.
11
Max.
14
Input Capacitance
pF
pF
pF
pF
Output Capacitance
COUT
CIN2
CIN3
VOUT = 0
VIN = 0
VIN = 0
12
16
Control Pin Capacitance
WP/ACC Pin Capacitance
14
16
21.5
26
Note: Test conditions TA = 25°C, f = 1.0 MHz
■ HANDLING OF PACKAGE
Please handle this package carefully since the sides of package are created with acute angles.
■ CAUTION
• The high voltage (VID) cannot apply to address pins and control pins except RESET. Exception is when
autoselect and sector protection function are used. Then the high voltage (VID) can be applied to RESET.
• Without the high voltage (VID), sector protection can be achieved by using “Extended Sector Protection”
command.
54
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ ORDERING INFORMATION
MB84VD2218
X
EB
-85
-PBS
PACKAGE TYPE
PBS = 73-ball BGA
SPEED OPTION
See Product Selector Guide
Device Revision (Valid Combination)
EB
EE
Bank Size
2 = 4 Mbit / 28 Mbit
3 = 8 Mbit / 24 Mbit
4 = 16 Mbit / 16 Mbit
DEVICE NUMBER/DESCRIPTION
32 Mega-bit (4 M × 8-bit or 2 M × 16-bit) Dual Operation Flash Memory
3.0 V-only Read, Program, and Erase
4 Mega-bit (512 K × 8-bit or 256 K × 16-bit) SRAM
BOOT CODE SECTOR ARCHITECTURE
84VD2218 = Top sector
84VD2219 = Bottom sector
55
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
■ PACKAGE DIMENSION
73-pin plastic FBGA
(BGA-73P-M01)
8.80(.346)
7.20(.283)
11.60±0.10(.457±.004)
1.25 +–00..1105 .049 –+..000046
5.60(.220)REF
0.80(.031)
(Mounting height)
0.38±0.10
(Stand off)
(.015±.004)
10
9
8
7
6
5
4
3
2
1
0.80(.031)
8.00±0.10
(.315±.004)
5.60(.220)
REF
7.20(.283)
M
L
K
J
H
G
F
E
D
C
B
A
INDEX-MARK AREA
INDEX BALL
73-Ø0.45 –+00..0150
73-Ø0.18 –+..000024
M
0.08(.003)
0.10(.004)
Dimension in mm (inches)
C
1999 FUJITSU LIMITED B73001S-1C-1
56
MB84VD2218XEB/EE-85/MB84VD2219XEB/EE-85
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0109
FUJITSU LIMITED Printed in Japan
相关型号:
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