MB15C700 [FUJITSU]
Built-in IF Band Voltage Controlled Oscillator Mask ROM Frequency Synthesizer; 内置的IF频段压控振荡器掩膜ROM频率合成器
| 型号： | MB15C700 |
| 厂家： | 
FUJITSU |
| 描述： | Built-in IF Band Voltage Controlled Oscillator Mask ROM Frequency Synthesizer |
| 文件： | 总18页 (文件大小：149K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS06-80106-2E
SEMICUSTOM
Built-in IF Band Voltage Controlled Oscillator
Mask ROM Frequency Synthesizer
MB15C700 series
■ DESCRIPTION
MB15C700 series is a Phase Locked Loop (PLL) frequency synthesizer of pulse swallow operation with built-in
VCO suitable for Intermediate Frequency band synthesizer of mobile phones.
The VCO can operate option oscillation frequency by an external inductance and capacitor. The PLL reference
divider ratio and comparison divider ratio are fixed , so that it is not required to set the divider ratios by a
microcontroller externally. BCC-20 plastic package is miniaturized the device and makes it easier to design.
It operates with a supply voltage of 2.5 V typ. (PLLVDD, VCOVDD) and low power consumption current 4.5 mA
typ. (PLL + VCO at 400 MHz) is realized by pure- CMOS technology.
■ FEATURES
<<PLL>>
• Pulse swallow function
• 400 MHz High-speed Prescaler : 8/9, 16/17, 32/33
• MASK ROM optinal the comparison and reference dividers :
Comparison counter : Main counter : 5 to 4095, Swallow counter : 0 to 31
Reference counter : 5 to 4095 (up to 26 MHZ)
• Lock detector circuit: Digital lock detector circuit which is “H” level when PLL is locked.
(Continued)
■ PACKAGE
20-pad, plastic BCC
LCC-20P-M04
MB15C700 series
(Continued)
• Charge pump options :
H type: Super charger circuit for high speed tuning. (IOH = −4.5 mA, IOL = 4.5 mA at PLLVDD = 2.5 V)
L type : Low sensitivity charge pump for direct modulation. (IOH = −1.125 mA, IOL = 1.125 mA at PLLVDD = 2.5 V)
<<VCO>>
• Integrates vari-cap for VCO
• Operating frequency can be arranged by the number of the external inductor and capacitor connected TANK
circuit
<<COMMON>>
• Low power supply voltage : 2.3 V to 2.7 V
• Low power supply current : 4.5 mA typ. (PLLVDD = VCOVDD = 2.5 V, fvco = 400 MHz)
• Operating temperature : −20 °C to +85 °C
■ PIN ASSIGNMENT
(Top View)
VCOTNKO
VCOout
VCOTNKI
N.C.
17
VCOGND
1
20
19
18
16
PLLPS
PLLfin
2
3
15
14
13
12
N.C.
VCOCNT
VCOPS
PLLGND
PLLDo
N.C.
4
5
VCOVDD
LD
6
7
8
9
10
11
N.C.
N.C.
fout
OSCin
PLLVDD
LCC-20P-M04
2
MB15C700 series
■ PIN DESCRIPTIONS
Pin
No.
Symbol
I/O
Descriptions
1
VCOGND
N.C.
Ground for the VCO.
No connection.
2
VCO control voltage input.
Connection to PLLDo terminal via LPF.
3
4
5
6
VCOCNT
VCOPS
VCOVDD
LD
I
I
Power saving control for the VCO. (Open is prohibited.)
“H” : Normal mode
“L” : Power saving mode
Power supply voltage input for VCO.
Connect to capacitor between GND.
Lock detector signal output.
LD = “H” : Locking mode or power saving mode
LD = “L” : Unlocking mode.
O
7
8
N.C.
OSCin
fout
No connection.
The reference counter input.
Connect with a AC coupling capacitor.
I
9
O
Test purpose output. This pin is an open drain output.
Power supply voltage input for the PLL.
Connect to capacitor between GND
10
PLLVDD
11
12
N.C.
N.C.
No connection
No connection.
PLL charge pump output.
Connect to VCOCNT pin via LPF.
13
14
15
PLLDo
PLLGND
PLLfin
O
Ground for the PLL.
Prescaler input.
Connect with an AC coupling capacitor.
I
I
Power saving control for the PLL. (Open is prohibited.)
“H”: Normal mode
16
PLLPS
“L”: Power saving mode
17
18
N.C.
No connection.
VCO output.
VCOout
O
I
VCOTANK circuit input.
Connect to VCOTNKO pin with inductance and resistance.
Connect to capacitor between GND.
19
20
VCOTNKI
VCOTANK circuit output.
Connect to VCOTNKI terminal with inductance and resistance.
Connect to capacitor between GND. (max.2.0 pF)
VCOTNKO
O
3
MB15C700 series
■ BLOCK DIAGRAM
PLLVDD
OSCin
10
8
Phase
comparator
Lock
detector
Buffer Amp.
Reference counter (R)
LD
6
9
fout
Power saving
control circuit
PLLPS
16
Output
selector
PLL-Block
Charge pump
PLLDo
13
3
Swallow counter (A)
Main counter (N)
VCOCNT
Prescaler (P)
PLLfin
Buffer Amp.
15
14
19 VCOTNKI
PLLGND
VCO-Block
Control
circuit
VCOTNKO
20
18 VCOout
4
14
5
VCOVDD
VCOPS
VCOGND
■ FUNCTIONAL DESCRIPTIONS
Divide ratios of the internal counters can be set optionally according to customer requirements.
The divide ratio can be calculated using the following equation.
fvco = [ (P × N + A) ] × fosc / R
Note: N > A, P > A
fvco
fosc
N
: Output frequency of Voltage Controlled Oscillator (VCOout up to 400 MHz)
: Reference oscillation frequency (up to 26 MHz)
: Divide ratio of the main counter (5 to 4095)
A
: Divide ratio of the swallow counter (0 to 31)
P
: Preset divide ratio of dual modulus prescaler (8/9, 16/17, 32/33)
: Divide ratio of the reference counter (5 to 4095)
R
4
MB15C700 series
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Unit
Min.
Max.
PLLVDD
Power supply voltage
VDD
−0.5
4.0
V
VCOVDD
Output voltage
Input voltage
VO
VI
−0.5
−0.5
0
VDD+0.5
VDD+0.5
+5.0
V
V
Output current
Storage temperature
IO
mA
°C
Tstg
−55
+125
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Unit
Min.
Typ.
Max.
PLLVDD
VCOVDD
VIN
Ta
Power supply voltage
VDD
2.3
2.5
2.7
V
Input voltage
GND
VDD
V
Operating temperature
−20
+85
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
5
MB15C700 series
■ ELECTRICAL CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
Value
Parameter
Power supply current
Power saving current
Symbol
Condition
Unit
Min.
Typ.*
Max.
PLLVDD
VCOVDD
PLLVDD
VCOVDD
IPLL
IVCO
IPLLPS
IVCOPS
PLLVDD = VCOVDD = 2.5 V
PLL-Lock (400 MHz)
4.5
mA
PLLPS = “L”
VCOPS = “L”
1.0
10.0
1.0
µA
µA
AC coupling by 1000 pF
capacitor
PLLfin
OSCin
fin
100
3
400
26
MHz
MHz
Operating frequency
Input sensitivity
AC coupling by 1000 pF
capacitor
fOSC
AC coupling by 1000 pF
capacitor
OSCin
OSCin
VOSC
IOSC
VOH
VOL
IOH
0.5
Vp-p
Input current
−100
100
0.4
µA
PLLVDD
−0.8
Output voltage
IOH = −0.3 mA
IOL = 0.3 mA
Charge pump type : H PLLDo
Charge pump type : L
V
PLLVDD = 2.5 V
VOH = 1.5 V
−4.5
4.5
Output current
PLLDo
mA
Type : H
PLLVDD = 2.5 V
VOL = 1.0 V
IOL
IOH
IOL
PLLVDD = 2.5 V
VOH = 1.5 V
−1.125
1.125
Output current
PLLDo
mA
nA
Type : L
PLLVDD = 2.5 V
VOL = 1.0 V
High impedance
PLLDo
IOFF
0 V ≤ PLLVDO ≤ PLLVDD
3.0
cutoff current
*: PLLVDD = VCOVDD = 2.5 V, Ta = +25 °C
6
MB15C700 series
■ REFERENCE CHARACTERISTICS
(PLLVDD = VCOVDD = 2.5 V, Ta = +25 °C)
Value
Unit
Parameter
Symbol
Condition
Min.
Typ.
Max.
fVCO1 (at VCOCNT = 0.8 V) −
fVCO2 (at VCOCNT = 1.8 V)
VCO variable range ∆f
4.0
MHz
dBm
VCO output level
VVCOout
−12
−67
−70
Lef1
∆±fr
SYN reference
leakage
dBc
dBc
dBc
Lef2
∆± (fr × 2)
SYN output S/N
SYN output C/N
S/N
∆1 kHz
C/N1
C/N2
Lsp1
Lsp2
Lsp3
Lsp4
Lsp5
Lsp6
Lsp7
Lsp8
Lsp9
Lsp10
∆±50 kHz
−68
−74
−3
∆±100 kHz
2nd Harmonic (∆fVCO)
3rd Harmonic (∆ (fVCO × 2) )
4th Harmonic (∆ (fVCO × 3) )
Other (∆ (fVCO × 4) )
TRX band (∆ (fVCO × 5) )
TRX band (∆ (fVCO × 6) )
∆ (fVCO × 7)
−10
−18
−30
−35
−40
−50
−55
−55
−60
Spurious
dBc
∆ (fVCO × 8)
∆ (fVCO × 9)
∆ (fVCO × 10)
PLLPS “L” to “H”
Lock-up time
TLOCK
fVCO within ± 300 Hz,
VVCOout = −12 ± 3 dBm
4.0
ms
V
VCO operating
control voltage range
VCOVDD
∆VCNT
0.5
− 0.2
*1 : An external components (inductance and capacitor) connected with VCOTANK are recommended to use an
component with nominal value within 2%.
*2 : An capacitor connected between VCOTNKO and GND is less than 2.0 pF.
*3 : The condition of above reference data is fr ≥ 50 kHz.
7
MB15C700 series
■ PHASE COMPARATOR OUTPUT WAVE FORM
fr
fp
tWU
tWL
LD
"Z"
PLLDo
"Z" High impedance
Notes : • Phase error detection range : −2π to +2π
• Spikes on Do pulse during locking state are output to prevent dead zone
• LD output becomes “L” level when phase error is tWU or more.
• LD output becomes “H” level when phase error is tWL or less and continues to be so for three
cycles or more.
• tWU and tWL depend on OSCin input frequency.
tWU ≥ 8/fOSC [s] : i.e. tWU ≥ 625 ns, fOSC = 12.8 MHz
tWL ≤ 16/fOSC [s] : i.e. tWL ≤ 1250 ns, fOSC = 12.8 MHz
8
MB15C700 series
■ TYPICAL CHARACTERISTICS
1. fin input sensitivity
fin input sensitivity vs. input frequency
10
5
0
−5
SPEC
−10
−15
−20
−25
−30
−35
−40
−45
−50
PLLVDD = 2.3 V
PLLVDD = 2.5 V
PLLVDD = 2.7 V
0
100
200
300
400
500
600
700
800
900
Input frequency fin (MHz)
2. OSCin input sensitivity
OSCin input sensitivity vs. input frequency
Ta = +25 °C, DIV = "H"
10
5
VCC = 2.4 V
VCC = 3.0 V
VCC = 3.6 V
SPEC
0
−5
−10
−15
−20
−25
−30
−35
−40
−45
−50
0
10
20
30
40
50
60
70
80
90
100
Input frequency fOSC (MHz)
9
MB15C700 series
3. Do output current
PLLVDD = 2.5 V
Ta = +25 °C
IOL
8.0
6.0
4.0
2.0
0.0
−2.0
−4.0
−6.0
−8.0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
VO (V)
PLLVDD = 2.5 V
Ta = +25 °C
IOH
8.0
6.0
4.0
2.0
0.0
−2.0
−4.0
−6.0
−8.0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
VO (V)
10
MB15C700 series
■ REFERENCE CHARACTERISTICS DATA
PLLVDD = VCOVDD = 2.5 V, Ta = +25 °C
fVCO = 129.55 MHz, OSCin = 12.8 MHz, fr = 50 kHz
[Measurement circuit]
<VCOTANK CIRCUIT>
<Loop Filter>
3.3 kΩ
DOPLL
VCOCNT
VCOTNKI
2200 pF
3000 pF
12 pF
220 nH
510 kΩ
3.3 kΩ
22000 pF
VCOTNKO
1.5 pF
1. Measurement result
Parameter
Condition
Result
fVCO1 (@VCOCNT = 0.8 V) −
fVCO2 (@VCOCNT = 1.8 V)
VCO variable range
∆f
8.657
MHz
Lref1 (+)
Lref1 (−)
Lref2 (+)
Lref2 (−)
S/N
∆+fr
−67.3
−66.7
−72
∆−fr
Reference leakage
S/N
dBc
dBc
∆+ (fr × 2)
∆− (fr × 2)
−72
∆1 kHz
−71.3
−108
−108
−113
−113
−4.2
C/N1 (+)
C/N1 (−)
C/N2 (+)
C/N2 (−)
Lsp1
∆+50 kHz
∆−50 kHz
C/N (BW = 21kHz)
dBc/Hz
∆+100 kHz
∆−100 kHz
2nd Harmonic (∆fVCO)
3rd Harmonic (∆ (fVCO × 2) )
4th Harmonic (∆ (fVCO × 3) )
Other (∆ (fVCO × 4) )
TRX band (∆ (fVCO × 5)
TRX band (∆ (fVCO × 6) )
∆ (fVCO × 7)
Lsp2
−10.8
−23.3
−26.0
−29.2
−35.7
−44.3
−49.2
−51.7
−60.7
Lsp3
Lsp4
Lsp5
Spurious
dBc
Lsp6
Lsp7
Lsp8
∆ (fVCO × 8)
Lsp9
∆ (fVCO × 9)
Lsp10
∆ (fVCO × 10)
PLLPS “L” to “H”
Lock-up time
TLOCK
fVCO within ± 300 Hz,
VVCOout = −12 ± 3 dBm
0.622
ms
11
MB15C700 series
2. Characteristics wave form
• VVCOCNT− fVCOout Characteristics
VCOVDD = 2.5 V, Ta = 25 °C
134.0
132.0
130.0
128.0
126.0
124.0
122.0
120.0
0.0
0.5
1.0
1.5
2.0
2.5
VVCOCNT (V)
• Spectrum Wave Form (Reference Leakage)
Ref-leak ∆ (50 kHz)
ATTEN 10 dB
RL −10.0 dBm
∆MKR −67.33 dB
50.0 kHz
10 dB/
D
S
CENTER 129.5500 MHz
RBW 1.0 kHz
SPAN 250.0 kHz
SWP 6.30 s
VBW 100 Hz
12
MB15C700 series
• Spectrum Wave Form (C/N, S/N, Sprious, Lock-up Time)
C/N ∆ (50 kHz)
S/N ∆ (1 kHz)
ATTEN 10 dB
∆MKR −71.33 dB
ATTEN 10 dB
∆MKR −108.0 dB/Hz
RL −10.0 dBm 10 dB/
1.000 kHz
RL −10.0 dBm 10 dB/
50.0 kHz
D
S
D
S
CENTER 129.550037 MHz SPAN 2.000 kHz
RBW 30 Hz VBW 3.0 Hz SWP 3.00 s
CENTER 129.5504 MHz
SPAN 250.0 kHz
SWP 21.0 s
VBW 30 Hz
RBW 1.0 kHz
Sprious
Lock up time (PSmode to Lock, fVCO within ± 300 Hz)
ATTEN 10 dB
RL −10.0 dBm 10 dB/
∆MKR −4.17 dB
131 MHz
(hp) Freq C tlk only
waiting for trigger
129.554000 MHz
129.550000 MHz
D
S
129.546000 MHz
−
1.000 ms
4
.000 ms
9.000 ms
START 120 MHz
STOP 1.600 GHz
1
.000 ms div
/
RBW 1.0 MHz VBW 1.0 kHz
SWP 5.00 s
T
F
1
1
667
µ
s
T
F
2
2
1.289 ms
129.550290 MHz
∆
∆
622
µs
129.549710 MHz
580 Hz
Std Dev 1.32866 kHz
13
MB15C700 series
■ APPLICATION EXAMPLE
1000 pF
1 µF
13
15
11
14
12
PLLGND
PLLDo
N.C.
N.C.
PLLfin
16 PLLPS
PLLVDD 10
17
N.C.
fout
9
8
7
OSCin
N.C.
18
19
20
VCOout
AC Coupling
VCOTNKI
VCOTNKO
LD 6
VCOVDD
Max.2.0 pF
VCOCNT
3
VCOGND
1
N.C.
2
VCOPS
4
5
LPF
1000 pF
1 µF
14
MB15C700 series
■ USAGE PRECAUTIONS
To protect against damage by electrostatic discharge, note the following handling precautions:
• Store and transport devices in conductive containers.
• Use properly grounded workstations, tools, and equipment.
• Turn off power before inserting device into or removing device from a socket.
• Protect leads with a conductive sheet when transporting a board-mounted device.
■ ORDERING INFORMATION
Part number
MB15C700PV
Package
Remarks
20-pad, Plastic BCC
(LCC-20P-M04)
15
MB15C700 series
■ PACKAGE DIMENSION
20-pad, plastic BCC
(LCC-20P-M04)
3.00(.118)TYP
0.25±0.10
3.60±0.10(.142±.004)
0.80(.031)MAX
(Mounting height)
(.010±.004)
16
11
11
16
0.50(.020)
TYP
0.25±0.10
(.010±.004)
INDEX AREA
3.40±0.10
(.134±.004)
2.70(.106)
TYP
"D"
"A"
"B"
"C"
1
6
6
1
0.50(.020)
TYP
2.80(.110)REF
0.085±0.04
(.003±.002)
(Stand off)
0.05(.002)
Details of "A" part
Details of "B" part
Details of "C" part
Details of "D" part
0.50±0.10
0.50±0.10
0.50±0.10
0.30±0.10
(.020±.004)
(.020±.004)
(.020±.004)
(.012±.004)
C0.20(.008)
0.60±0.10
(.024±.004)
0.30±0.10
(.012±.004)
0.60±0.10
(.024±.004)
0.40±0.10
(.016±.004)
C
1999 FUJITSU LIMITED C20055S-1C-1
Dimensions in mm (inches)
16
MB15C700 series
■ CUSTOMER REQUESTING SPECIFICATIONS
Parameter
Option
Requirements
100 to 400 MHz
fVCO = [ (P × N) + A] × fr (N > A, P > A)
fVCO
fORC
VCO output frequency
Reference oscillation
frequency
3 to 26 MHz
fOSC = R × fr
N
A
P
R
fr
Main counter divide ratio
Swallow counter divide ratio
Prescaler divide ratio
5 to 4095
0 to 31
Comparison
divider
8/9, 16/17 or 32/33
5 to 4095
Reference counter divide ratio
Reference frequency
Option
Reference
divider
H type (high-speed sync)
or
CP Charge pump type
L type (Low sensitivity)
Typically 4 weeks from spec.
fix to the first ES.
ES request date/qty.
CS request date/qty.
MP request date/qty.
Customer comments
17
MB15C700 series
FUJITSU LIMITED
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FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
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Tel: +81-44-754-3763
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
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by incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
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