MB15C703 [FUJITSU]
Built-in IF Band Voltage Controlled Oscillator Mask ROM Frequency Synthesizer; 内置的IF频段压控振荡器掩膜ROM频率合成器型号: | MB15C703 |
厂家: | FUJITSU |
描述: | Built-in IF Band Voltage Controlled Oscillator Mask ROM Frequency Synthesizer |
文件: | 总16页 (文件大小:127K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-21366-1E
ASSP
Built-in IF Band Voltage Controlled Oscillator
Mask ROM Frequency Synthesizer
MB15C703
■ DESCRIPTION
MB15C703 is a Phase Locked Loop (PLL) frequency synthesizer of pulse swallow operation with built-in VCO
suitable for Intermediate Frequency band synthesizer of mobile phones.
The VCO can operate option oscillation frequency by an external inductance and capacitor. The PLL reference
divide ratio and comparison divider ratio are fixed so that it is not required to set the divider ratios by a controller
externally. BCC-20 plastic package miniaturized the device and makes it easier to design.
It operates with a supply voltage of 2.5 V typ. (PLLVDD, VCOVDD) and low power consumption current 2.5mA
typ. is realized by pure-CMOS.
■ FEATURES
• Pulse swallow function (counter type of MB15C103)
• Setting frequency
Setting frequency
Reference frequency
129.55 MHz
12.8 MHz
• Lock detector circuit: Digital lock detector circuit which is “H” level when PLL is locked.
• Low power supply voltage: 2.3 V to 2.7 V
• Low power supply current: 2.5 mA typ. (PLLVDD = VCOVDD = 2.5 V, fvco = 129.55 MHz)
(Continued)
■ PACKAGE
20-pad, plastic BCC
LCC-20P-M04
MB15C703
(Continued)
• Wide operating temperature: −20 °C to +85 °C
• High-speed synchronization charge pump (IOH = −4.5 mA, IOL = 4.5 mA at PLLVDD = 2.5 V typ.)
• Oscillation frequency can be arranged by the number of the external circuit.
■ PIN ASSIGNMENT
(Top View)
VCOTNKO
VCOout
VCOTNKI
N.C.
17
VCOGND
1
20
19
18
16
PLLPS
PLLfin
2
3
15
14
13
12
N.C.
VCOCNT
VCOPS
PLLGND
PLLDo
N.C.
4
5
VCOVDD
LD
6
7
8
9
10
11
N.C.
N.C.
fout
OSCin
PLLVDD
(LCC-20P-M04)
2
MB15C703
■ PIN DESCRIPTIONS
Pin
No.
Symbol
I/O
Descriptions
1
VCOGND
N.C.
Ground for the VCO.
No connection.
2
VCO control voltage input.
Connection to PLLDo terminal via LPF.
3
4
5
6
VCOCNT
VCOPS
VCOVDD
LD
I
I
Power saving control for the VCO. (Open is prohibited.)
“H”: Normal mode
“L”: Power saving mode
Power supply voltage input for VCO.
Connect to capacitor between GND.
Lock detector signal output.
LD = “H”: Locking mode or power saving mode
LD = “L”: Unlocking mode.
O
7
8
N.C.
OSCin
fout
No connection.
The reference counter input.
Connect with a AC coupling capacitor.
I
9
O
Test purpose output. This pin is an open drain output.
Power supply voltage input for the PLL.
Connect to capacitor between GND.
10
PLLVDD
11
12
N.C.
N.C.
No connection.
No connection.
PLL charge pump output.
Connect to VCOCNT pin via LPF.
13
14
15
PLLDo
PLLGND
PLLfin
O
Ground for the PLL.
Prescaler input.
Connect with an AC coupling capacitor.
I
I
Power saving control for the PLL. (Open is prohibited.)
“H”: Normal mode
16
PLLPS
“L”: Power saving mode
17
18
N.C.
No connection.
VCO output.
VCOout
O
I
VCO tank circuit input.
Connect to VCOTNKO pin with inductance-and-resistance.
Connect to capacitor between GND.
19
20
VCOTNKI
VCO tank circuit output.
Connect to capacitor VCOTNKI with inductance and resistance.
Connect to capacitor between GND. (max.2.0 pF)
VCOTNKO
O
3
MB15C703
■ BLOCK DIAGRAM
10
8
PLLVDD
OSCin
Lock
detector
Reference counter (R)
Phase
comparator
Buffer Amp.
LD
6
9
Power saving
control circuit
fout
PLLPS 16
Output
selector
PLL-Block
Charge pump
PLLDo
13
3
Main counter (N)
Swallow counter (A)
VCOCNT
15
Buffer Amp.
Prescaler (P)
PLLfin
19 VCOTNKI
VCOTNKO
PLLGND
14
Control
circuit
VCO-Block
20
18 VCOout
5
1
4
VCOPS
VCOVDD
VCOGND
■ FUNCTIONAL DESCRIPTIONS
fvco = [(P × N + A)] × fosc / R
Symbol
Description
Setting value
fvco
fosc
N
Output frequency of voltage controlled oscillator
Reference oscillation frequency
129.55 MHz
12.80 MHz
161
Divide ratio of the main counter
A
Divide ratio of the swallow counter
15
P
Preset divide ratio of dual modulus the prescaler
Divide ratio of the reference counter
16/17
R
256 (fr = 50 kHz)
4
MB15C703
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Unit
Min.
−0.5
−0.5
−0.5
0
Max.
Power supply voltage
Output voltage
VDD
VO
VI
4.0
V
V
VCC+0.5
VCC+0.5
+5.0
Input voltage
V
Output current
IO
mA
°C
Storage temperature
Tstg
−55
+125
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Unit
Min.
Typ.
Max.
PLLVDD
VCOVDD
Power supply voltage
VDD
2.3
2.5
2.7
V
Input voltage
VIN
GND
VDD
V
Operating temperature
Ta
−20
+85
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
5
MB15C703
■ ELECTRICAL CHARACTERISTICS
(Recommended operating conditions unless otherwise noted.)
Value
Parameter
Power supply current
Power saving current
Symbol
Condition
Unit
Min.
Typ.
2.5
1
Max.
PLLVDD
VCOVDD
PLLVDD
VCOVDD
IPLL
IVCO
IPLLPS
IVCOPS
PLLVDD = VCOVDD = 2.5 V
PLL-Lock (129.55 MHz)
4.0
mA
PLLPS = “L”
VCOPS = “L”
10
1
µA
µA
AC coupling by 1000 pF
capacitor
PLLfin
OSCin
fin
100
3
129.55
12.8
400
26
MHz
MHz
Operating frequency
AC coupling by 1000 pF
capacitor
fOSC
AC coupling by 1000 pF
capacitor
Input sensitivity
Input current
OSCin
OSCin
VOSC
IOSC
VOH
VOL
IOH
0.5
Vp-p
−100
+100
µA
PLLVDD
− 0.8
IOH = −0.3 mA
IOL = 0.3 mA
Output voltage
PLLDo
V
0.4
PLLVDD = 2.5 V
VOH = 1.5 V
−4.5
Output current
PLLDo
PLLDo
mA
nA
PLLVDD = 2.5 V
VOL = 1.0 V
IOL
4.5
High impedance cut
off current
IOFF
0 V ≤ PLLVDO ≤ PLLVDD
3
6
MB15C703
■ REFERENCE CHARACTERISTICS
(PLLVDD = VCOVDD = 2.5 V, Ta = +25 °C)
Value
Unit
Parameter
Symbol
Condition
Min.
Typ.
Max.
fVCO1 (at VCOCNT = 0.8 V) −
fVCO2 (at VCOCNT = 1.8 V)
VCO variable range*1 ∆f
8
MHz
dBm
VCO output level*2
VVCO
−12
−67
−72
−71
108
113
−3
Lef1
∆±fr
SYN reference
leakage
dBc
dBc
Lef2
∆± (fr × 2)
SYN output S/N
S/N
∆1 kHz
C/N1
C/N2
Lsp1
Lsp2
Lsp3
Lsp4
Lsp5
Lsp6
Lsp7
Lsp8
Lsp9
Lsp10
∆±50 kHz
SYN output C/N
(BW = 21 kHz)
dBc/Hz
∆±100 kHz
2nd Harmonic (∆fVCO)
3rd Harmonic (∆ (fVCO × 2) )
4th Harmonic (∆ (fVCO × 3) )
Other (∆ (fVCO × 4) )
TRX band (∆ (fVCO × 5) )
TRX band (∆ (fVCO × 6) )
−10
−20
−25
−30
−35
−45
−50
−50
−55
Spurious
dBc
PLLPS “L” to “H”
Lock-up time
TLOCK
fVCO within ± 300 Hz,
VVCOout = −12 ± 3 dBm
0.7
ms
VCO operating
control voltage range
VCOVDD
∆VCNT
0.5
V
V
− 0.2
VCOCNT voltage*3
VCNT
fO = 129.5 MHz/PLL Lock
1.1
*1: An capacitor connected to VCOTNKO should be max. 2.0 pF.
*2: Insert resistor with 1 kΩ between VCOout terminal and GND.
*3: An external components is not included.
[Measurement circuit]
3.3 kΩ
DOPLL
VCOCNT
VCOTNKI
2200 pF
3000 pF
12 pF
220 nH
510 kΩ
3.3 kΩ
22000 pF
VCOTNKO
1.5 pF
7
MB15C703
■ PHASE COMPARATOR OUTPUT WAVEFORM
fr
fp
tWU
tWL
LD
"Z"
PLLDo
"Z" : High impedance
Notes : • Phase error detection range: −2π to +2π
• Spikes on Do pulse during locking state are output to prevent dead zone
• LD output becomes low when phase error is tWU or more.
• LD output becomes high when phase error is tWL or less and continues to be so for three cycles
or more.
• tWU and tWL depend on OSCin input frequency.
tWU ≥ 8/fOSC[s] (Ex.) fOSC = 12.8 MHz : tWU ≥ 625.0 ns
tWL ≤ 16/fOSC[s]
tWL ≤ 1250.0 ns
8
MB15C703
■ TYPICAL CHARACTERISTICS
1. fin input sensitivity
fin input sensitivity vs. input frequency
10
5
0
−5
SPEC
−10
−15
−20
−25
−30
−35
−40
−45
−50
PLLVDD = 2.3 V
PLLVDD = 2.5 V
PLLVDD = 2.7 V
0
100
200
300
400
500
600
700
800
900
Input frequency fin (MHz)
2. OSCin input sensitivity
OSCin input sensitivity vs. input frequency
Ta = +25 °C, DIV = "H"
10
5
VCC = 2.4 V
VCC = 3.0 V
VCC = 3.6 V
SPEC
0
−5
−10
−15
−20
−25
−30
−35
−40
−45
−50
0
10
20
30
40
50
60
70
80
90
100
Input frequency fOSC (MHz)
9
MB15C703
3. Do output current
PLLVDD = 2.5 V
Ta = +25 °C
IOL
8.0
6.0
4.0
2.0
0.0
−2.0
−4.0
−6.0
−8.0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
VO (V)
PLLVDD = 2.5 V
Ta = +25 °C
IOH
8.0
6.0
4.0
2.0
0.0
−2.0
−4.0
−6.0
−8.0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
VO (V)
10
MB15C703
4. Characteristics Wave Form
• VVCOCNT vs. fVCOout Characteristics
VCOVDD = 2.5 V, Ta = 25 °C
134.0
132.0
130.0
128.0
126.0
124.0
122.0
120.0
0.0
0.5
1.0
1.5
2.0
2.5
VVCOCNT (V)
• Spectrum Wave Form (Reference Leakage)
Ref-leak ∆ (50 kHz)
ATTEN 10 dB
RL −10.0 dBm
∆MKR −67.33 dB
50.0 kHz
10 dB/
D
S
CENTER 129.5500 MHz
SPAN 250.0 kHz
SWP 6.30 s
RBW 1.0 kHz
VBW 100 Hz
11
MB15C703
• SPECTRUM WAVE FROM (C/N , S/N , Sprious, Lock up time)
C/N ∆ (50 kHz)
S/N ∆ (1 kHz)
ATTEN 10 dB
∆MKR −71.33 dB
ATTEN 10 dB
∆MKR −108.0 dB/Hz
RL −10.0 dBm 10 dB/
1.000 kHz
RL −10.0 dBm 10 dB/
50.0 kHz
D
S
D
S
CENTER 129.550037 MHz SPAN 2.000 kHz
CENTER 129.5504 MHz
SPAN 250.0 kHz
RBW 30 Hz
VBW 3.0 Hz
SWP 3.00 s
RBW 1.0 kHz
SWP 21.0 s
VBW 30 Hz
Sprious
Lock up time (PLLPS mode to Lock, fVCO within ± 300 Hz)
Freq C tlk only
waiting for trigger
ATTEN 10 dB
RL −10.0 dBm 10 dB/
∆MKR −4.17 dB
131 MHz
129.554000 MHz
129.550000 MHz
D
S
129.546000 MHz
−
1.000 ms
4
.000 ms
9.000 ms
START 120 MHz
RBW 1.0 MHz
STOP 1.600 GHz
VBW 1.0 kHz
1
.000 ms div
/
SWP 5.00 s
T
F
1
1
667
µ
s
T
F
2
2
1.289 ms
129.550290 MHz
∆
∆
622
µs
129.549710 MHz
580 Hz
Std Dev 1.32866 kHz
12
MB15C703
■ APPLICATION EXAMPLE
1000 pF
1 µF
13
15
11
14
12
PLLGND
PLLDo
N.C.
N.C.
PLLfin
16 PLLPS
PLLVDD 10
17
N.C.
fout
9
8
7
OSCin
N.C.
18
19
20
VCOout
AC Coupling
VCOTNKI
VCOTNKO
LD 6
VCOVDD
Max.2.0 pF
VCOCNT
3
VCOGND
1
N.C.
2
VCOPS
4
5
LPF
1000 pF
1 µF
13
MB15C703
■ USAGE PRECAUTIONS
To protect against damage by electrostatic discharge, note the following handling precautions:
• Store and transport devices in conductive containers.
• Use properly grounded workstations, tools, and equipment.
• Turn off power before inserting device into or removing device from a socket.
• Protect leads with a conductive sheet when transporting a board-mounted device.
■ ORDERING INFORMATION
Part number
Package
Remarks
20-pad, plastic BCC
(LCC-20P-M04)
MB15C703
14
MB15C703
■ PAKAGE DIMENSION
20 pin, plastic BCC
(LCC-20P-M04)
3.00(.118)TYP
0.25±0.10
3.60±0.10(.142±.004)
0.80(.031)MAX
(Mounting height)
(.010±.004)
16
11
11
16
0.50(.020)
TYP
0.25±0.10
(.010±.004)
INDEX AREA
3.40±0.10
(.134±.004)
2.70(.106)
TYP
"D"
"A"
"B"
"C"
1
6
6
1
0.50(.020)
TYP
2.80(.110)REF
0.085±0.04
(.003±.002)
(Stand off)
0.05(.002)
Details of "A" part
Details of "B" part
Details of "C" part
Details of "D" part
0.50±0.10
0.50±0.10
0.50±0.10
0.30±0.10
(.020±.004)
(.020±.004)
(.020±.004)
(.012±.004)
C0.20(.008)
0.60±0.10
(.024±.004)
0.30±0.10
(.012±.004)
0.60±0.10
(.024±.004)
0.40±0.10
(.016±.004)
C
1999 FUJITSU LIMITED C20055S-1C-1
Dimensions in mm (inches)
15
MB15C703
FUJITSU LIMITED
For further information please contact:
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FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
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Tel: +81-44-754-3763
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presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
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of this information or circuit diagrams.
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by incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
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