NC7SZ157FHX_09_技术文档

September 2009

NC7SZ157

TinyLogic^®UHS 2-Input Non-Inverting Multiplexer

Features

Description

The NC7SZ157 is a single, high performance, 2-to-1

CMOS non-inverting multiplexer from Fairchild’s Ultra-

High Speed series of TinyLogic^®. The device is

fabricated with advanced CMOS technology to achieve

ultra high speed with high output drive while maintaining

low static power dissipation over a broad V_CCoperating

range. The device is specified to operate over the 1.65V

to 5.5V V^CCoperating range. The inputs and outputs are

high impedance when V_CCis 0V. Inputs tolerate

voltages up to 5.5V independent of V_CCoperating range.

Broad V_CCOperating Range: 1.65V to 5.5V

Ultra High-Speed

Power Down High-Impedance Inputs/Outputs

Over-Voltage Tolerance Inputs Facilitate 5V to 3V

Translation

Proprietary Noise/EMI Reduction Circuitry

Ultra-Small MicroPak™ Packages

Space-Saving SC70 Package

Ordering Information

Eco

Status

Part Number Top Mark

Package

Packing Method

3000 Units on

Tape & Reel

NC7SZ157P6X

NC7SZ157L6X

NC7SZ157FHX

ZF7

B9

RoHS

Green

6-Lead SC70, EIAJ SC-88, 1.25mm Wide

6-Lead MicroPak™, 1.00mm Wide

5000 Units on

Tape & Reel

5000 Units on

Tape & Reel

B9

6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch

For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.

NC7SZ157 • Rev. 1.0.2

www.fairchildsemi.com

Connection Diagrams

IEEE/IEC

Figure 1. Logic Symbol

Pin Configurations

Figure 2. SC70 (Top View)

Figure 3. MicroPak™ (Top Through View)

Figure 4. Pin 1 Orientation

Notes:

1. AAA represents product code top mark (see Ordering Information).

2. Orientation of top mark determines pin one location.

3. Reading the top mark left to right, pin one is the lower left pin.

Pin Definitions

Pin # SC70

Pin # MicroPak

Name

Description

Data Input

1

2

3

4

5

6

1

2

3

4

5

6

I₁

GND

I₀

Ground

Data Input

Output

Z

V_CC

S

Supply Voltage

Control Input

Function Table

Inputs

Output

S

L

I₁

X

L

I₀

L

Z = (I₀) • (S) + (I₁) • (S)

L

H

L

H

X

H

H = HIGH Logic Level

L = LOW Logic Level

X = Don’t’ Care

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

2

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device

reliability. The absolute maximum ratings are stress ratings only.

Symbol

V_CC

Parameter

Min.

-0.5

Max.

7.0

Unit

V

Supply Voltage

V_IN

DC Input Voltage

7.0

V

V_OUT

I_IK

DC Output Voltage

7.0

V

DC Input Diode Current

DC Output Diode Current

DC Output Current

V_IN≤ 0.5V

V_OUT≤ -0.5V

-50

mA

°C

I_OK

-50

I_OUT

±50

+150

+260

180

130

120

4000

2000

I_CCor I_GND

T_STG

T_J

DC V_CCor Ground Current

Storage Temperature Range

Junction Temperature Under Bias

-65

T_L

Junction Lead Temperature (Soldering, 10 Seconds)

SC70-6

P_D

Power Dissipation at +85°C

MicroPak-6

mW

V

MicroPak2-6

Human Body Model, JEDEC:JESD22-A114

Charge Device Model, JEDEC:JESD22-C101

ESD

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameter

Conditions

Min.

Max.

Unit

Supply Voltage Operating

1.65

5.50

V_CC

V

Supply Voltage Data

Retention

1.50

5.50

V_IN

V_OUT

T_A

Input Voltage

0

5.5

V_CC

+85

V

Output Voltage

Operating Temperature

-40

°C

V_CCat 1.8V ± 0.15V,

2.5V ± 0.2V

0

20

t_r, t_f

Input Rise and Fall Times

Thermal Resistance

ns/V

V_CCat 3.3V ± 0.3V

V_CCat 5.0V ± 0.5V

SC70-6

0

10

5

350

500

560

MicroPak-6

°C/W

θ_JA

MicroPak2-6

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

3

DC Electrical Characteristics

T_A=+25°C

T_A=-40 to +85°C

Symbol

Parameter

V_CC

Conditions

Units

Min.

Typ. Max.

Min.

Max.

1.65 to 1.95

2.30 to 5.50

1.65 to 1.95

2.30 to 5.50

1.65

0.75V_CC

0.70V_CC

0.75V_CC

0.70V_CC

HIGH Level Input

Voltage

V_IH

V_IL

V

0.25V_CC

0.30V_CC

1.65

0.25V_CC

0.30V_CC

LOW Level Input

Voltage

1.55

2.20

2.90

4.40

1.29

1.90

2.40

2.30

3.90

1.55

2.20

2.90

4.40

1.29

1.90

2.40

2.30

3.80

V_IN=V_IL

or V_IH

2.30

I

_OH= -100µA

_OH= -4mA

3.00

4.50

HIGH Level

Output Voltage

V_OH

1.65

1.52

V

2.30

I_OH= -8mA

2.15

V_IN=V_IL

or V_IHI_OH= -16mA

3.00

2.80

3.00

I_OH= -24mA

3.68

4.50

I_OH= -32mA

4.20

1.65

0

0.10

0.24

0.30

0.40

0.55

0.10

0.24

0.30

0.40

0.55

V_IN=V_IL

or V_IH

2.30

0

I

_OL= 100µA

V

3.00

0

4.50

0

LOW Level

Output Voltage

V_OL

1.65

I

_OL= 4mA

0.08

0.10

0.15

0.22

2.30

I_OL= 8mA

V_IN=V_IL

or V_IHI_OL= 16mA

3.00

I_OL= 24mA

4.5

I_OL= 32mA

Input Leakage

Current

I_IN

I_OFF

I_CC

0 to 5.50

0

V_IN=5.5V, GND

±0.1

1

±1

10

µA

Power Off

Leakage Current

V

_INor V_OUT=5.5V

Quiescent Supply

Current

1.65 to 5.50 V_IN=5.5V, GND

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

4

AC Electrical Characteristics

T_A=+25°C

T_A=-40 to +85°C

Symbol

Parameter

V_CC

Conditions

Units Figure

Min.

Typ. Max. Min.

Max.

1.80 ± 0.15

2.50 ± 0.20

3.30 ± 0.30

5.00 ± 0.50

1.80 ± 0.15

5.00 ± 0.50

3.30 ± 0.30

5.00 ± 0.50

3.30 ± 0.30

5.00 ± 0.50

3.30 ± 0.30

5.00 ± 0.50

0.00

2.5

1.2

0.8

0.5

2.5

1.2

0.8

0.5

1.2

0.8

1.2

0.8

6.0

3.5

2.6

1.9

5.9

3.5

2.6

1.9

3.2

2.4

3.2

2.4

2

11.5

6.1

4.1

3.2

10.0

5.8

3.9

3.1

4.8

3.8

4.6

3.7

2.5

1.2

0.8

0.5

2.5

1.2

0.8

0.5

1.2

0.8

1.2

0.8

12.0

6.5

4.5

3.5

10.5

6.1

4.2

3.3

5.2

4.1

5.0

4.0

C_L=15pF,

R_L=1MΩ,

Propagation Delay

S to Z

ns

C_L=15pF,

R_L=1MΩ,

Propagation Delay

I_nto Z

Figure 5

Figure 6

t_PLH,t_PHL

C_L=50pF,

R_L=500Ω,

Propagation Delay

S to Z

C_L=50pF,

R_L=500Ω,

Propagation Delay

I_nto Z

C_IN

Input Capacitance

pF

3.30

14

Power Dissipation

Capacitance⁽⁴⁾

C_PD

pF

Figure 7

5.00

17

Note:

4. C_PDis defined as the value of the internal equivalent capacitance which is derived from dynamic operating

current consumption (I_CCD) at no output loading and operating at 50% duty cycle. C_PDis related to I_CCDdynamic

operating current by the expression: I_CCD=(C_PD)(V_CC)(f_IN)+(I_CCstatic).

Note:

5. C_Lincludes load and stray capacitance.

Input PRR=1.0MHz, t_w=500ns.

Figure 5. AC Test Circuit

Figure 6. AC Waveforms

Note:

6. Input=AC Waveform; PRR=Variable; Duty Cycle=50%.

Figure 7.

I

_CCDTest Circuit

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

5

Physical Dimensions

SYMM

C

L

±0.20

2.00

A

0.65

0.50 MIN

6

4

B

PIN ONE

±0.10

1.25

1.90

1

3

0.30

0.15

(0.25)

0.40 MIN

0.10

A B

1.30

0.65

1.30

LAND PATTERN RECOMMENDATION

SEE DETAIL A

1.00

0.80

1.10

0.80

0.10

C

0.10

0.00

C

2.10±0.30

SEATING

PLANE

NOTES: UNLESS OTHERWISE SPECIFIED

GAGE

PLANE

A) THIS PACKAGE CONFORMS TO EIAJ

SC-88, 1996.

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS DO NOT INCLUDE BURRS

OR MOLD FLASH.

(R0.10)

0.25

0.10

D) DRAWING FILENAME: MKT-MAA06AREV6

0.20

30°

0°

0.46

0.26

DETAIL A

SCALE: 60X

Figure 8. 6-Lead, SC70, EIAJ SC-88, 1.25mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Tape and Reel Specifications

Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:

http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf.

Package Designator

Tape Section

Leader (Start End)

Carrier

Cavity Number

125 (Typical)

3000

Cavity Status Cover Type Status

Empty

Filled

Sealed

P6X

Trailer (Hub End)

75 (Typical)

Empty

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

6

Physical Dimensions

2X

0.05 C

1.45

B

(1)

2X

0.05 C

(0.49)

5X

1.00

(0.75)

(0.52)

1X

A

TOP VIEW

0.55MAX

(0.30)

6X

PIN 1

0.05 C

0.05

0.00

RECOMMENED

LAND PATTERN

0.05 C

C

0.45

0.35

0.10

6X

0.00

0.25

6X

0.15

1.0

DETAIL A

0.10

C B A

0.40

0.30

0.05

C

0.35

0.25

5X

0.40

0.30

DETAIL A

PIN 1 TERMINAL

0.075 X 45

CHAMFER

0.5

BOTTOM VIEW

(0.05)

6X

(0.13)

4X

Notes:

1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD

2. DIMENSIONS ARE IN MILLIMETERS

3. DRAWING CONFORMS TO ASME Y14.5M-1994

MAC06AREVC

Figure 9. 6-Lead, MicroPak™, 1.0mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Tape and Reel Specifications

Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:

http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.

Package Designator

Tape Section

Leader (Start End)

Carrier

Cavity Number

125 (Typical)

5000

Cavity Status Cover Type Status

Empty

Filled

Sealed

L6X

Trailer (Hub End)

75 (Typical)

Empty

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

7

Physical Dimensions

DETAIL A

5X

Figure 10. 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Tape and Reel Specifications

Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:

http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf.

Package Designator

Tape Section

Leader (Start End)

Carrier

Cavity Number

125 (Typical)

5000

Cavity Status Cover Type Status

Empty

Filled

Sealed

FHX

Trailer (Hub End)

75 (Typical)

Empty

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

8

NC7SZ157 • Rev. 1.0.3

www.fairchildsemi.com

9


型号：	NC7SZ157FHX_09
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	TinyLogicÂ® UHS 2-Input Non-Inverting Multiplexer
文件：	总9页 (文件大小：588K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

NC7SZ157FHX_09 [FAIRCHILD]

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