NC7SZ157_04 [FAIRCHILD]
TinyLogic UHS 2-Input Non-Inverting Multiplexer; TinyLogic UHS 2输入非反相多路复用器
| 型号： | NC7SZ157_04 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | TinyLogic UHS 2-Input Non-Inverting Multiplexer |
| 文件： | 总7页 (文件大小：163K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 2000
Revised August 2004
NC7SZ157
TinyLogic UHS 2-Input Non-Inverting Multiplexer
General Description
Features
■ Space saving SC70-6 lead surface mount package
■ Ultra Small MicroPak leadless package
■ Ultra High Speed
The NC7SZ157 is a single, high performance, 2 to 1
CMOS non-inverting multiplexer from Fairchild’s Ultra High
Speed Series of TinyLogic . The device is fabricated with
advanced CMOS technology to achieve ultra high speed
with high output drive while maintaining low static power
dissipation over a broad VCC operating range. The device
■ Broad VCC operating range: 1.65V to 5.5V
■ Power down high impedance input/output
is specified to operate over the 1.65V to 5.5V VCC operat-
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Patented noise/EMI reduction circuitry implemented
ing range. The inputs and outputs are high impedance
when VCC is 0V. Inputs tolerate voltages up to 5.5V inde-
pendent of VCC operating range.
Ordering Code:
Order
Number
Package
Number
Package
Top Mark
Package Description
Supplied As
NC7SZ157P6X
NC7SZ157L6X
MAA06A
MAC06A
ZF7
B9
6-Lead SC70, EIAJ SC88, 1.25mm Wide
6-Lead MicroPak, 1.0mm Wide
3k Units on Tape and Reel
5k Units on Tape and Reel
Logic Symbol
Connection Diagram
IEEE/IEC
(Top View)
Function Table
Pin One Orientation Diagram
Inputs
Output
I1
I0
Z = (I0)•(S)+(I1)•(S)
S
L
L
X
X
L
L
H
X
X
L
H
L
AAA = Product Code Top Mark - see ordering code
H
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
H
H
H
H = HIGH Logic Level
L = LOW Logic Level
Pad Assignments for MicroPak
Pin Descriptions
Pin Name
Description
Data Inputs
Control Input
Output
I0, I1
S
Z
(Top Thru View)
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2004 Fairchild Semiconductor Corporation
DS500359
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
)
−0.5V to +7.0V
−0.5V to +7.0V
−0.5V to +7.0V
)
Supply Voltage Operating (VCC
Supply Voltage Data Retention (VCC
Input Voltage (VIN
Output Voltage (VOUT
)
1.65V to 5.5V
1.5V to 5.5V
0V to 5.5V
)
)
DC Input Diode Current (IIK
)
)
@ VIN ≤ 0.5V
−50 mA
)
0V to VCC
DC Output Diode Current (IOK
)
Operating Temperature (TA)
Input Rise and Fall Time (tr, tf)
VCC @ 1.8V ± 0.15V, 2.5V ± 0.2V
−40°C to +85°C
@ VIN ≤ −0.5V
−50 mA
±50 mA
DC Output Source/Sink Current (IOUT
DC VCC or Ground Current (ICC / IGND
Storage Temperature Range (TSTG
)
0 ns/V to 20 ns/V
0 ns/V to 10 ns/V
0 ns/V to 5 ns/V
)
±50 mA
V
V
CC @ 3.3V ± 0.3V
CC @ 5.0V ± 0.5V
)
−65°C to +150°C
150°C
Max Junction Temperature under Bias (TJ)
Lead Temperature (TL)
Thermal Resistance (θJA
)
SC70-6
350°C/W
(Soldering, 10 seconds)
Power Dissipation (PD) @+85°C
SC70-6
260°C
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside datasheet specifi-
cations.
180 mW
DC Electrical Characteristics
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
Parameter
Units
Conditions
(V)
Min
Typ
Max
Min
Max
VIH
HIGH Level Input Voltage
1.65-1.95 0.75 VCC
0.75 VCC
0.7VCC
V
V
2.3−5.5
1.65-1.95
2.3-5.5
1.65
2.3
0.7VCC
VIL
LOW Level Input Voltage
HIGH Level Output Voltage
0.25 VCC
0.3 VCC
0.25 VCC
0.3 VCC
VOH
1.55
2.2
2.9
4.4
1.29
1.9
2.4
2.3
3.9
1.65
2.3
1.55
2.2
2.9
4.4
1.29
1.9
2.4
2.3
3.8
V
IN = VIL
V
V
V
V
I
OH = −100 µA
3.0
3.0
or = VIH
4.5
4.5
1.65
2.3
1.52
2.15
2.80
3.68
4.20
0.0
I
I
I
I
I
OH = −4 mA
OH = −8 mA
OH = −16 mA
OH = −24 mA
OH = −32 mA
V
IN = VIL
3.0
or = VIH
3.0
4.5
VOL
LOW Level Output Voltage
1.65
2.3
0.10
0.10
0.10
0.10
0.24
0.3
0.10
0.10
0.10
0.10
0.24
0.3
0.0
V
IN = VIL
I
OL = 100 µA
3.0
0.0
or = VIH
4.5
0.0
1.65
2.3
0.08
0.10
0.15
0.22
0.22
I
I
I
I
I
OL = 4 mA
OL = 8 mA
OL = 16 mA
OL = 24 mA
OL = 32 mA
V
IN = VIL
3.0
0.4
0.4
or = VIH
3.0
0.55
0.55
±0.1
1
0.55
0.55
±1
4.5
IIN
Input Leakage Current
0−5.5
0.0
µA
µA
µA
V
IN = 5.5V, GND
VIN or VOUT = 5.5V
VIN = 5.5V, GND
IOFF
ICC
Power Off Leakage Current
Quiescent Supply Current
10
1.65−5.5
10
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2
AC Electrical Characteristics
VCC
T
A = +25°C
TA = −40°C to +85°C
Figure
Symbol
Parameter
Units
Conditions
(V)
Min
2.5
1.2
0.8
0.5
2.5
1.2
0.8
0.5
1.2
0.8
1.2
0.8
Typ
6.0
3.5
2.6
1.9
5.9
3.5
2.6
1.9
3.2
2.4
3.2
2.4
2
Max
11.5
6.1
4.1
3.2
10
Min
2.5
1.2
0.8
0.5
2.5
1.2
0.8
0.5
1.2
0.8
1.2
0.8
Max
12
Number
tPLH
tPHL
Propagation Delay S to Z 1.8 ± 0.15
2.5 ± 0.2
6.5
4.5
3.5
10.5
6.1
4.2
3.3
5.2
4.1
5.0
4.0
C
R
L = 15 pF
Figures
1, 3
ns
3.3 ± 0.3
L = 1 MΩ
5.0 ± 0.5
tPLH
tPHL
Propagation Delay In to Z 1.8 ± 0.15
5.0 ± 0.5
5.8
3.9
3.1
4.8
3.8
4.6
3.7
C
R
L = 15pF
L = 1 MΩ
Figures
1, 3
ns
ns
3.3 ± 0.3
5.0 ± 0.5
tPLH
tPHL
tPLH
tPHL
CIN
Propagation Delay S to Z 3.3 ± 0.3
5.0 ± 0.5
C
R
C
R
L = 50 pF
L = 500Ω
L = 50 pF
L = 500Ω
Figures
1, 3
Propagation Delay In to Z 3.3 ± 0.3
5.0 ± 0.5
Figures
1, 3
ns
pF
pF
Input Capacitance
Power Dissipation
Capacitance
0
CPD
3.3
5.0
14
(Note 2)
Figure 2
17
Note 2: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2) CPD is related to ICCD dynamic operatic current by the expression:
ICCD = (CPD)(VCC)(fin) + (ICCstatic).
AC Loading and Waveforms
CL includes load and stray Capacitance
Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 3. AC Waveforms
Input = AC Waveforms
PRR = Variable; Duty Cycle = 50%
FIGURE 2. ICCD Test Circuit
3
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Tape and Reel Specification
TAPE FORMAT For SC70
Package
Tape
Number
Cavities
125 (typ)
3000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Section
Leader (Start End)
Sealed
P6X
Carrier
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
Tape Size
DIM A
DIM B
DIM F
DIM Ko
DIM P1
DIM W
Package
0.093
(2.35)
0.096
(2.45)
0.138 ± 0.004 0.053 ± 0.004
(3.5 ± 0.10) (1.35 ± 0.10)
0.157
(4)
0.315 ± 0.004
(8 ± 0.1)
SC70-6
8 mm
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4
Tape and Reel Specification (Continued)
TAPE FORMAT for MicroPak
Package
Tape
Section
Number
Cavities
125 (typ)
5000
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
L6X
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
REEL DIMENSIONS inches (millimeters)
Tape
Size
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165 0.331 + 0.059/−0.000
0.567
W1 + 0.078/−0.039
(W1 + 2.00/−1.00)
8 mm
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00)
(14.40)
5
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Physical Dimensions inches (millimeters) unless otherwise noted
6-Lead SC70, EIAJ SC88, 1.25mm Wide
Package Number MAA06A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
6-Lead MicroPak, 1.0mm Wide
Package Number MAC06A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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