HCPL-0700.R2 [FAIRCHILD]
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, SO-8;
| 型号： | HCPL-0700.R2 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, SO-8 输出元件 |
| 文件： | 总9页 (文件大小：278K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs
LED optically coupled to a high gain split darlington photodetector
housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode
and the first stage gain from the output transistor permits lower out-
put saturation voltage and higher speed operation than possible with
conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high
current transfer ratio of 2000% makes this family particularly useful
for input interface to MOS, CMOS, LSTTL and EIA RS232C, while
output compatibility is ensured to CMOS as well as high fan-out TTL
requirements.
Package Dimensions
0.164 (4.16)
0.144 (3.66)
FEATURES
• Low current - 0.5 mA
• Superior CTR-2000%
• Superior CMR-10 kV/µs
• CTR guaranteed 0-70°C
• *BSI, CSA and UL approval
0.019 [0.48]
Pin 1
0.202 (5.13)
0.182 (4.63)
VCC
N/C
1
8
0.010 (0.25)
0.006 (0.16)
0.143 (3.63)
0.123 (3.13)
+
VB
2
3
4
7
6
5
0.244 (6.19)
0.224 (5.69)
0.008 (0.20)
0.003 (0.08)
VF
_
APPLICATIONS
0.021 (0.53)
0.011 (0.28)
VO
• Digital logic ground isolation
• Telephone ring detector
• EIA-RS-232C line receiver
• High common mode noise line receiver
• µP bus isolation
0.050 (1.27)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
GND
N/C
NOTE
All dimensions are in inches (millimeters)
• Current loop receiver
HCPL-0700 / HCPL-0701
(T = 25°C unless otherwise specified)
ABSOLUTE MAXIMUM RATINGS
A
Parameter
Storage Temperature
Operating Temperature
Symbol
TSTG
TOPR
Value
-55 to +125
-55 to +85
Units
°C
°C
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
IF (avg)
IF (pk)
IF (trans)
VR
20
40
1.0
5
mA
mA
A
Peak Transient Input Current - (6ꢀ1 µs
Reverse Input Voltage
)
P.W., 300 pps
V
Input Power Dissipation
PD
35
mW
DETECTOR
Average Output Current (Pin 6)
Emitter-Base Reverse Voltage
IO (avg)
VEBR
60
0.5
mA
V
HCPL-0700
HCPL-0701
-0.5 to 7
-0.5 to 18
100
Supply Voltage, Output Voltage
Output power dissipation
VCC, VO
PD
V
mW
*Samples submitted for certification - Approval pending
2001 Fairchild Semiconductor Corporation
DS300394
3/5/01
1 OF 9
www.fairchildsemi.com
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified.)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
Test Conditions Symbol
Device
Min
Typ**
Max
1.7
Unit
EMITTER
TA =25°C)
1.0
1.27
VF
All
Input Forward Voltage
(IF = 1.6 mA)
1.75
V
Input Reverse Breakdown Voltage
(TA = 25°C, IR = 10 µA)
BVR
(IF = 1.6 mA) (ꢁVF/ꢁTA)
IOH
All
5.0
20
Temperature coefficient of forward voltage
All
-1.8
0.01
0.01
mV/°C
DETECTOR
(IF = 0 mA, VO = VCC = 18 V)
HCPL-0701
HCPL-0700
HCPL-0700
HCPL-0701
HCPL-0700
HCPL-0701
100
250
µA
Logic high output current
(IF = 0 mA, VO = VCC = 7 V)
(IF = 1.6 mA, VO = Open)
(VCC = 18 V)
Logic low supply
Logic high supply
ICCL
ICCH
0.4
1.5
10
mA
µA
(IF = 0 mA, VO = Open)
(VCC = 18 V)
0.05
TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Parameter
Test Conditions Symbol
(IF = 0.5 mA, VO = 0.4 V, VCC = 4.5 V)
Device
Min
400
500
300
Typ**
2000
1300
1300
0.05
0.10
0.13
0.20
0.08
Max
5000
2600
2600
0.4
Unit
COUPLED
HCPL-0701
HCPL-0701
HCPL-0700
Current transfer ratio
(Notes 1,2)
(IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V)
(IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V)
(IF = 0.5 mA, IO = 2 mA, VCC = 4.5 V)
CTR
%
Logic low output voltage (IF = 1.6 mA, IO = 8 mA, VCC = 4.5 V)
0.4
HCPL-0701
HCPL-0700
output voltage
(Note 2)
(IF = 5 mA, IO = 15 mA, VCC = 4.5 V)
(IF = 12 mA, IO = 24 mA, VCC = 4.5 V)
(IF = 1.6 mA, IO = 4.8 mA, VCC = 4.5 V)
VOL
0.4
V
0.4
0.4
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Test Conditions
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
Symbol
Min
Typ**
Max
Unit
Input-output
II-O
1.0
µA
insulation leakage current
(VI-O = 3000 VDC)
(Note 4)
(RH 6 50%, TA = 25°C)
(Note 4, 5) ( t = 1 min.)
(Note 4) (VI-O = 500 VDC)
Withstand insulation test voltage
Resistance (input to output)
VISO
RI-O
2500
VRMS
1012
1
** All typicals at TA = 25°C
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3/5/01
DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
(T = 0 to 70°C unless otherwise specified., VCC = 5 V)
SWITCHING CHARACTERISTICS
A
Parameter
Test Conditions Symbol
Device
Min
Typ**
Max
30
25
2
Unit
(RL = 4.7 k1, IF = 0.5 mA)
TA = 25°C
HCPL-0701
4
Propagation delay
(RL = 270 1, IF = 12 mA)
TA = 25°C
µs
time to logic low
(Note 2) (Fig. 13)
TPHL
HCPL-0701
HCPL-0700
HCPL-0701
HCPL-0701
HCPL-0700
HCPL-0700
HCPL-0701
HCPL-0700
HCPL-0701
0.2
1.5
12
1.3
7
1
(RL = 2.2 k1, IF = 1.6 mA)
TA = 25°C
15
10
90
60
10
7
(RL = 4.7 k1, IF = 0.5 mA)
(RL = 4.7 k1, IF = 0.5 mA) TA = 25°C
(RL = 270 1, IF = 12 mA)
TA = 25°C
Propagation delay
time to logic high
(Note 2) (Fig. 13)
TPLH
µs
(RL = 2.2 k1, IF = 1.6 mA)
TA = 25°C
50
35
Common mode
transient
(IF = 0 mA, ꢂVCMꢂ = 10 VP-P
)
|CMH|
|CML|
1,000
1,000
10,000
10,000
V/µs
V/µs
immunity at
logic high
TA = 25°C, (RL = 2.2 k1) (Note 3) (Fig. 14)
Common mode
transient
(IF = 1.6 mA, ꢂVCMꢂ = 10 VP-P, RL = 2.2 k1)
TA = 25°C (Note 3) (Fig. 14)
immunity at
logic low
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the
common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VOꢃ2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse
signal, VCM, to assure that the output will remain in a logic low state (i.e., VOT0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25°C
DS300394
3/5/01
3 OF 9
www.fairchildsemi.com
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Current Limiting Resistor Calculations
R1 (Non-Invert) = VDD1 - VDF - VOL1
IF
R1 (Invert) = VDD1 - VOH1 - VDF
IF
R2 = VDD2 - = VOLX (@ IL - I2)
IL
INPUT
OUTPUT
CMOS CMOS
@ 5 V @ 10 V
74XX 74LXX 74SXX 74LSXX 74HXX
R1 (1) R2 (1) R2 (1) R2 (1) R2 (1) R2 (1) R2 (1) R2 (1)
CMOS NON-INV. 2000
@ 5 V INV. 510
CMOS NON-INV. 5100
@ 10 V INV. 4700
NON-INV. 2200
Where:
VDD1 - Input Supply Voltage
VDD2 - Output Supply Voltage
VDF - Diode Forward Voltage
VOL1 - Logic “0” Voltage of Driver
VOH1 - Logic “1” Voltage of Driver
IF - Diode Forward Current
VOLX - Saturation Voltage of
Output Transistor
IL - Load Current Through
Resistor R2
I2 - Input Current of Output Gate
74XX
74LXX
74SXX
74LSXX
74HXX
INV.
NON-INV. 1800
INV. 100
NON-INV. 2000
INV. 360
NON-INV. 2000
INV. 180
NON-INV. 2000
INV. 180
180
1000
2200
750
1000
1000
1000
560
Fig. 1 Resistor Values for Logic Interface
VDD1
VDD2
VDD2
1
2
3
8
1
2
3
4
8
7
6
5
R2
R2
IN
7
6
5
OUT
IN
R1
OUT
R1
4
Fig. 2 Non-Inverting Logic Interface
Fig. 3 Inverting Logic Interface
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3/5/01
DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Fig. 4 Propagation Delay vs.Temperature
Fig. 5 Propagation Delay vs.Temperature
35
30
20
V
I
R
= 5 V
= 0.5 mA
= 4.7 kΩ
CC
18
I
V
R
= 1.6 mA
= 5 V
F
F
t
PLH
t
PLH
L
CC
16
14
12
10
8
1/f = 50 µs
= 2.2 kΩ
L
25
20
15
10
5
1/f = 50 µs
6
4
t
PHL
t
PHL
2
0
0
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T
- TEMPERATURE (˚C)
T - TEMPERATURE (˚C)
A
A
Fig. 7 Logic High Output Current vs.Temperature
Fig. 6 Propagation Delay vs.Temperature
4
3
2
1
0
I
V
R
= 12 mA
F
V
= V = 5.5 V
1000
100
10
CC O
= 5 V
CC
= 270 Ω
L
t
PLH
1/f = 50 µs
1
0.1
0.01
t
PHL
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T
- TEMPERATURE (˚C)
T
- TEMPERATURE (˚C)
A
A
DS300394
3/5/01
5 OF 9
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LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Fig. 9 Input Forward Current vs. Forward Voltage
Fig. 8 Output Current vs. Input Forward Current
100
100
10
T
T
= 85˚C
= 70˚C
A
A
10
1
T
A
= 85˚C
1
T
A
T
A
T
A
T
A
= 70˚C
= 25˚C
= 0˚C
0.1
T
T
T
= 25˚C
= 0˚C
A
A
A
0.1
0.01
V
V
= 5V
CC
= 0.4V
= -40˚C
= -40˚C
O
0.001
0.01
0.01
1.1
1.2
1.3
1.4
1.5
1.6
0.1
1
10
V
- FORWARD VOLTAGE (V)
I
- INPUT FORWARD CURRENT (mA)
F
F
Fig. 10 Logic Low Supply Current
vs. Input Forward Current
Fig. 11 DC Transfer Characteristics
0.5
0.4
0.3
0.2
0.1
0.0
80
60
40
20
0
Logic Low Supply Current vs.
Input Forward Current
I
I
I
I
I
I
= 5.0mA
F
= 4.5mA
= 4.0mA
= 3.5mA
= 3.0mA
= 2.5mA
F
F
F
F
F
V
= 18V
CC
V
= 5V
= 25˚C
CC
T
A
I
I
= 2.0mA
F
V
= 5V
CC
= 1.5mA
= 1.0mA
F
I
F
I
= 0.5mA
F
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
1
2
I
- INPUT FORWARD CURRENT (mA)
V - OUTPUT VOLTAGE (V)
O
F
Fig. 12 Current Transfer Ratio
vs. Input Forward Current
3500
V
V
= 5V
CC
= 0.4V
O
T
= 85˚C
3000
2500
2000
1500
1000
500
A
T
= 70˚C
A
T
= 25˚C
A
T
= 0˚C
A
T
= -40˚C
A
0
0.1
1
10
I
- INPUT FORWARD CURRENT (mA)
F
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3/5/01
DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Noise
Shield
IF
VCC
+5 V
1
2
3
4
8
7
6
5
0
Pulse
Generator
tr = 5ns
IF
+
VB
RL
ZO = 50
1
5 V
VO
10% D.C.
V
-
F
I/ f< 100
Es
VO
VO
1.5 V
1.5 V
TPLH
VOL
0.1 µF
IF Monitor
Rm
TPHL
CL = 15 pF*
GND
* Includes probe and fixture capacitance
Fig. 13 Switching Time Test Circuit
VCM 10 V
IF
90% 90%
Noise
Shield
VCC
+5 V
10%
tr
10%
tf
1
2
3
4
8
7
6
5
0 V
+
VB
RL
V
F
A
-
VO
VO
B
VO
0.1 µF
5 V
VFF
GND
Switch at A : I F = 0 mA
VO
-
VOL
VCM
-
+
Switch at B : I F = 1.6 mA
Pulse Gen
Fig. 14 Common Mode Immunity Test Circuit
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3/5/01
7 OF 9
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LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
ORDERING INFORMATION
Order
Entry
Option
Identifier
Description
R1
R2
.R1
.R2
Tape and Reel (500 per reel)
Tape and Reel (2500 per reel)
QT Carrier Tape Specifications
8.0 0.1
0.05
3.5 0.2
2
Ø1.5 MIN
0.3 MAX
4.0 0.1
1.75 0.10
5.5 0.05
12.0 0.3
8.3 0.1
5.2 0.2
Ø1.5 + 0.1/-0
6.4 0.2
0.1 MAX
User Direction of Feed
225˚C
220˚C:10 sec to 40 sec
250
200
150
100
50
Time>183˚C:120 sec to180 sec
0
Time (Min)
0
1
2
3
4
5
RECOMMENDED IR REFLOW PROFILE: J-STD-020
Fig. 15 JEDEC Reflow Profile
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8 OF 9
3/5/01
DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED
HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF
OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical
implant into the body,or (b) support or sustain life,
and (c) whose failure to perform when properly
used in accordance with instructions for use provided
in labeling, can be reasonably expected to result in a
significant injury of the user.
DS300394
3/5/01
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