HCPL-0700R1V [FAIRCHILD]
LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS; 低输入电流,高增益分裂达林顿光电耦合器![HCPL-0700R1V](http://pdffile.icpdf.com/pdf1/p00096/img/icpdf/HCPL-0700_505817_icpdf.jpg)
型号: | HCPL-0700R1V |
厂家: | ![]() |
描述: | LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS |
文件: | 总13页 (文件大小:275K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
DESCRIPTION
The HCPL-0700, HCPL-0701, HCPL-0730 and HCPL-0731 optocouplers consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector housed in a compact 8-pin small outline package. The HCPL-0730 and HCPL-0731 devices
have two channels per package for optimum mounting density.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
fan-out TTL requirements.
PACKAGE DIMENSIONS
FEATURES
•
•
•
•
•
•
Low input current – 0.5 mA
Superior CTR – 2000%
Superior CMR – 10 kV/µs
CTR guaranteed 0-70°C
0.164 (4.16)
0.144 (3.66)
U.L. Recognized (file# E90700)
VDE 0884 recognized (file# 136616)
– approval pending for HCPL-0730/0731
BSI recognized (file# 8661, 8662)
– HCPL-0700/0701 only
Pin 1
•
0.202 (5.13)
0.182 (4.63)
APPLICATIONS
0.019 (0.48)
•
•
•
•
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise
line receiver
0.010 (0.25)
0.006 (0.16)
0.143 (3.63)
0.123 (3.13)
0.244 (6.19)
0.224 (5.69)
0.008 (0.20)
0.003 (0.08)
0.021 (0.53)
0.011 (0.28)
•
•
µP bus isolation
Current loop receiver
0.050 (1.27)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
TRUTH TABLE
NOTE
All dimensions are in inches (millimeters)
V
LED
O
ON
LOW
OFF
HIGH
VCC
+
1
VCC
8
N/C
1
8
VF1
_
V01
+
VB
2
3
7
6
5
2
3
4
7
6
5
VF
_
_
V02
VO
VF2
GND
GND
N/C
+
4
HCPL0700 / HCPL0701
HCPL0730 / HCPL0731
© 2003 Fairchild Semiconductor Corporation
Page 1 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise specified)
A
Parameter
Symbol
Value
Units
Storage Temperature
T
-40 to +125
-40 to +85
°C
°C
STG
Operating Temperature
T
OPR
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
Peak Transient Input Current - (≤1 µs P.W., 300 pps)
Reverse Input Voltage
I (avg)
20
40
1.0
5
mA
mA
A
F
I (pk)
F
I (trans)
F
V
P
V
R
D
Input Power Dissipation
35
mW
DETECTOR
Average Output Current (Pin 6)
I
(avg)
60
0.5
mA
V
O
Emitter-Base Reverse Voltage
Supply Voltage, Output Voltage
Output power dissipation
HCPL-0700/HCPL-0701
V
EBR
HCPL-0700/HCPL-0730
HCPL-0701/HCPL-0731
-0.5 to 7
-0.5 to 18
100
V
, V
V
CC
O
P
mW
D
ELECTRICAL CHARACTERISTICS (T = 0 to 70°C Unless otherwise specified)
A
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
Test Conditions Symbol
Device
Min
Typ** Max
Unit
EMITTER
HCLP-0700/01
HCLP-0730/31
All
1.25
1.35
I = 1.6mA T = 25°C
1.0
1.7
F
A
Input Forward Voltage
V
F
V
1.75
Input Reverse Breakdown
Voltage
(T =25°C, I = 10 µA)
BV
R
All
5.0
A
R
DETECTOR
Logic high output
current
(I = 0 mA, V = V = 18 V)
HCPL-0701/31
HCPL-0700/30
0.01
0.01
100
250
1.5
F
O
CC
I
µA
OH
(I = 0 mA, V = V = 7 V)
F
O
CC
I = 1.6 mA, V = Open, V = 18V
HCPL-0700/01
HCPL-0730
HCPL-0731
HCPL-0700/01
HCPL-0730
HCPL-0731
0.4
0.8
1
F
O
CC
Logic Low Supply
Current
I
= I = 1.6mA
V
= 7V
I
mA
F1
F2
CC
CCL
CCH
3
V
= V = Open
V
= 18 V
O1
O2
CC
I = 0 mA, V = Open, V = 18V
10
20
F
O
CC
Logic High
Supply Current
I
= I = 0,
V
= 7V
I
0.001
0.01
µA
F1
F2
CC
V
= V = Open,
V
= 18 V
O1
O2
CC
© 2003 Fairchild Semiconductor Corporation
Page 2 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TRANSFER CHARACTERISTICS (T = 0 to 70°C Unless otherwise specified)
A
Parameter
COUPLED
Test Conditions Symbol
(I = 0.5 mA, V = 0.4 V, V = 4.5V)
Device
Min
Typ**
Max Unit
HCPL-0701/31
HCPL-0700
HCPL-0701
HCPL-0730
HCPL-0731
400
300
500
300
500
5000
2600
F
O
CC
I = 1.6 mA,
F
CTR
2600
5000
5000
0.4
%
V
Current transfer ratio
(Notes 1,2)
V = 0.4 V,
O
V
= 4.5V
CC
(I = 0.5 mA, I = 2 mA, V = 4.5V)
F
O
CC
(I = 1.6 mA, I = 8 mA, V = 4.5V)
0.4
HCPL-0701
HCPL-0731
F
O
CC
Logic low output voltage
output voltage
(I = 5 mA, I = 15 mA, V = 4.5V)
V
OL
0.4
F
O
CC
(I = 12 mA, I = 24 mA, V = 4.5V)
0.4
F
O
CC
(I = 1.6 mA, I = 4.8 mA, V = 4.5V)
HCPL-0700/0730
0.4
F
O
CC
ISOLATION CHARACTERISTICS (T = 0 to 70°C Unless otherwise specified)
A
Characteristics
Test Conditions Symbol
(Relative humidity = 45%)
Min
Typ**
Max
Unit
Input-output
insulation leakage current
(T = 25°C, t = 5 s)
A
I
1.0
µA
I-O
(V = 3000 VDC)
I-O
(Note 4)
(R ≤ 50%, T = 25°C)
(Note 4, 5) ( t = 1 min.)
H
A
Withstand insulation test voltage
Resistance (input to output)
V
2500
V
RMS
ISO
12
(Note 4) (V = 500 VDC)
R
10
Ω
I-O
I-O
** All typicals at T = 25°C
A
© 2003 Fairchild Semiconductor Corporation
Page 3 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
SWITCHING CHARACTERISTICS (T = 0 to 70°C unless otherwise specified., V = 5 V)
A
CC
Parameter
Test Conditions
(R = 4.7 kΩ, I = 0.5 mA)
Symbol
Device
Min
Typ**
Max
Unit
HCPL-0701
HCPL-0731
30
120
25
100
2
L
F
HCPL-0701
3
5
T = 25°C
A
HCPL-0731
(R = 270 Ω, I = 12 mA)
HCPL-0701
L
F
Propagation delay
time to logic low
(Note 2) (Fig. 14)
HCPL-0731
3
T
µs
PHL
HCPL-0701
0.3
0.4
1
T = 25°C
A
HCPL-0731
2
(R = 2.2 kΩ, I = 1.6 mA)
HCPL-0700
15
25
10
20
90
60
10
15
7
L
F
HCPL-0730/0731
HCPL-0700
1
2
T = 25°C
A
HCPL-0730/0731
HCPL-0701/31
HCPL-0701/31
HCPL-0701
(R = 4.7 kΩ, I = 0.5 mA)
L
F
T = 25°C
12
A
(R = 270 Ω, I = 12 mA)
L
F
Propagation delay
time to logic high
(Note 2) (Fig. 14)
HCPL-0731
T
µs
PLH
HCPL-0701
1.6
1.6
T = 25°C
A
HCPL-0731
10
50
35
(R = 2.2 kΩ, I = 1.6 mA)
HCPL-0700/30/31
HCPL-0700/30/31
L
F
T = 25°C
7
A
Common mode
transient
immunity at
logic high
(I = 0 mA, |V | = 10 V )
P-P
F
CM
|CM |
ALL
ALL
1,000 10,000
1,000 10,000
V/µs
V/µs
H
T = 25°C (R = 2.2 kΩ) (Note 3) (Fig. 15)
A L
Common mode
transient
immunity at
logic low
(I = 1.6 mA, |V | = 10 V ,
P-P
F
CM
R = 2.2 kΩ)
|CM |
L
L
T = 25°C (Note 3) (Fig. 15)
A
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, I , to the forward LED input current, I , times 100%.
O
F
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge of the
CM
common mode pulse signal, V , to assure that the output will remain in a logic high state (i.e., V >2.0 V). Common mode
CM
O
transient immunity in logic low level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode
CM
pulse signal, V , to assure that the output will remain in a logic low state (i.e., V <0.8 V).
CM
O
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25°C
© 2003 Fairchild Semiconductor Corporation
Page 4 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 1 Propagation Delay vs.Temperature
Fig. 2 Propagation Delay vs.Temperature
(HCPL-0700, HCPL-0701)
(HCPL-0700, HCPL-0701)
35
20
18
16
14
12
10
8
V
I
R
= 5 V
= 0.5 mA
= 4.7 kΩ
CC
30
I
V
= 1.6 mA
= 5 V
F
F
t
PLH
t
PLH
CC
L
R
L
= 2.2 kΩ
1/f = 50 µs
25
20
15
10
5
1/f = 50 µs
6
4
t
PHL
t
2
PHL
0
0
-60
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T
- TEMPERATURE (˚C)
T - TEMPERATURE (˚C)
A
A
Fig. 3 Propagation Delay vs.Temperature
(HCPL-0700, HCPL-0701)
Fig. 4 Logic High Output Current vs.Temperature
(HCPL-0700, HCPL-0701)
4
3
2
1
0
I
V
R
= 12 mA
= 5 V
F
V
= V = 5.5 V
CC O
1000
100
10
CC
= 270 Ω
1/f = 50 µs
L
t
PLH
1
0.1
0.01
t
PHL
-40
-20
0
20
40
60
80
100
-60
-40
-20
0
20
40
60
80
100
T
- TEMPERATURE (˚C)
T
- TEMPERATURE (˚C)
A
A
Fig. 5 Propagation Delay vs. Input Forward Currrent
(HCPL-0730, HCPL-0731)
Fig. 6 Output Current vs. Input Forward Current
(HCPL-0700, HCPL-0701)
100
10
20
TA = 25
VCC = 5V
16
12
8
tPLH
T
= 85˚C
A
RL = 4.7kΩ
tPLH
1
RL = 2.2kΩ
T
T
T
T
= 70˚C
= 25˚C
= 0˚C
A
A
A
A
0.1
4
0
tPHL
V
V
= 5V
CC
= 0.4V
= -40˚C
RL = 2.2kΩ or 4.7kΩ
O
0.01
0.01
0.1
1
10
0
1
2
3
4
5
6
7
8
9
10
I
- INPUT FORWARD CURRENT (mA)
T
- TEMPERATURE (˚C)
F
A
© 2003 Fairchild Semiconductor Corporation
Page 5 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 7 Input Forward Current vs. Forward Voltage
Fig. 8 Input Forward Current vs. Forward Voltage
(HCPL-0730, HCPL-0731)
(HCPL-0700, HCPL-0701)
100
100
10
T
T
= 85˚C
= 70˚C
A
A
10
1
TA = 85°C
TA = -40°C
TA = 70°C
TA = 25°C
1
TA
= 0°C
0.1
0.1
T
T
T
= 25˚C
= 0˚C
A
A
A
0.01
0.01
= -40˚C
0.001
0.001
1.1
1.2
1.3
1.4
1.5
1.6
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
V
- FORWARD VOLTAGE (V)
V - FORWARD VOLTAGE (V)
F
F
Fig. 10 Supply Current vs. Input Forward Current
(HCPL-0730, HCPL-0731)
Fig. 9 Logic Low Supply Current vs. Input Forward Current
(HCPL-0700, HCPL-0701)
10
1.0
0.1
0.5
TA = 25°C
Logic Low Supply Current vs.
Input Forward Current
V
= 18V
0.4
0.3
0.2
0.1
0.0
CC
V
= 18V
CC
V
= 7V
CC
V
= 5V
CC
0.01
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1
10
I
- INPUT FORWARD CURRENT (mA)
I - INPUT FORWARD CURRENT (mA)
F
F
Fig. 11 DC Transfer Characteristics
(HCPL-0700, HCPL-0701)
Fig. 12 DC Transfer Characteristics
(HCPL-0730, HCPL-0731)
80
60
40
20
0
140
120
100
80
TA = 25°C
CC = 5V
I
I
I
I
I
I
= 5.0mA
= 4.5mA
= 4.0mA
= 3.5mA
= 3.0mA
= 2.5mA
F
F
F
F
F
F
V
IF = 5mA
IF = 4.5mA
4mA
3.5mA
V
= 5V
CC
T
= 25˚C
A
3mA
I
I
= 2.0mA
= 1.5mA
F
2.5mA
60
F
2mA
1.5mA
1mA
I
= 1.0mA
= 0.5mA
40
F
I
F
20
0
0.5mA
0
1
2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
V
- OUTPUT VOLTAGE (V)
V - OUTPUT VOLTAGE (V)
O
O
© 2003 Fairchild Semiconductor Corporation
Page 6 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
TYPICAL PERFORMANCE CURVES
Fig. 13 Current Transfer Ratio vs. Input Forward Current
(HCPL-0700, HCPL-0701)
3500
3000
2500
2000
1500
1000
500
V
V
= 5V
CC
= 0.4V
O
T
= 85˚C
A
T
= 70˚C
A
T
= 25˚C
A
T
= 0˚C
A
T
= -40˚C
A
0
0.1
1
10
I
- INPUT FORWARD CURRENT (mA)
F
Noise
Shield
Noise
Shield
+
IF
VCC
VCC
+5 V
+5 V
2
3
4
8
7
6
5
1
2
8
7
6
5
Pulse
Z
= 50
V
L
VF1
0.1 µF
Generator
tr = 5ns
IF
VB
V01
10% DUTY CYCLE
I/f < 100 µS
VO
RL
Z
= 50 V
VF
I/ < 100µs
C
= 15 pF*
V
V02
VO
IF
VF2
+
0.1 µF
MONITOR
I
Monitor
Rm
GND
Rm
4
CL = 15 pF*
GND
Test Circuit for HCPL-0700 and HCPL-0701
Test Circuit for HCPL-0730 and HCPL-0731
IF
*Includes probe and fixture capacitance
5 V
VO
1.5 V
1.5 V
VOL
TPHL
TPLH
Fig. 14 Switching Time Test Circuit
© 2003 Fairchild Semiconductor Corporation
Page 7 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
IF
Noise
Shield
Noise
Shield
VCC
VCC
+
+5 V
+5 V
VO
8
7
6
5
2
3
8
7
6
5
IF
VF1
RL
V
V01
V02
RL
2
A
VF
0.1 µF
A
B
VO
VO
3
B
VFF
VF2
+
0.1 µF
VFF
GND
GND
4
VCM
+
VCM
+
Pulse Gen
Pulse Gen
Test Circuit for HCPL-0730 and HCPL-0731
Test Circuit for HCPL-0700 and HCPL-0701
V
CM
10 V
90% 90%
10%
10%
tf
0 V
tr
VO
5 V
Switch at A : I = 0 mA
VO
VOL
Switch at B : I = 1.6 mA
Fig. 15 Common Mode Immunity Test Circuit
© 2003 Fairchild Semiconductor Corporation
Page 8 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
8-Pin Small Outline
0.024 (0.61)
0.060 (1.52)
0.275 (6.99)
0.155 (3.94)
0.050 (1.27)
© 2003 Fairchild Semiconductor Corporation
Page 9 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
ORDERING INFORMATION
Option
Order Entry Identifier
Description
V
V
VDE 0884
R1
R1
Tape and reel (500 units per reel)
R1V
R2
R1V
R2
VDE 0884, Tape and reel (500 units per reel)
Tape and reel (2500 units per reel)
R2V
R2V
VDE 0884, Tape and reel (2500 units per reel)
MARKING INFORMATION
1
2
700
6
V
X YY S
5
3
4
Definitions
1
2
Fairchild logo
Device number
VDE mark (Note: Only appears on parts ordered with VDE
option – See order entry table)
3
4
5
6
One digit year code, e.g., ‘3’
Two digit work week ranging from ‘01’ to ‘53’
Assembly package code
© 2003 Fairchild Semiconductor Corporation
Page 10 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
Carrier Tape Specifications
8.0 ± 0.10
3.50 ± 0.20
2.0 ± 0.05
4.0 ± 0.10
Ø1.5 MIN
0.30 MAX
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.3 ± 0.10
5.20 ± 0.20
Ø1.5 ± 0.1/-0
6.40 ± 0.20
0.1 MAX
User Direction of Feed
Reflow Profile
300
250
200
150
100
50
230°C, 10–30 s
245°C peak
Time above 183°C, 120–180 sec
Ramp up = 2–10°C/sec
• Peak reflow temperature: 245°C (package surface temperature)
• Time of temperature higher than 183°C for 120–180 seconds
• One time soldering reflow is recommended
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
© 2003 Fairchild Semiconductor Corporation
Page 11 of 12
12/11/03
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
HCPL-0700
HCPL-0730
HCPL-0701
HCPL-0731
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
© 2003 Fairchild Semiconductor Corporation
Page 12 of 12
12/11/03
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