FSA5157_08 [FAIRCHILD]

0.4ヘ Low-Voltage SPDT Analog Switch; 0.4Ω的低电压SPDT模拟开关
FSA5157_08
型号: FSA5157_08
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

0.4ヘ Low-Voltage SPDT Analog Switch
0.4Ω的低电压SPDT模拟开关

开关 光电二极管
文件: 总12页 (文件大小:542K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
February 2008  
FSA5157  
0.4Ω Low-Voltage SPDT Analog Switch  
Features  
General Description  
Typical 0.4Ω On Resistance (RON) for +2.7V Supply  
FSA5157 Features Less than 12μA ICCT Current  
When S Input is Lower than VCC  
The FSA5157 is a low on resistance, low-power, Single  
Pole Double Throw (SPDT) analog switch. This product  
has been designed for switching audio signals in applica-  
tions such as cell phones and portable media players.  
The ultra-low 0.4Ω impedance, sub-μA current consump-  
tion, and 1.65V to 4.3V operating voltage range makes  
this product ideal for battery-powered applications. The  
FSA5157 also features bi-directional operation and  
break-before-make functionality. This device is fully  
specified for operation at 1.8V, 2.5V, and 3.3V.  
0.25Ω Maximum RON Flatness for +2.7V Supply  
1.0 x 1.45mm 6-Lead MicroPakPackage  
Broad VCC Operating Range: 1.65V to 4.3V  
Low THD (0.02% Typical for 32Ω Load)  
High-Current Handling Capability  
(350mA Continuous Current Under 3.3V Supply)  
Control Logic is 1.8V CMOS Logic Compatible  
A growing number of applications require the voltage  
applied to the select input to be lower than the VCC  
applied. Under this condition, most switches would typi-  
cally consume over 100μA of current. This would be an  
unacceptable level for battery-powered applications. The  
FSA5157 is designed to minimize current consumption  
Applications  
Cellular Phone  
PDA  
Portable Media Player  
under this condition. The ICCT is specified for  
<12μA under  
a worst-case condition of VCC = 4.3V and VIN = 1.8V  
.
Ordering Information  
Order Number  
FSA5157P6X  
FSA5157L6X  
Top Mark  
C57  
Package Description  
6-Lead SC70, EIAJ SC88, 1.25mm Wide 3000 Units on Tape and Reel  
6-Lead MicroPak, 1.0mm Wide 5000 Units on Tape and Reel  
Packing Method  
FT  
All packages are lead free per JEDEC: J-STD-020B standard.  
Application Diagram  
Headphone  
VCC  
Internal  
Speaker  
Audio  
Amplifier  
S
Figure 1. Application Diagram  
MicroPakis a trademark of Fairchild Semiconductor Corporation.  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
Pin Assignments  
Truth Tables  
Control Input(s)  
Function  
LOW Logic Level  
HIGH Logic Level  
B0 Connected to A  
B1 Connected to A  
B
1
2
3
6
5
4
S
V
A
1
Pin Descriptions  
GND  
CC  
Pin Names  
A, B0, B1  
S
Function  
Data Ports  
Control Input  
B
0
Figure 2. 6-Lead SC70  
S
1
2
3
6
5
4
B
1
V
GND  
CC  
A
B
0
Figure 3. 6-Lead MicroPak™  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-  
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-  
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The  
absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
VS  
Parameter  
Min.  
0.5  
0.5  
0.5  
Max  
5.5  
Units  
V
Supply Voltage  
Switch Voltage(1)  
Input Voltage(1)  
Input Diode Current  
Switch Current  
VCC + 0.3V  
VCC  
V
VIN  
V
IIK  
50  
mA  
mA  
mA  
mW  
mW  
°C  
ISW  
350  
ISWPEAK Peak Switch Current (Pulsed at 1ms duration, <10% Duty Cycle)  
500  
SC70 6L Package  
PD  
180  
MicroPak 6L Package  
180  
TSTG  
TJ  
Storage Temperature Range  
Maximum Junction Temperature  
Lead Temperature Soldering, 10 seconds  
Human Body Model  
65  
+150  
+150  
+260  
8000  
°C  
TL  
°C  
ESD  
V
Note:  
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are  
observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to absolute maximum ratings.  
Symbol  
VCC  
VIN  
Parameter  
Min.  
1.65  
0
Max.  
4.30  
VCC  
VCC  
+85  
Rating  
Supply Voltage  
V
V
Control Input Voltage(2)  
Switch Input Voltage  
Operating Temperature  
VIN  
0
V
TA  
40  
°C  
Note:  
2. Unused inputs must be held HIGH or LOW. They may not float.  
©2006 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA5157 Rev. 1.0.3  
3
DC Electrical Characteristics  
All typical values are at 25°C unless otherwise specified.  
TA= -40°C to  
+85°C  
TA=+25°C  
Symbol  
Parameter  
Conditions  
VCC (V)  
Units  
Min. Typ. Max. Min.  
Max.  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.4  
1.3  
1.1  
V
Input Voltage High  
V
IH  
1.65 to  
1.95  
0.9  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
0.7  
0.5  
0.4  
V
I
Input Voltage Low  
V
IL  
1.65 to  
1.95  
0.4  
0.5  
Control Input Leakage  
Off-Leakage Current of  
V
= 0V to V  
CC  
1.65 to 4.3  
0.5  
μA  
IN  
IN  
A = 0.3V, V 0.3V,  
CC  
I
I
,
NO(OFF)  
B or B = 0.3V,  
1.95 to 4.3  
-10  
10  
20  
50  
50  
nA  
0
1
Port B and B  
0 1  
NC(OFF)  
V
0.3V or Floating  
CC  
A = 0.3V, V 0.3V,  
CC  
On Leakage Current of  
Port A  
I
B or B = 0.3V,  
1.95 to 4.3  
20  
100  
100  
nA  
A(ON)  
0
1
V
0.3V or Floating  
CC  
I
= 100mA, B or  
0
OUT  
4.3  
2.7  
0.36  
0.4  
0.60  
0.7  
B = 0V, 0.7V, 3.6V, 4.3V  
1
I
= 100mA, B or  
0
OUT  
B = 0V, 0.7V, 2.0V, 2.7V  
1
(3)  
R
Switch On Resistance  
Ω
ON  
I
= 100mA, B or  
0
OUT  
2.3  
0.55  
1.5  
0.80  
3.0  
B = 0V, 0.7V, 2.0V, 2.3V  
1
I
= 100mA, B or  
0
OUT  
1.65  
2.5  
B = 0.7V  
1
4.3  
2.7  
0.04  
0.06  
0.12  
1.0  
0.75  
0.13  
0.20  
On Resistance Matching  
Between Channels  
I
= 100mA,  
OUT  
ΔR  
Ω
Ω
(4)  
ON  
B or B = 0.7V  
0
1
2.3  
1.65  
4.3  
0.25  
0.25  
0.3  
2.7  
On Resitance  
I
= 100mA,  
OUT  
R
(5)  
FLAT(ON)  
Flatness  
B or B = 0V to V  
0
1
CC  
2.3  
1.65  
0.3  
30  
Quiescent Supply  
Current  
I
V
= 0V or V , I = 0  
CC OUT  
4.3  
100  
100  
500  
500  
nA  
CC  
IN  
15.0  
7.0  
μA  
V
V
= 1.8V  
= 2.6V  
4.3  
4.3  
7.0  
3.0  
12.0  
6.0  
Increase in I per  
Control Input  
IN  
CC  
ICCT  
IN  
Notes:  
3. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.  
4. ΔRON = RONmax RONmin measured at identical VCC, temperature, and voltage.  
5. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified  
range of conditions.  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
4
AC Electrical Characteristics  
All typical values are at 25°C unless otherwise specified.  
TA = -40×C to  
+85×C  
TA = +25×C  
Min. Typ. Max.  
Symbol  
Parameter  
Conditions  
VCC (V)  
Units Figure  
Min.  
Max.  
60  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.65 to 1.95  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.65 to 1.95  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.65 to 1.95  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.65 to 1.95  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.65 to 1.95  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
1.65 to 1.95  
1.65 to 4.3  
3.6 to 4.3  
55  
60  
65  
65  
B or B = 1.5V,  
0
1
t
Turn-On Time  
ns  
ns  
Figure 7  
Figure 7  
Figure 8  
Figure 11  
Figure 9  
Figure 10  
ON  
R = 50Ω, C = 35pF  
L
L
70  
70  
40  
90  
30  
35  
40  
35  
40  
B or B = 1.5V,  
0
1
t
Turn-Off Time  
OFF  
R = 50Ω, C = 35pF  
L
L
45  
55  
5
5
5
5
Break-Before-  
Make Time  
B or B = 1.5V,  
0 1  
t
ns  
BBM  
R = 50Ω, C = 35pF  
L
L
6
6
6
C = 1.0 nF, V  
= 0V,  
L
GEN  
Q
Charge Injection  
Off-Isolation  
pC  
dB  
dB  
R
= 0Ω  
GEN  
-75  
-75  
-75  
-75  
-75  
-75  
-75  
-70  
80  
f = 100kHz, R =50Ω,  
L
OIRR  
C = 5pF (Stray)  
L
f = 100kHz, R =50Ω,  
L
Xtalk  
BW  
Crosstalk  
C = 5pF (Stray)  
L
-3db Bandwidth  
R = 50Ω  
MHz Figure 13  
L
R = 32Ω, V = 2V ,  
PP  
L
IN  
2.7 to 3.6  
2.3 to 2.7  
0.02  
0.036  
0.01  
f = 20Hz to 20kHz  
R = 32Ω, V =1.5V ,  
PP  
Total Harmonic  
Distortion  
THD  
%
Figure 14  
L
IN  
f = 20Hz to 20kHz  
R = 32Ω, V =1.2V ,  
PP  
L
IN  
1.65 to 1.95  
f = 20Hz to 20kHz  
Capacitance  
TA =40°C to  
+85°C  
Units Figure  
TA =+25°C  
Symbol  
Parameter  
Conditions VCC (V)  
Min. Typ. Max. Min. Max.  
C
Control Pin Input Capacitance  
B Port OFF Capacitance  
A Port ON Capacitance  
f = 1MHz  
f = 1MHz  
f = 1MHz  
0.0  
4.5  
4.5  
1.5  
pF  
pF  
pF  
Figure 12  
Figure 12  
Figure 12  
IN  
C
21.0  
90.0  
OFF  
C
ON  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
5
Typical Characteristics  
600  
540  
480  
420  
360  
300  
240  
180  
120  
60  
600  
540  
480  
420  
360  
85°C  
85°C  
25°C  
-40°C  
300  
-40°C  
25°C  
240  
180  
120  
60  
0
0
0.00  
0.60  
1.20  
VB (V)  
Sweep Left to Right →  
1.80  
2.40  
3.0  
0.00  
0.50  
1.00  
1.50  
2.00  
2.50  
VB (V)  
Sweep Left to Right →  
Figure 4. RON Switch On Resistance,  
Figure 5. RON Switch On Resistance,  
ON = 100mA, VCC = 2.7V B0  
ION = 100mA, VCC = 2.3V B0  
I
500  
450  
400  
350  
300  
85°C  
25°C  
-40°C  
250  
200  
160  
100  
50  
0
0.00  
0.90  
1.80  
2.70  
3.60  
4.50  
VB (V)  
Sweep Left to Right →  
Figure 6. RON Switch On Resistance, ION = 100mA, VCC = 4.3V B0  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
6
AC Loading and Waveforms  
tFALL = 2.5ns  
tRISE = 2.5ns  
VCC  
Bn  
90%  
/2  
90%  
A
Input – S  
V
V
/2  
CC  
CC  
VIN  
VOUT  
10%  
10%  
GND  
CLL  
RL  
RS  
GND  
VOH  
Output – VOUT  
VOL  
90%  
90%  
GND  
VSel  
GND  
tON  
tOFF  
Notes:  
6. RL, RS, and CL are functions of the application environment (see AC Electrical table for specific values).  
7. CL includes test fixture and stray capacitance.  
Figure 7. Turn-Off Timing  
VCC  
VCC  
VCC  
0V  
B
0
Control  
Input  
VB  
50%  
tR  
A
VOUT  
CL*  
B
11  
=
tF  
=
2.5 ns (10–90%)  
0.9 x VOUT  
RL  
S
VOUT  
Control  
Input  
GND  
tBBM  
*CL includes fixture and stray capacitance  
Figure 8. Break-Before-Make Timing  
Network Analyzer  
RS  
VIN  
VS  
RT  
GND  
GND  
GND  
V
GND  
Sel  
V
OUT  
GND  
RT  
Off-Isolation = 20 Log (VOUT/VIN)  
GND  
Figure 9. Off Isolation  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
7
AC Loading and Waveforms (continued)  
Network Analyzer  
RS  
V
IN  
VS  
GND  
GND  
GND  
V
Sel  
RT  
GND  
GND  
VOUT  
RT  
R
S and RT are functions of the application environment  
GND  
(50, 75, or 100).  
Crosstalk = 20 Log (VOUT/VIN)  
Figure 10. Non-Adjacent Channel-to-Channel Crosstalk  
Generator  
RS  
GND  
VCC  
VIN
nB  
n
Input – VSel  
Off  
On  
Off  
VS  
0V  
VOUT  
CL*  
ΔVOUT  
nSn  
GND  
VOUT  
V
Sel  
*CL includes fixture and stray capacitance.  
Q = ΔVOUT x C  
L
GND  
Figure 11. Charge Injection Test  
A
A
Capacitance  
Meter  
S
S
Capacitance  
Meter  
f=1MHz  
V
= 0 or VCC  
VSEL = 0 or VCC  
SEL  
f=1MHz  
B
n
B
n
Channel Off Capacitance  
Channel On Capacitance  
Figure 12. On/Off Capacitance Measurement Setup  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
8
AC Loading and Waveforms (continued)  
Network Analyzer  
RS  
VIN  
VS  
GND  
GND  
GND  
VSel  
VOUT  
GND  
RT  
GND  
Figure 13. Bandwidth  
10nF  
VIN  
VCC  
BN  
Analyzer  
Signal  
Generator  
RL  
S
Logic Input  
0V or VCC  
GND  
Figure 14. Harmonic Distortion  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
9
Physical Dimensions  
Figure 15. 6-Lead SC70, EIAJ SC88, 1.25mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
10  
Physical Dimensions  
2X  
0.05 C  
1.45  
B
(1)  
2X  
0.05 C  
(0.49)  
5X  
1.00  
(0.75)  
(0.52)  
1X  
A
TOP VIEW  
0.55MAX  
(0.30)  
6X  
PIN 1  
0.05 C  
0.05  
0.00  
RECOMMENED  
LAND PATTERN  
0.05 C  
C
0.45  
0.35  
0.10  
6X  
0.00  
0.25  
6X  
0.15  
1.0  
DETAIL A  
0.10  
C B A  
0.40  
0.30  
0.05  
C
0.35  
0.25  
5X  
5X  
0.40  
0.30  
DETAIL A  
PIN 1 TERMINAL  
0.075 X 45  
CHAMFER  
0.5  
BOTTOM VIEW  
(0.05)  
6X  
(0.13)  
4X  
Notes:  
1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD  
2. DIMENSIONS ARE IN MILLIMETERS  
3. DRAWING CONFORMS TO ASME Y14.5M-1994  
MAC06AREVC  
Figure 16. 6-Lead MicroPak™, 1.0mm Wide  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/  
For MicroPak tape and reel specifications, please visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf  
©2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
11  
© 2006 Fairchild Semiconductor Corporation  
FSA5157 Rev. 1.0.3  
www.fairchildsemi.com  
12  

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