FQD12P10TM_F085 [FAIRCHILD]
Power Field-Effect Transistor, 9.4A I(D), 100V, 0.29ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, DPAK-3/2;
| 型号： | FQD12P10TM_F085 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 9.4A I(D), 100V, 0.29ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, DPAK-3/2 开关 脉冲 晶体管 |
| 文件： | 总8页 (文件大小：862K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2010
tm
FQD12P10TM_F085
100V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
•
•
•
•
•
•
-9.4A, -100V, R
= 0.29Ω @V = -10 V
DS(on) GS
Low gate charge ( typical 21 nC)
Low Crss ( typical 65 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
•
•
Qualified to AEC Q101
RoHS Compliant
D
D
G
G
S
D-PAK
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
Ratings
-100
-9.4
Units
V
V
I
Drain-Source Voltage
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
-6.0
A
C
I
(Note 1)
Drain Current
- Pulsed
-37.6
± 30
A
DM
V
E
I
Gate-Source Voltage
V
GSS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
370
mJ
A
AS
-9.4
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
5.0
mJ
V/ns
W
AR
dv/dt
-6.0
Power Dissipation (T = 25°C) *
2.5
P
A
D
Power Dissipation (T = 25°C)
50
W
C
- Derate above 25°C
Operating and Storage Temperature Range
0.4
W/°C
°C
T , T
-55 to +150
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8! from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
2.5
50
θJC
θJA
θJA
--
--
110
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Fairchild Semiconductor Corporation
FQD12P10TM_F085 Rev. A
1
www.fairchildsemi.com
Electrical Characteristics
T = 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
V
= 0 V, I = -250 µA
GS D
Drain-Source Breakdown Voltage
-100
--
--
--
--
V
DSS
∆BV
Breakdown Voltage Temperature
Coefficient
DSS
I
= -250 µA, Referenced to 25°C
-0.1
V/°C
D
/
∆T
J
I
V
V
V
V
= -100 V, V = 0 V
--
--
--
--
--
--
--
--
-1
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= -80 V, T = 125°C
-10
DS
GS
GS
C
I
= -30 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
-100
100
GSSF
DS
I
= 30 V, V = 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V , I = -250 µA
Gate Threshold Voltage
-2.0
--
--
-4.0
0.29
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= -10 V, I = -4.7 A
0.24
6.3
D
g
= -40 V, I = -4.7 A
(Note 4)
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
--
--
--
620
220
65
800
290
85
pF
pF
pF
iss
V
= -25 V, V = 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
15
160
35
40
330
80
130
27
--
ns
ns
d(on)
V
= -50 V, I = -11.5 A,
DD
D
r
R
= 25 Ω
G
ns
d(off)
f
(Note 4, 5)
60
ns
Q
Q
Q
21
nC
nC
nC
g
V
V
= -80 V, I = -11.5 A,
DS
D
4.6
11.5
= -10 V
gs
gd
GS
(Note 4, 5)
--
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
--
--
--
--
--
--
--
-9.4
-37.6
-4.0
--
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0 V, I = -9.4 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
--
V
SD
GS
S
= 0 V, I = -11.5 A,
110
0.47
ns
µC
rr
GS
S
(Note 4)
dI / dt = 100 A/µs
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 6.3mH, I = -9.4A, V = -25V, R = 25 Ω, Starting T = 25°C
AS
DD
G
J
3. I " -11.5A, di/dt " 300A/µs, V
" BV Starting T = 25°C
SD
DD
DSS, J
4. Pulse Test : Pulse width " 300µs, Duty cycle " 2%
5. Essentially independent of operating temperature
FQD12P10TM_F085 Rev. A
2
www.fairchildsemi.com
Typical Characteristics
VGS
Top :
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-5.5 V
-5.0 V
101
100
101
Bottom: -4.5 V
!
150
100
!
25
-1
10
!
-55
"
Notes :
"
Notes :
#
1. VDS = -40V
1. 250 s Pulse Test
#
2. 250 s Pulse Test
!
2. TC = 25
-2
-1
10
10
-1
100
101
2
4
6
8
10
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.8
0.6
0.4
0.2
0.0
VGS = - 10V
101
VGS = - 20V
100
!
25
!
150
"
Notes :
1. VGS = 0V
"
!
Note : T = 25
J
#
2. 250 s Pulse Test
-1
10
0
10
20
30
40
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1600
1400
1200
1000
800
600
400
200
0
12
10
8
C
iss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
rss = C
VDS = -20V
VDS = -50V
C
gd
Coss
C
iss
VDS = -80V
"
Notes :
1. VGS = 0 V
2. f = 1 MHz
6
C
rss
4
2
"
Note : ID = -11.5 A
20
0
-1
10
100
101
0
4
8
12
16
24
QG, Total Gate Charge [nC]
-VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
FQD12P10TM_F085 Rev. A
3
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Typical Characteristics (Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
"Notes :
1. VGS = 0 V
2. ID = -250 # A
0.9
0.8
"
Notes :
1. VGS = -10 V
2. ID = -4.7 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
TJ, Junction Temperature [oC]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
10
8
102
101
100
Operation in This Area
is Limited by R DS(on)
100 µs
1 ms
6
10 ms
DC
4
"
Notes :
1. TC = 25 o
2. TJ = 150 o
2
C
C
3. Single Pulse
-1
0
25
10
100
101
102
50
75
100
125
150
!
TC, Case Temperature [
]
-VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
1 0 0
"
N otes
1. Z $ (t)
2. D uJtCy Factor, D =t1/t2
:
!
/W M ax.
=
2.5
0 .2
3. T J M
-
TC
=
P D M * Z$ JC (t)
0 .1
0 .0 5
1 0 -1
0 .0 2
0 .0 1
PDM
t1
t2
s in g le p u ls e
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1, S q u a re W a ve P u ls e D u ra tio n [se c]
Figure 11. Transient Thermal Response Curve
FQD12P10TM_F085 Rev. A
4
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Gate Charge Test Circuit & Waveform
VGS
Same Type
50K%
as DUT
Qg
12V
200nF
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
RL
t on
t off
VDS
td(on)
tr
td(off)
tf
VDD
VGS
VGS
RG
10%
DUT
-10V
90%
VDS
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
LIAS
VDS
I D
t p
Time
VDD
VDS (t)
RG
VDD
ID (t)
DUT
-10V
IAS
t p
BVDSS
FQD12P10TM_F085 Rev. A
5
www.fairchildsemi.com
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
_
I SD
L
Driver
RG
Compliment of DUT
(N-Channel)
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
Body Diode Reverse Current
IRM
I SD
( DUT )
di/dt
IFM , Body Diode Forward Current
VSD
VDS
( DUT )
Body Diode
VDD
Forward Voltage Drop
Body Diode Recovery dv/dt
FQD12P10TM_F085 Rev. A
6
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Package Dimensions
D-PAK
6.60 ±0.20
5.34 ±0.30
2.30 ±0.10
0.50 ±0.10
(0.50)
(4.34)
(0.50)
MAX0.96
0.76 ±0.10
0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
2.30TYP
2.30TYP
[2.30±0.20]
[2.30±0.20]
6.60 ±0.20
(5.34)
(5.04)
(1.50)
(2XR0.25)
0.76 ±0.10
Dimensions in Millimeters
FQD12P10TM_F085 Rev. A
7
www.fairchildsemi.com
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®
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Saving our world, 1mW/W/kW at a time™
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MicroPak2™
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SMART START™
®
®
SPM
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STEALTH™
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Sync-Lock™
®*
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THEREIN, WHICH COVERS THESE PRODUCTS.
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EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
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intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Preliminary
First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
No Identification Needed
Obsolete
Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I47
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FQD12P10TM_F085 Rev. A
8
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