FQA7N90M [FAIRCHILD]

900V N-Channel MOSFET; 900V N沟道MOSFET
FQA7N90M
型号: FQA7N90M
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

900V N-Channel MOSFET
900V N沟道MOSFET

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中文:  中文翻译
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January 2002  
TM  
QFET  
FQA7N90M  
900V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pulse in the  
avalanche and commutation mode. These devices are well  
suited for high efficiency switch mode power supplies..  
7A, 900V, R  
= 1.8@V = 10 V  
DS(on) GS  
Low gate charge ( typical 40 nC)  
Low Crss ( typical 17 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
!
G!  
!
S
TO-3P  
FQA Series  
G D S  
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQA7N90M  
Units  
V
V
I
Drain-Source Voltage  
900  
7.0  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
4.4  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
28  
A
DM  
V
E
I
Gate-Source Voltage  
± 30  
780  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
6.4  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
21  
mJ  
V/ns  
W
AR  
dv/dt  
4.0  
P
Power Dissipation (T = 25°C)  
210  
D
C
- Derate above 25°C  
Operating and Storage Temperature Range  
1.69  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Case-to-Sink  
Thermal Resistance, Junction-to-Ambient  
Typ  
--  
Max  
0.59  
--  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
θJC  
θCS  
θJA  
0.24  
--  
40  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
Electrical Characteristics  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV  
V
= 0 V, I = 250 µA  
GS D  
Drain-Source Breakdown Voltage  
900  
--  
--  
--  
--  
V
DSS  
BV  
Breakdown Voltage Temperature  
Coefficient  
DSS  
I
= 250 µA, Referenced to 25°C  
0.96  
V/°C  
D
/
T  
J
I
V
V
V
V
= 900 V, V = 0 V  
--  
--  
--  
--  
--  
--  
--  
--  
10  
100  
100  
-100  
µA  
µA  
nA  
nA  
DSS  
DS  
GS  
Zero Gate Voltage Drain Current  
= 720 V, T = 125°C  
DS  
GS  
GS  
C
I
= 30 V, V = 0 V  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
GSSF  
DS  
I
= -30 V, V = 0 V  
GSSR  
DS  
On Characteristics  
V
V
V
V
= V , I = 250 µA  
Gate Threshold Voltage  
3.0  
--  
--  
5.0  
1.8  
--  
V
S
GS(th)  
DS  
GS  
DS  
GS  
D
R
Static Drain-Source  
On-Resistance  
DS(on)  
=10V,I =3.5 A  
1.5  
5.7  
D
g
= 50 V, I = 3.5 A  
(Note 4)  
Forward Transconductance  
--  
FS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
--  
--  
--  
1440  
140  
17  
1880  
185  
23  
pF  
pF  
pF  
iss  
V
= 25 V, V = 0 V,  
GS  
DS  
Output Capacitance  
oss  
rss  
f = 1.0 MHz  
Reverse Transfer Capacitance  
Switching Characteristics  
t
t
t
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
--  
--  
--  
--  
--  
--  
--  
35  
80  
95  
55  
40  
8.5  
20  
80  
170  
200  
120  
52  
ns  
ns  
d(on)  
V
= 450 V, I = 7.0 A,  
DD  
D
r
R
= 25 Ω  
G
ns  
d(off)  
f
(Note 4, 5)  
(Note 4, 5)  
ns  
Q
Q
Q
nC  
nC  
nC  
g
V
V
= 720 V, I = 7.0 A,  
DS  
D
--  
= 10 V  
gs  
gd  
GS  
--  
Drain-Source Diode Characteristics and Maximum Ratings  
I
Maximum Continuous Drain-Source Diode Forward Current  
--  
--  
--  
--  
--  
--  
--  
6.4  
25.6  
1.4  
--  
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current  
SM  
V
t
V
V
= 0 V, I = 7.0 A  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
--  
V
SD  
GS  
S
= 0 V, I = 7.0 A,  
400  
4.3  
ns  
µC  
rr  
GS  
S
(Note 4)  
dI / dt = 100 A/µs  
Q
Reverse Recovery Charge  
--  
F
rr  
Notes:  
1. Repetitive Rating : Pulse width limited by maximum junction temperature  
2. L = 30mH, I = 7.0A, V = 50V, R = 25 Ω, Starting T = 25°C  
AS  
DD  
G
J
3. I 7.0A, di/dt 200A/µs, V  
BV  
Starting T = 25°C  
4. Pulse Test : Pulse width 300µs, Duty cycle 2%  
SD  
DD  
DSS,  
J
5. Essentially independent of operating temperature  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
Typical Characteristics  
V
Top :  
15.0GVS  
10.0 V  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
5.5 V  
101  
100  
1
10  
Bottom: 5.0 V  
0
10  
150  
10-1  
25  
Notes :  
Notes :  
μ
1. V = 50V  
2. 250 s Pulse Test  
1. 250 s Pulse Test  
2. TC = 25  
DS μ  
-55  
-1  
10  
10-2  
10  
-1  
100  
101  
2
4
6
8
10  
VGS, Gate-Source Voltage [V]  
VDS, Drain-Source Voltage [V]  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
4
3
2
1
0
101  
VGS = 10V  
VGS = 20V  
100  
Notes :  
150  
25  
1. V = 0V  
Note : T = 25  
GS μ  
2. 250 s Pulse Test  
J
-1  
10  
0
5
10  
15  
20  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
ID, Drain Current [A]  
V , Source-Drain voltage [V]  
SD  
Figure 3. On-Resistance Variation vs  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation with Source Current  
and Temperature  
3000  
12  
10  
8
C
iss = Cgs + Cgd (Cds = shorted)  
Coss = Cds + C  
gd  
VDS = 180V  
VDS = 450V  
VDS = 720V  
Crss = Cgd  
2500  
2000  
1500  
1000  
500  
C
iss  
6
C
oss  
Notes :  
4
1. VGS = 0 V  
2. f = 1 MHz  
C
rss  
2
Note : ID = 7.0A  
0
0
10  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
-1  
0
10  
1
10  
QG, Total Gate Charge [nC]  
VDS, Drain-Source Voltage [V]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
Typical Characteristics (Continued)  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.2  
1.1  
1.0  
Notes:  
1. V = 0 V  
0.9  
2. IDG=S 250  
A
Notes :  
μ
1. VGS = 10 V  
2. ID = 3.5 A  
0.8  
-100  
-100  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
TJ, Junction Temperature [oC]  
T, Junction Temperature [oC]  
J
Figure 7. Breakdown Voltage Variation  
vs Temperature  
Figure 8. On-Resistance Variation  
vs Temperature  
8
6
4
2
0
102  
101  
100  
Operation in This Area  
is Limited by R DS(on)  
100 µs  
1 ms  
10 ms  
DC  
-1  
10  
Notes :  
1. TC = 25 o  
2. TJ = 150 o  
3. Single Pulse  
C
C
-2  
10  
100  
101  
102  
103  
25  
50  
75  
100  
125  
150  
TC, Case Temperature [  
]
VDS, Drain-Source Voltage [V]  
Figure 9. Maximum Safe Operating Area  
Figure 10. Maximum Drain Current  
vs Case Temperature  
D = 0 .5  
N o te s  
:
/W M a x.  
1 . Z θ J C(t)  
=
0 .5 9  
0 .2  
2 . D u ty F a c to r, D = t1/t2  
3 . T J M T C P D M Z θ J C(t)  
1 0 -1  
-
=
*
0 .1  
0 .0 5  
PDM  
0 .0 2  
t1  
0 .0 1  
s in g le p u ls e  
1 0 -2  
t2  
1 0 -5  
1 0 -4  
1 0 -3  
1 0 -2  
1 0 -1  
1 0 0  
1 0 1  
t1 , S q u a re W a ve P u ls e D u ra tio n [s e c ]  
Figure 11. Transient Thermal Response Curve  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
Gate Charge Test Circuit & Waveform  
VGS  
Same Type  
50KΩ  
as DUT  
Qg  
12V  
200nF  
10V  
300nF  
VDS  
VGS  
Qgs  
Qgd  
DUT  
3mA  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
10V  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Unclamped Inductive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS - VDD  
L
1
2
2
----  
EAS  
=
L IAS  
VDS  
I D  
BVDSS  
IAS  
RG  
VDD  
ID (t)  
VDD  
VDS (t)  
DUT  
10V  
t p  
t p  
Time  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
Package Dimensions  
TO-3P  
15.60 ±0.20  
4.80 ±0.20  
13.60 ±0.20  
9.60 ±0.20  
+0.15  
ø3.20 ±0.10  
1.50  
–0.05  
2.00 ±0.20  
3.00 ±0.20  
1.00 ±0.20  
1.40 ±0.20  
+0.15  
–0.05  
0.60  
5.45TYP  
[5.45 ±0.30]  
5.45TYP  
[5.45 ±0.30]  
Dimensions in Millimeters  
©2002 Fairchild Semiconductor Corporation  
Rev. A, January 2002  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not  
intended to be an exhaustive list of all such trademarks.  
ACEx™  
Bottomless™  
CoolFET™  
FAST®  
FASTr™  
FRFET™  
OPTOLOGIC™  
OPTOPLANAR™  
PACMAN™  
SMART START™  
STAR*POWER™  
Stealth™  
VCX™  
CROSSVOLT™  
DenseTrench™  
DOME™  
EcoSPARK™  
E2CMOS™  
EnSigna™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
POP™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
TruTranslation™  
TinyLogic™  
Power247™  
PowerTrench®  
QFET™  
QS™  
QT Optoelectronics™  
Quiet Series™  
SLIENT SWITCHER®  
FACT™  
FACT Quiet Series™  
UHC™  
UltraFET®  
STAR*POWER is used under license  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY  
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY  
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;  
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR  
CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body,  
or (b) support or sustain life, or (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in significant injury to the user.  
2. A critical component is any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In  
Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
©2002 Fairchild Semiconductor Corporation  
Rev. H4  

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