FOD3180TV [FAIRCHILD]

2A Output Current, High Speed MOSFET Gate Driver Optocoupler; 2A输出电流,高速MOSFET栅极驱动光电耦合器
FOD3180TV
型号: FOD3180TV
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

2A Output Current, High Speed MOSFET Gate Driver Optocoupler
2A输出电流,高速MOSFET栅极驱动光电耦合器

栅极 光电 MOSFET栅极驱动 输出元件
文件: 总13页 (文件大小:742K)
中文:  中文翻译
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January 2007  
FOD3180  
tm  
2A Output Current, High Speed MOSFET Gate Driver  
Optocoupler  
Features  
Description  
Guaranteed operating temperature range of -40°C to  
The FOD3180 is a 2A Output Current, High Speed  
MOSFET Gate Drive Optocoupler. It consists of a  
aluminium gallium arsenide (AlGaAs) light emitting diode  
optically coupled to a CMOS detector with PMOS and  
NMOS output power transistors integrated circuit power  
stage. It is ideally suited for high frequency driving of  
power MOSFETs used in Plasma Display Panels  
(PDPs), motor control inverter applications and high  
performance DC/DC converters.  
+100°C  
2A minimum peak output current  
High speed response: 200ns max propagation delay  
over temperature range  
250kHz maximum switching speed  
30ns typ pulse width distortion  
Wide V operating range: 10V to 20V  
CC  
5000Vrms, 1 minute isolation  
The device is packaged in an 8-pin dual in-line housing  
compatible with 260°C reflow processes for lead free  
solder compliance.  
Under voltage lockout protection (UVLO) with  
hysteresis  
Minimum creepage distance of 7.0mm  
Minimum clearance distance of 7.0mm  
C-UL, UL and VDE* safety agency approvals pending  
R  
of 1.5(typ.) offers lower power dissipation  
DS(ON)  
10kV/µs minimum common mode rejection  
Applications  
Plasma Display Panel  
High performance DC/DC convertor  
High performance switch mode power supply  
High performance uninterruptible power supply  
Isolated Power MOSFET gate drive  
*Requires ‘V’ ordering option  
Functional Block Diagram  
FOD3180  
1
2
3
4
8
7
NO CONNECTION  
VCC  
8
ANODE  
OUTPUT  
1
CATHODE  
6 OUTPUT  
5 VEE  
NO CONNECTION  
8
8
1
1
Note:  
A 0.1µF bypass capacitor must be connected  
between pins 5 and 8.  
©2005 Fairchild Semiconductor Corporation  
1
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Absolute Maximum Ratings (T = 25°C Unless otherwise specified)  
A
Symbol  
Parameter  
Value  
Units  
T
Storage Temperature  
Operating Temperature  
Junction Temperature  
Lead Solder Temperature  
-40 to +125  
°C  
°C  
°C  
°C  
mA  
ns  
A
STG  
T
-40 to +100  
OPR  
T
-40 to +125  
J
T
260 for 10 sec.  
SOL  
(1)  
I
25  
250  
1.0  
5
Average Input Current  
F(AVG)  
I
LED Current Minimum Rate of Rise/Fall  
Peak Transient Input Current (<1µs pulse width, 300pps)  
Reverse Input Voltage  
F(tr, tf)  
I
F(TRAN)  
V
V
R
(2)  
I
2.5  
A
“High” Peak Output Current  
OH(PEAK)  
(2)  
I
2.5  
A
V
“Low” Peak Output Current  
OL(PEAK)  
V
– V  
EE  
Supply Voltage  
Output Voltage  
-0.5 to 25  
CC  
V
0 to V  
V
O(PEAK)  
CC  
(4)  
P
250  
295  
mW  
mW  
Output Power Dissipation  
O
(5)  
P
Total Power Dissipation  
D
Recommended Operating Conditions  
Symbol  
Parameter  
Value  
Units  
V
– V  
EE  
Power Supply  
10 to 20  
10 to 16  
V
mA  
V
CC  
I
Input Current (ON)  
Input Voltage (OFF)  
F(ON)  
V
-3.0 to 0.8  
F(OFF)  
2
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Electrical-Optical Characteristics (DC)  
Over recommended operating conditions unless otherwise specified.  
Symbol Parameter  
Test Conditions  
Min.  
0.5  
Typ.*  
Max.  
Unit  
(2)(3)  
I
V
V
V
V
= (V V – 1V)  
A
OH  
High Level Output Current  
OH  
OH  
OL  
OL  
CC  
EE  
= (V V – 3V)  
2.0  
CC  
EE  
(2)(3)  
I
= (V V – 1V)  
0.5  
A
OL  
Low Level Output Current  
CC  
EE  
= (V V – 3V)  
2.0  
CC  
EE  
(6)(7)  
V
I
I
= -100mA  
= 100mA  
V – 0.5  
CC  
V
V
OH  
High Level Output Voltage  
O
O
(6)(7)  
V
V
+ 0.5  
OL  
EE  
Low Level Output Voltage  
High Level Supply Current  
I
Output Open,  
I = 10 to 16mA  
4.8  
5.0  
6.0  
mA  
CCH  
F
I
Low Level Supply Current  
Output Open,  
V = -3.0 to 0.8V  
6.0  
8.0  
mA  
mA  
CCL  
F
I
Threshold Input Current Low to  
High  
I = 0mA, V > 5V  
O O  
FLH  
V
Threshold Input Voltage High to Low I = 0mA, V < 5V  
0.8  
1.2  
V
V
FHL  
O
O
V
Input Forward Voltage  
I = 10mA  
1.43  
-1.5  
1.8  
F
F
V / T  
Temperature Coefficient of Forward I = 10mA  
mV/°C  
F
A
F
Voltage  
V
V
UVLO Threshold  
V > 5V, I = 10mA  
8.3  
7.7  
0.6  
V
V
UVLO+  
O
F
V < 5V, I = 10mA  
UVLO–  
O
F
UVLO  
BV  
UVLO Hysteresis  
V
HYST  
Input Reverse Breakdown Voltage  
Input Capacitance  
I = 10µA  
5
V
R
R
C
f = 1MHz, V = 0V  
60  
pF  
IN  
F
*Typical values at T = 25°C  
A
3
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Switching Characteristics  
Over recommended operating conditions unless otherwise specified.  
Symbol Parameter  
Test Conditions Min. Typ.* Max. Unit  
(8)  
t
t
I = 10mA,  
50  
50  
135  
105  
200  
200  
65  
ns  
ns  
ns  
ns  
PLH  
PHL  
F
Propagation Delay Time to High Output Level  
R = 10,  
g
(8)  
Propagation DelayTime to Low Output Level  
f = 250kHz,  
Duty Cycle = 50%,  
(9)  
P
WD  
Pulse Width Distortion  
C = 10nF  
g
P
Propagation Delay Difference Between Any  
-90  
90  
DD  
(10)  
(t  
– t  
)
Two Parts  
PLH  
PHL  
t
Rise Time  
C = 10nF,  
75  
55  
ns  
ns  
r
L
R = 10Ω  
g
t
Fall Time  
f
t
UVLO Turn On Delay  
UVLO Turn Off Delay  
Output High Level Common Mode Transient  
2.0  
0.3  
µs  
UVLO ON  
t
µs  
UVLO OFF  
| CM |  
T = +25°C,  
10  
10  
kV/µs  
H
A
(11) (12)  
I = 10 to 16mA,  
Immunity  
f
V
V
= 1.5kV,  
= 20V  
CM  
CC  
| CM |  
Output Low Level Common Mode Transient  
T = +25°C,  
kV/µs  
L
A
(11) (13)  
V = 0V,  
Immunity  
f
V
V
= 1.5kV,  
= 20V  
CM  
CC  
*Typical values at T = 25°C  
A
Isolation Characteristics  
Symbol Parameter  
Test Conditions  
Min.  
Typ.*  
Max.  
Unit  
(14) (15)  
(15)  
V
T = 25°C,  
5000  
V
rms  
ISO  
Withstand Isolation Voltage  
A
R.H. < 50%, t = 1min.,  
I
20µA  
I-O  
11  
R
C
V = 500V  
I-O  
I-O  
Resistance (input to output)  
Capacitance (input to output)  
10  
Freq. = 1MHz  
1
pF  
I-O  
*Typical values at T = 25°C  
A
4
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Notes:  
1. Derate linearly above +70°C free air temperature at a rate of 0.3mA/°C.  
2. The output currents I and I are specified with a capacitive current limited load = (3 x 0.01µF) + 0.5,  
OH  
OL  
frequency = 8kHz, 50% DF.The maximum pulse width of the output current is 300ns, maximum duty cycle = 0.48%.  
Output currents specified for different values of V for V – V = 20V with the formula:  
DS  
CC  
EE  
V
= (V – V ) – (I x R  
).  
OH  
CC  
EE  
OH  
DS(ON)  
This guarantees operation at I peak minimum = 2.0A for -40°C to +100°C operating temperature range.  
O
3. The output currents I and I are specified with a capacitive current limited load = (3 x 0.01µF) + 8.5,  
OH  
OL  
frequency = 8kHz, 50% DF. The maximum pulse width of the output current is 1.5µs, maximum duty cycle = 2.4%.  
Output currents specified for different values of V for V – V = 20V with the formula:  
DS  
CC  
EE  
V
= (V – V ) – (I x R  
).  
OL  
CC  
EE  
OL  
DS(ON)  
This guarantees operation at I peak minimum = 0.5A for -40°C to +100°C operating temperature range.  
O
4. Derate linearly above +87°C, free air temperature at the rate of 0.77mW/°C. Refer to Figure 12.  
5. No derating required across operating temperature range.  
6. In this test, V is measured with a dc load current. When driving capacitive load V will approach V as I  
OH  
OH  
OH  
CC  
approaches zero amps.  
7. Maximum pulse width = 1ms, maximum duty cycle = 20%.  
8.  
t
propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the  
PHL  
falling edge of the V signal. t  
propagation delay is measured from the 50% level on the rising edge of the input  
O
PLH  
pulse to the 50% level of the rising edge of the V signal.  
O
9. PWD is defined as | t  
– t  
| for any given device.  
PHL  
PLH  
10. The difference between t  
and t  
between any two FOD3180 parts under same test conditions.  
PHL  
PLH  
11. Pin 1 and 4 need to be connected to LED common.  
12. Common mode transient immunity in the high state is the maximum tolerable dV /dt of the common mode pulse  
CM  
V
to assure that the output will remain in the high state (i.e. V > 10.0V).  
O
CM  
13. Common mode transient immunity in a low state is the maximum tolerable dV /dt of the common mode pulse,  
CM  
V
, to assure that the output will remain in a low state (i.e. V < 1.0V).  
O
CM  
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000Vrms for  
1 second (leakage detection current limit I < 5µA).  
I-O  
15. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted  
together.  
5
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Typical Performance Curves  
Fig. 2 Low To High Input Current Threshold  
vs. Ambient Temperature  
Fig. 1 Input Forward Current vs. Forward Voltage  
100  
6
5
4
3
2
1
0
V
V
= 10 to 20V  
= 0  
CC  
EE  
Output = Open  
10  
T
= 100oC  
T
= -40oC  
A
A
1
0.1  
T
= 25oC  
A
0.01  
0.001  
0.6  
0.8  
1.0  
V
1.2  
1.4  
1.6  
1.8  
2.0  
2.2  
-40  
-20  
0
20  
40  
60  
80  
100  
– Forward Voltage (V)  
T
– Ambient Temperature (°C)  
F
A
Fig. 3 Output Low Voltage vs. Ambient Temperature  
Fig. 4 High Output Voltage Drop vs. Ambient Temperature  
0.30  
0.00  
V
= 10 to 20V, V = 0  
EE  
V (OFF) = -3.0 to 0.8V  
F
CC  
I
= 100mA  
I
= 10 to 16 mA  
= -100 mA  
OUT  
F
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
-0.05  
-0.10  
-0.15  
-0.20  
-0.25  
-0.30  
V
= 10 to 20V  
I
OUT  
CC  
EE  
V
= 0  
-40  
-20  
0
20  
40  
60  
80  
100  
-40  
-20  
0
20  
40  
60  
80  
100  
o
T
– Ambient Temperature (°C)  
T
– Ambient Temperature ( C)  
A
A
Fig. 5 Supply Current vs. Ambient Temperature  
Fig. 6 Supply Current vs. Supply Voltage  
6.2  
5.8  
5.4  
5.0  
4.6  
4.2  
3.8  
6.2  
5.8  
5.4  
5.0  
4.6  
4.2  
3.8  
V
= 20V, V = 0  
EE  
I
I
= 10mA (for I  
)
CC  
F
CCH  
)
I
= 10 mA (for I  
= 0 mA (for I  
)
= 0mA (for I  
F
CCH  
)
F
CCL  
I
T
= 25oC, V = 0V  
F
CCL  
A
EE  
I
I
CCL  
I
CCL  
CCH  
I
CCH  
-40  
-20  
0
20  
40  
60  
80  
100  
10  
12  
14  
16  
18  
20  
T
– Ambient Temperature (°C)  
V
CC  
– Supply Voltage (V)  
A
6
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Fig. 8 Propagation Delay vs. Forward LED Current  
Fig. 7 Propagation Delay vs. Load Capacitance  
200  
180  
160  
140  
120  
100  
80  
200  
180  
160  
140  
120  
100  
80  
V
= 20V, V = 0  
V = 20V, V = 0  
CC EE  
CC  
EE  
I
= 10mA, T = 25oC  
R
= 10Ω, C = 10nF  
G
G
F
A
f = 250 kHz, D. Cycle = 50%  
R
= 10Ω, C = 10nF  
G
G
T
= 25oC  
f = 250 kHz, D. Cycle = 50%  
A
t
PHL  
t
PHL  
t
t
PLH  
PLH  
60  
60  
5
10  
15  
20  
25  
6
8
10  
12  
14  
16  
C
– Load Capacitance (nF)  
I
– Forward LED Current (mA)  
G
F
Fig. 10 Propagation Delay vs. Ambient Temperature  
Fig. 9 Propagation Delay vs. Series Load Resistance  
200  
180  
160  
140  
120  
100  
80  
200  
180  
160  
140  
120  
100  
80  
V
= 20V, V = 0  
V
= 20V, V = 0  
EE  
CC  
CC  
EE  
I
= 10mA, T = 25oC  
I
= 10 mA  
F
A
F
C
= 10nF  
R
= 10Ω, C = 10nF  
G
G
G
f = 250 kHz, D. Cycle = 50%  
f = 250kHz, D. Cycle = 50%  
t
PHL  
t
PHL  
t
PLH  
t
PLH  
60  
60  
10  
20  
30  
40  
50  
-40  
-20  
0
20  
40  
60  
80  
100  
R
– Series Load Resistance (Ω)  
T
– Ambient Temperature (°C)  
G
A
Fig. 11 Propagation Delay vs. Supply Voltage  
180  
160  
140  
120  
100  
80  
I
= 10mA, T = 25oC  
A
F
R
= 10Ω, C = 10nF  
G
G
f = 250 kHz, D. Cycle = 50%  
t
PHL  
t
PLH  
60  
10  
15  
20  
25  
V
– Supply Voltage (V)  
CC  
7
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Package Dimensions  
Through Hole  
0.4" Lead Spacing  
PIN 1  
ID.  
PIN 1  
ID.  
0.270 (6.86)  
0.250 (6.35)  
0.270 (6.86)  
0.250 (6.35)  
0.390 (9.91)  
0.370 (9.40)  
0.070 (1.78)  
0.045 (1.14)  
0.390 (9.91)  
0.370 (9.40)  
0.020 (0.51) MIN  
0.200 (5.08)  
0.140 (3.55)  
0.070 (1.78)  
0.045 (1.14)  
0.154 (3.90)  
0.120 (3.05)  
0.004 (0.10) MIN  
0.200 (5.08)  
0.140 (3.55)  
0.022 (0.56)  
0.016 (0.41)  
15° MAX  
0.016 (0.40)  
0.008 (0.20)  
0.154 (3.90)  
0.120 (3.05)  
0.300 (7.62)  
TYP  
0.100 (2.54) TYP  
0.022 (0.56)  
0.016 (0.41)  
0° to 15°  
0.016 (0.40)  
0.008 (0.20)  
0.400 (10.16)  
TYP  
0.100 (2.54) TYP  
Surface Mount  
8-Pin DIP – Land Pattern  
0.390 (9.91)  
0.370 (9.40)  
0.070 (1.78)  
PIN 1  
ID.  
0.060 (1.52)  
0.270 (6.86)  
0.250 (6.35)  
0.100 (2.54)  
0.295 (7.49)  
0.415 (10.54)  
0.030 (0.76)  
0.300 (7.62)  
TYP  
0.070 (1.78)  
0.045 (1.14)  
0.020 (0.51)  
MIN  
0.016 (0.41)  
0.008 (0.20)  
0.045 [1.14]  
0.022 (0.56)  
0.016 (0.41)  
0.315 (8.00)  
MIN  
0.100 (2.54)  
TYP  
0.405 (10.30)  
MIN  
Lead Coplanarity : 0.004 (0.10) MAX  
Note:  
All dimensions are in inches (millimeters)  
8
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Ordering Information  
Example: FOD3180  
X
X
Packaging Option  
S:  
Surface Mount Lead Bend  
SD: Surface Mount, Tape and Reel  
T:  
V:  
0.4" Lead Spacing  
VDE Approved  
TV: VDE Approved, 0.4" Lead Spacing  
SV: VDE Approved, Surface Mount  
SDV: VDEApproved,SurfaceMount,TapeandReel  
Marking Information  
1
2
6
3180  
V XX YY B  
5
3
4
Definitions  
1
2
Fairchild logo  
Device number  
VDE mark (Note: Only appears on parts ordered with VDE  
option – See order entry table)  
3
4
5
6
Two digit year code, e.g., ‘03’  
Two digit work week ranging from ‘01’ to ‘53’  
Assembly package code  
9
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FOD3180 Rev. 1.0.3  
Carrier Tape Specifications  
D0  
P0  
P2  
t
K0  
E
F
W
W1  
P
D1  
d
User Direction of Feed  
Symbol  
Description  
Dimension in mm  
16.0 ± 0.3  
0.30 ± 0.05  
4.0 ± 0.1  
W
t
Tape Width  
Tape Thickness  
P
Sprocket Hole Pitch  
Sprocket Hole Diameter  
Sprocket Hole Location  
Pocket Location  
0
D
1.55 ± 0.05  
1.75 ± 0.10  
7.5 ± 0.1  
0
E
F
P
4.0 ± 0.1  
2
P
Pocket Pitch  
12.0 ± 0.1  
10.30 ±0.20  
10.30 ±0.20  
4.90 ±0.20  
1.6 ± 0.1  
A
Pocket Dimensions  
0
0
0
B
K
W
Cover Tape Width  
1
d
Cover Tape Thickness  
0.1 max  
Max. Component Rotation or Tilt  
Min. Bending Radius  
10°  
R
30  
10  
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
Reflow Profile  
245C, 10–30 s  
300  
250  
200  
150  
100  
50  
260C peak  
Time above 183C, <160 sec  
Ramp up = 2–10C/sec  
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
Time (Minute)  
• Peak reflow temperature: 260C (package surface temperature)  
• Time of temperature higher than 183C for 160 seconds or less  
• One time soldering reflow is recommended  
Output Power Derating  
The maximum package power dissipation is 295mW. The pack-  
age is limited to this level to ensure that under normal operating  
conditions and over extended temperature range that the semi-  
conductor junction temperatures do not exceed 125°C. The  
package power is composed of three elements; the LED, static  
operating power of the output IC, and the power dissipated in  
the output power MOSFET transistors. The power rating of the  
output IC is 250mW. This power is divided between the static  
The output power is the product of the average output current  
squared times the output transistor’s R  
:
DS(ON)  
P
= I  
2 • R  
O(AVG) DS(ON)  
O(AVG)  
The I  
is the product of the duty factor times the peak  
O(AVG)  
current flowing in the output. The duty factor is the ratio of the  
‘on’ time of the output load current divided by the period of the  
operating frequency. An R  
of 2.0results in an average  
DS(ON)  
power of the integrated circuit, which is the product of I times  
output load current of 200mA. The load duty factor is a ratio of  
the average output time of the power MOSFET load circuit and  
period of the driving frequency.  
DD  
the power supply voltage (V  
– V ). The maximum IC static  
DD  
EE  
output power is 150mW, (V  
– V ) = 25V, I  
= 6mA. This  
DD  
DD  
EE  
maximum condition is valid over the operational temperature  
range of -40°C to +100°C. Under these maximum operating  
conditions, the output of the power MOSFET is allowed to dissi-  
pate 100mW of power.  
The maximum permissible, operating frequency is determined  
by the load supplied to the output at its resulting output pulse  
width. Figure 13 shows an example of a 0.03µF gate to source  
capacitance with a series resistance of 8.50. This reactive  
load results in a composite average pulse width of 1.5µs. Under  
this load condition it is not necessary to derate the absolute  
maximum output current until the frequency of operation  
exceeds 63kHz.  
The absolute maximum output power dissipation versus ambi-  
ent temperature is shown in Figure 12. The output driver is  
capable of supplying 100mW of output power over the tempera-  
ture range from -40°C to 87°C. The output derates to 90mW at  
the absolute maximum operating temperature of 100°C.  
Fig. 13 Output Current Derating vs. Frequency  
2.5  
Fig. 12 Absolute Maximum Power Dissipation  
vs. Ambient Temperature  
0.15  
VDD – VEE = Max. = 25V  
2
IDD = 6mA  
LED Power = 45mW  
1.5  
T
= -40°C to 100°C  
A
0.1  
0.05  
0
Load = .03µF +8.5Ω  
VDD = 20V  
I
F
= 12mA  
1
0.5  
0
LED Duty Factor = 50%  
Output Pulse Width = 1.5µs  
1
10  
F – Frequency (kHz)  
100  
-40  
-20  
0
20  
40  
60  
80  
100  
T
– Ambient Temperature (°C)  
A
11  
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
I
and I Test Conditions  
OL  
OH  
This device is tested and specified when driving a complex  
reactive load. The load consists of a capacitor in the series with  
a current limiting resistor. The capacitor represents the gate to  
source capacitance of a power MOSFET transistor. The test  
load is a 0.03uF capacitor in series with an 8.5resistor. The  
LED test frequency is 10.0kHz with a 50% duty cycle. The com-  
Figure 14 illustrates the relationship of the LED input drive  
current and the device’s output voltage and sourcing and sink-  
ing currents. The 0.03µF capacitor load represents the gate to  
source capacitance of a very large power MOSFET transistor.  
A single supply voltage of 20V is used in the evaluation.  
Figure 15 shows the test schematic to evaluate the output volt-  
bined I  
and I output load current duty factor is 0.6% at the  
OH  
OL  
age and sourcing and sinking capability of the device. The I  
OH  
test frequency.  
and I  
are measured at the peak of their respective current  
OL  
pulses.  
I
= 8mA  
F
OFF  
LED  
ON  
20V  
0
N-Channel (ON)  
P-Channel (ON)  
OUTPUT  
I
= 2.2A  
OH  
Load  
Current  
I
= 2.2A  
OL  
1µs/Div  
Figure 14. FOD 3180 Output Current and Output Voltage vs. LED Drive  
Pulse  
Generator  
FOD3180  
1
2
3
4
8
7
6
5
0.1µF  
IOMON  
VO  
0.33µF  
IFMON  
22µF  
8.5Ω  
100Ω  
100Ω  
Figure 15.Test Schematic  
12  
www.fairchildsemi.com  
FOD3180 Rev. 1.0.3  
FAIRCHILD SEMICONDUCTOR TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not  
intended to be an exhaustive list of all such trademarks.  
ACEx™  
FACT Quiet Series™  
GlobalOptoisolator™  
GTO™  
OCX™  
SILENT SWITCHER®  
SMART START™  
SPM™  
UniFET™  
VCX™  
Wire™  
ActiveArray™  
Bottomless™  
Build it Now™  
CoolFET™  
OCXPro™  
OPTOLOGIC®  
OPTOPLANAR™  
PACMAN™  
POP™  
HiSeC™  
Stealth™  
I2C™  
SuperFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
TCM™  
TinyBoost™  
TinyBuck™  
CROSSVOLTi-Lo™  
DOME™  
EcoSPARK™  
E2CMOS™  
EnSigna™  
FACT®  
ImpliedDisconnect™  
Power247™  
PowerEdge™  
PowerSaver™  
PowerTrench®  
QFET®  
IntelliMAX™  
ISOPLANAR™  
LittleFET™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
MSXPro™  
FAST®  
QS™  
FASTr™  
FPS™  
FRFET™  
QT Optoelectronics™ TinyPWM™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
µSerDes™  
TinyPower™  
TinyLogic®  
TINYOPTO™  
TruTranslation™  
UHC®  
Across the board. Around the world.™  
The Power Franchise®  
ScalarPump™  
Programmable Active Droop™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER  
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or systems which,  
(a) are intended for surgical implant into the body, or (b) support or  
sustain life, or (c) whose failure to perform when properly used in  
accordance with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the user.  
2. A critical component is any component of a life support device or  
system whose failure to perform can be reasonably expected to  
cause the failure of the life support device or system, or to affect its  
safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I22  

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