FHP3194IM14X [FAIRCHILD]
4:1 High Speed Multiplexer; 4 : 1高速多路复用器型号: | FHP3194IM14X |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 4:1 High Speed Multiplexer |
文件: | 总7页 (文件大小:129K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
March 2006
Advance Information
FHP3194
4:1 High Speed Multiplexer
Features at ±±5
Description
■ 0.1dB gain flatness to 155MHz
The FHP3194 is a 4:1 analog multiplexer designed for high
speed video applications. The output amplifier is a high-speed
current feedback amplifier that offers stellar large signal
performance of 335MHz -3dB bandwidth and 80MHz 0.1dB
bandwidth. The gain of the output amplifier is selectable thru 2
external resistors (Rf and Rg), allowing further flexibility. The
2Vpp bandwidth performance, 1600V/µs slew rate, and 0.02% /
0.03° differential gain and phase exceed the requirements of
high definition television (HDTV) and other multimedia
applications. The output amplifier also provides ample output
current to drive multiple video loads.
■ 7.5ns channel switching time
■ 0.02%/0.03° differential gain/phase error
■ 335MHz full power -3dB bandwidth at G=2
■ 1600V/µs slew rate
■ 60mA output current (easily drives three video loads)
■ 70dB channel to channel isolation
■ 13mA supply current
■ 4mA supply current in disable mode
■ 3mA supply current in shutdown mode
■ Fully specified at 5V supplies
Two address bits (A0 and A1) are used to select one of the four
buffered inputs. The FHP3194 offers excellent 7.5ns switching
times and better than 70dB channel isolation.
■ Lead (Pb) - free SOIC-14 and TSSOP-14 packages
The FHP3194 offers both shutdown and disable capability.
During shutdown, the FHP3194 consumes only 3mA of supply
current and provides maximum input to output isolation. During
disable mode, only the output amplifier is disabled reducing
output glitches and allowing for multiplexer expansion.
Applications
■ Video switchers and routers
■ Multiple Input HDTV switching
■ Picture in picture video switch
■ Multi-channel ADC Driver
Functional Block Diagram
FHP3194 SOIC / TSSOP
IN1
GND
IN2
+Vs
1
2
3
4
14
+1
+1
13 OUT
12 -VIN
11
GND
IN3
SD
10 EN
5
6
7
+1
+1
GND
IN4
9
8
A1
A0
Ordering Information
Operating Temperature
Range
Packing
Method
Part Number
Package
Pb-Free
Yes
FHP3194IM14X
FHP3194IMTC14X
SOIC-14
-40°C to +85°C
-40°C to +85°C
Reel
Reel
TSSOP-14
Yes
Moisture sensitivity level for all parts is MSL-1.
FHP3194 Rev. 1.0.6
1
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©2005 Fairchild Semiconductor Corporation
Advance Information
Pin Configurations
FHP3194 SOIC / TSSOP
IN1
GND
IN2
+Vs
1
2
3
4
14
+1
+1
13 OUT
12 -VIN
11
GND
IN3
SD
10 EN
5
6
7
+1
+1
GND
IN4
9
8
A1
A0
Pin Assignments
Pin#
1
Pin
IN1
GND
IN2
GND
IN3
-Vs
Description
Input, Channel 1
2
Must be connected to ground
Input, Channel 2
3
4
Must be connected to ground
Input, Channel 3
5
6
Negative Supply
7
IN4
A0
Input, Channel 4
8
Logic Input A0
9
A1
Logic Input A1
10
11
12
13
14
EN
Enable pin, “1” = Disable, “0” = Enable
Shutdown pin, “1” = Shutdown, “0” = Active
Inverting Input of output amplifier
Output
SD
-VIN
OUT
+Vs
Positive Supply
Truth Table
A0
1
A1
1
EN
0
SD
0
OUT
CH4
0
1
0
0
CH3
1
0
0
0
CH2
0
0
0
0
CH1
X
X
1
0
Disable
Shutdown
X
X
X
1
FHP3194 Rev. 1.0.6
2
www.fairchildsemi.com
Advance Information
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the
conditions for actual device operation
.
Symbol Parameter
Min
0
Max
12.6
Unit
Vs
CMIR
Supply Voltage
Input Voltage Range
V
V
-Vs - 0.5V
+Vs + 0.5V
Recommended Operating Conditions
Symbol
Parameter
Operating Temperature Range
Supply Voltage Range
Min
-40
5
Typ
Max
+85
12
Unit
Tc
Vs
°C
V
Reliability Information
Parameter
Min
Typ
Max
150
Unit
°C
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
14-Lead SOIC1
-65
150
°C
300
°C
128
130
°C/W
°C/W
14-Lead TSSOP1
Note:
1. Package thermal resistance (ΘJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Package
SOIC-14
TBD
TSSOP-14
TBD
Human Body Model (HBM)
Charge Device Model (CDM)
TBD
TBD
FHP3194 Rev. 1.0.6
3
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Advance Information
Electrical Characteristics at ±±5
T = 25°C, V = 5V, R = 499Ω, R = 150Ω, G = 2; unless otherwise noted.
c
s
f
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
-3dB Bandwidth
UGBW
BWss
G = +1, VOUT = 0.2Vpp
TBD
380
335
155
80
MHz
MHz
MHz
MHz
MHz
-3dB Bandwidth
No Peaking, G = +2, VOUT = 0.2Vpp
No Peaking, G = +2, VOUT = 2Vpp
G = +2, VOUT = 0.2Vpp
BWLs
Full Power Bandwidth
0.1dB Gain Flatness
0.1dB Gain Flatness
Time Domain Response
Rise and Fall Time
BW
0.1dBSS
BW
G = +2, VOUT = 2Vpp
0.1dBLS
tR, tF
tS
VOUT = 2V step; (10% to 90%)
VOUT = 2V step
1
ns
ns
Settling Time to 0.1%
Overshoot
15
OS
SR
VOUT = 0.2V step
5.7
1600
%
Slew Rate
4V step. G = -1
V/µs
Distortion / Noise Response
2nd Harmonic Distortion
3rd Harmonic Distortion
Total Harmonic Distortion
Differential Gain
HD2
HD3
THD
DG
DP
2Vpp, 5MHz
-70
-79
dBc
dBc
dB
2Vpp, 5MHz
2Vpp, 5MHz
-81
NTSC (3.58MHz)
NTSC (3.58MHz)
> 1MHz
0.02
0.03
7
%
Differenital Phase
°
en
Input Voltage Noise
Input Current Noise (+)
Input Current Noise (-)
All Hostile Crosstalk
DC Performance
nV/Hz
pA/Hz
pA/Hz
dB
in+
> 1MHz
22
in-
> 1MHz
16
XTALK
Channel-to-channel 5MHz/30MHz
-85 / -65
VIO
dVIO
VIOM
Ibn
Input Offset Voltage1
-9
1
8.5
TBD
4
+9
mV
µV/°C
mV
Average Drift
Input Offset Voltage Matching1
Input Bias Current non-inverting1
Average Drift
Channel to channel
Pins 1,3,5,7
-5
5
-16
16
µA
dIbn
Ibi
16
13
85
0.05
60
13
4
nA/°C
µA
Input Bias Current inverting1
Pin 12
-20
54
20
dIbn
GM
PSRR
IS
Average Drift
nA/°C
%
Gain Matching
Channel-to-channel
DC
Power Supply Rejection Ratio1
Supply Current1
Disable Supply Current1
Shutdown Supply Current1
Switching Characteristics
Switching Time
dB
18
6
mA
IEN
Disable Mode
mA
ISD
Shutdown Mode
3
5
mA
Channel-to-Channel
50% Logic to 10% Output Settling IN0, IN2 = +0.5V; IN1, IN3 = -0.5V
50% Logic to 10% Output Settling IN0, IN2 = +0.5V; IN1, IN3 = -0.5V
50% Logic to 10% Output Settling IN0, IN2 = +0.5V; IN1, IN3 = -0.5V
Channel Switching Transient (Glitch) All inputs grounded
7.5
9.1
25
ns
ns
ns
104
mVpp
Notes:
1. 100% tested at 25°C
FHP3194 Rev. 1.0.6
4
www.fairchildsemi.com
Advance Information
Electrical Characteristics at ±±5 continued
T = 25°C, V = 5V, R = 499Ω, R = 150Ω, G = 2; unless otherwise noted.
c
s
f
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Digital Inputs
VIH
VIL
IIH
Logic High Threshold
Logic Low Threshold
Logic Pin Input Current High
A0, A1, EN, and SD pins
A0, A1, EN, and SD pins
2.0
V
V
0.08
A0, A1, EN, and SD pins; Logic
Input = 2.0V
TBD
TBD
µA
IIL
Logic Pin Input Current Low
A0, A1, EN, and SD pins; Logic
Input = 0V
µA
Disable Characteristics
Disable Isolation
ENISO
5MHz / 30MHz
5MHz / 30MHz
5MHz
-88 / -72
-92 /-77
-70
dB
dB
dB
ns
ns
ns
ns
SDISO
Shutdown Isolation
CHISO
Channel-to-Channel Isolation
Turn on time (Disable to ON)
Turn off time (ON to Disable)
ENTON
ENTOFF
SDTON
SDTOFF
17
120
Turn on time (Shutdown to ON)
Turn off time (On to Shutdown)
Input Characteristics
20
115
RIN
Input Resistance
TBD
TBD
2.8
MΩ
pF
V
CIN
Input Capacitance
CMIR
CMRR
Input Common Mode Voltage Range
Common Mode Rejection Ratio1
Output Characteristics
DC, VCM
=
1V
50
52
dB
RL = 2kΩ
3.8
3.7
V
VO
Output Voltage Swing1
RL = 150Ω
3.2
V
IOUT
ISC
Linear Output Current
60
mA
mA
mΩ
MΩ
pF
Short Circuit Output Current
VO = GND
enabled
100
TBD
TBD
TBD
ROUT
COUT
Output Resistance
Output Capacitance
disabled
Notes:
1. 100% tested at 25°C
FHP3194 Rev. 1.0.6
±
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Advance Information
Mechanical Dimensions
14-Lead Small Outline Package (SOIC)
SOIC-14
SYMBOL
MIN
.0040
.014
.0075
.337
MAX
.0098
.018
.0098
.344
A1
B
C
D
E
e
D
7°
e
ZD
C
L
.150
.050 BSC
.157
H
h
L
.2284
.0099
.016
.060
0
.2440
.0196
.050
.068
8
C
E
H
L
A
ZD
A2
0.20 ref
.062
.054
Pin No. 1
B
DETAIL-A
L
NOTE:
1. All dimensions are in inches.
h x 45°
DETAIL-A
2. Lead coplanarity should be 0 to 0.10mm (.004") max.
3. Package surface finishing:
A1
A
A2
α
(2.1) Top: matte (charmilles #18~30).
(2.2) All sides: matte (charmilles #18~30).
(2.3) Bottom: smooth or matte (charmilles #18~30).
C
4. All dimensions excluding mold flashes and end flash
from the package body shall not exceed o.152mm (.006)
per side (d).
14-Lead Outline Package (TSSOP)
7
– B –
6
e
N
5
(b)
2X E/2
TSSOP-14
8
1.0 DIA
SYMBOL
MIN
NOM
MAX
1.10
0.15
0.95
0.75
–
E1 E
c
c1
A
–
–
A1
A2
L
R
R1
b
0.05
0.85
0.50
0.09
0.09
0.19
0.19
0.09
0.09
0°
–
0.90
0.60
–
–
–
0.22
–
–
1.0
b1
1
2 3
6
ddd C B A
SECTION AA
2X
e /2
9
N/2 TIPS
1.0
–
0.30
0.25
0.20
0.16
8°
b1
c
ccc
D
c1
01
L1
aaa
bbb
ccc
ddd
e
A2
A
8
3
7
– A –
–
aaa C
1.0 REF
0.10
0.10
0.05
0.20
0.65 BSC
12° REF
12° REF
5.00
– C –
b
NX A1
(02)
(0.20)
M
bbb C B A
R1
02
03
D
– H –
R
GAGE
PLANE
4.90
4.30
5.10
4.50
E1
E
e
4.40
6.4 BSC
0.65 BSC
14
10
(03)
A
A
0.25
01
L
N
(L1)
NOTES:
1
2
3
4
5
All dimensions are in millimeters (angle in degrees).
Dimensioning and tolerancing per ASME Y14.5–1994.
Dimensions "D" does not include mold flash, protusions or gate burrs. Mold flash protusions or gate burrs shall not exceed 0.15 per side .
Dimension "E1" does not include interlead flash or protusion. Interlead flash or protusion shall not exceed 0.25 per side.
Dimension "b" does not include dambar protusion. Allowable dambar protusion shall be 0.08mm total in excess of the "b" dimension at maximum
material condition. Dambar connot be located on the lower radius of the foot. Minimum space between protusion and adjacent lead is 0.07mm
for 0.5mm pitch packages.
6
7
8
9
Terminal numbers are shown for reference only.
Datums – A – and – B – to be determined at datum plane – H – .
Dimensions "D" and "E1" to be determined at datum plane – H – .
This dimensions applies only to variations with an even number of leads per side. For variation with an odd number of leads per side, the "center"
lead must be coincident with the package centerline, Datum A.
10 Cross sections A – A to be determined at 0.10 to 0.25mm from the leadtip.
FHP3194 Rev. 1.0.6
6
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FASTr™
FPS™
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GlobalOptoisolator™
GTO™
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QFET
QS™
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QT Optoelectronics™
Quiet Series™
RapidConfigure™
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µSerDes™
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SILENT SWITCHER
SMART START™
SPM™
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FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
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CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I18
FHP3194 Rev. 1.0.6
7
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