FDS8936AL86Z [FAIRCHILD]
Power Field-Effect Transistor, 6A I(D), 30V, 0.028ohm, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOIC-8;型号: | FDS8936AL86Z |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Power Field-Effect Transistor, 6A I(D), 30V, 0.028ohm, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOIC-8 |
文件: | 总8页 (文件大小:458K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
May 1998
FDS8936A
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
SO-8 N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance
and provide superior switching performance. These devices
are particularly suited for low voltage applications such as
notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
6 A, 30 V. RDS(ON) = 0.028 W @ VGS = 10 V,
RDS(ON) = 0.040 W @ VGS = 4.5 V.
High density cell design for extremely low RDS(ON)
.
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
SuperSOTTM-6
SuperSOTTM-8
SOIC-16
SOT-23
SO-8
SOT-223
5
6
7
8
4
D2
D2
D1
3
2
D1
G2
S2
G1
pin 1
SO-8
1
S1
Absolute Maximum Ratings TA = 25oC unless otherwise noted
Symbol Parameter
FDS8936A
Units
Drain-Source Voltage
Gate-Source Voltage
30
V
VDSS
VGSS
ID
±20
V
A
Drain Current - Continuous
- Pulsed
(Note 1a)
(Note 1a)
6
20
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
2
W
1.6
(Note 1b)
(Note 1c)
1
0.9
Operating and Storage Temperature Range
-55 to 150
°C
TJ,TSTG
THERMAL CHARACTERISTICS
RqJA
RqJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
78
40
°C/W
°C/W
(Note 1)
FDS8936A Rev.B
© 1998 Fairchild Semiconductor Corporation
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, I D = 250 µA
30
V
ID = 250 µA, Referenced to 25oC
mV/ oC
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
32
DBVDSS/DTJ
1
µA
µA
nA
nA
IDSS
VDS = 24 V, VGS = 0 V
10
TJ = 55°C
IGSSF
IGSSR
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
100
-100
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25oC
1
1.7
-4
3
V
mV/oC
Gate Threshold Voltage Temp. Coefficient
DVGS(th)/DTJ
RDS(ON)
Static Drain-Source On-Resistance
0.023 0.028
0.036 0.048
0.034 0.040
VGS = 10 V, I D = 6 A
W
TJ =125°C
VGS = 4.5 V, I D = 4.8 A
VGS = 10 V, VDS = 5 V
ID(ON)
gFS
On-State Drain Current
20
A
S
Forward Transconductance
19
VDS = 5 V, I D = 6 A
DYNAMIC CH ARACTERISTICS
Ciss
Coss
Crss
Input Capacitance
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
650
345
95
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
Turn - On Delay Time
Turn - On Rise Time
8
16
25
ns
tD(on)
tr
tD(off)
tf
V
DS = 10 V, I D = 1 A
14
VGS = 10 V , RGEN = 6 W
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
23
9
37
18
27
19
3.2
4.3
nC
Qg
Qgs
Qgd
VDS = 10 V, I D = 6 A,
VGS = 10 V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
1.3
1.2
A
V
0.7
VSD
VGS = 0 V, I S = 1.3 A (Note 2)
Notes:
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by
design while RqCA is determined by the user's board design.
a. 78OC/W on a 0.5 in2
pad of 2oz copper.
c. 135OC/W on a 0.003 in2
pad of 2oz copper.
b. 125OC/W on a 0.02 in2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDS8936A Rev.B
Typical Electrical Characteristics
4
3
2
1
0
30
V
=10V
GS
6.0V
5.0V
4.5V
24
18
12
6
VGS= 3.5V
4.0V
4.0 V
4.5 V
3.5V
5.5 V
7.0V
10V
3.0V
0
0
1
2
3
4
0
6
12
18
24
30
V
, DRAIN-SOURCE VOLTAGE (V)
DS
I
, DRAIN CURRENT (A)
D
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
1.6
1.4
1.2
1
0.1
I
= 6A
I D= 3A
D
V
= 10V
GS
0.08
0.06
0.04
0.02
0
125°C
25°C
0.8
0.6
2
4
6
8
10
-50
-25
0
25
50
75
100
125
150
V
, GATE TO SOURCE VOLTAGE (V)
T
, JUNCTION TEMPERATURE (°C)
GS
J
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
Figure 3. On-Resistance Variation With
Temperature.
20
30
25
20
15
10
5
V
= 10V
DS
VGS= 0V
T = 125°C
J
1
0.1
25°C
-55°C
0.01
T
= 125°C
J
25°C
-55°C
0.001
0.0001
0
1
2
3
4
5
0
0.2
V
0.4
0.6
0.8
1
1.2
V
, GATE TO SOURCE VOLTAGE (V)
GS
, BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDS8936A Rev.B
Typical Electrical Characteristics (continued)
2000
10
VDS = 5V
ID = 6A
1200
800
8
6
4
2
0
10V
C
iss
20V
C
oss
400
200
100
50
f = 1 MHz
VGS = 0 V
C
rss
0.1
0.2
V
0.5
1
2
5
10
30
0
5
10
15
20
, DRAIN TO SOURCE VOLTAGE (V)
DS
Q
, GATE CHARGE (nC)
g
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
30
25
20
15
10
5
50
30
SINGLE PULSE
JA
10
5
Rq
=135° C/W
TA = 25°C
2
1
0.5
VGS =10V
0.1
SINGLE PULSE
RqJA= 135 °C/W
0.05
T
= 25°C
A
0
0.01
0.1
0.5
1
10
50 100
300
0.01
0.1
0.2
0.5
1
2
5
10
30 50
SINGLE PULSE TIME (SEC)
V
, DRAIN-SOURCE VOLTAGE (V)
DS
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
1
D = 0.5
0.2
0.5
R
(t) = r(t) * R
JA
q
JA
JA
q
0.2
0.1
R
=135 °C/W
q
0.1
0.05
0.05
P(pk)
0.02
0.01
0.02
0.01
t
1
t
2
- T = P * R
J
Single Pulse
T
(t)
JA
0.005
A
q
Duty Cycle, D = t /t
1
2
0.002
0.001
0.0001
0.001
0.01
0.1
, TIME (sec)
1
10
100
300
t
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
thermal response will change depending on the circuit board design.
Transient
FDS8936A Rev.B
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging
Configuration: Figure 1.0
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
made from
a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
Antistatic Cover Tape
These full reels are individually barcode labeled and
placed inside
a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside
comes in different sizes depending on the number of parts
shipped.
a barcode labeled shipping box which
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
F
NDS
9959
852
Customized
Label
F
F
F
F
Pin 1
SOIC (8lds) Packaging Information
Standard
L86Z
F011
D84Z
Packaging Option
(no flow code)
SOIC-8 Unit Orientation
Packaging type
TNR
2,500
Rail/Tube
TNR
4,000
TNR
500
Qty per Reel/Tube/Bag
Reel Size
95
-
13" Dia
13" Dia
7" Dia
Box Dimension (mm)
Max qty per Box
355x333x40 530x130x83 355x333x40 193x183x80
5,000
0.0774
0.6060
30,000
0.0774
-
8,000
0.0774
0.9696
2,000
0.0774
0.1182
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
F63TNR Label sample
LOT: CBVK741B019
QTY: 2500
SPEC:
FSID: FDS9953A
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
D/C1: Z9842AB QTY1:
SPEC REV:
CPN:
D/C2:
QTY2:
N/F: F
(F63TNR)3
Carrier Tape
Cover Tape
Components
Trailer Tape
Leader Tape
640mm minimum or
80 empty pockets
1680mm minimum or
210 empty pockets
January 2001, Rev. C
©2001 Fairchild Semiconductor Corporation
SOIC-8 Tape and Reel Data, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
E2
F
W
K0
Wc
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
Pkg type
0.450
+/-
0.150
(8lds)
SOIC
(12mm)
5.30
+/-0.10
6.50
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
2.1
+/-0.10
9.2
+/-0.3
0.06
+/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
0.5mm
maximum
B0
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
Sketch B (Top View)
Component Rotation
SOIC(8lds) Reel Configuration: Figure 4.0
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7"Diameter Option
B Min
Dim C
See detail AA
Dim D
min
W3
13" Diameter Option
W2 max Measured at Hub
DETAIL AA
Dim W2
Dimensions are in inches and millimeters
Reel
Option
Tape Size
12mm
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W3 (LSL-USL)
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
7" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
13" Dia
January 2001, Rev. C
SOIC-8 Package Dimensions
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
©2000 Fairchild Semiconductor International
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
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Rev. H1
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