FDS6894 [FAIRCHILD]

Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET; 双N沟道逻辑电平PWM优化的PowerTrench MOSFET
FDS6894
型号: FDS6894
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
双N沟道逻辑电平PWM优化的PowerTrench MOSFET

文件: 总5页 (文件大小:83K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
October 2001  
FDS6894A  
Dual N-Channel Logic Level PWM Optimized PowerTrenchÒ MOSFET  
General Description  
Features  
These N-Channel Logic Level MOSFETs are produced  
·
8 A, 20 V.  
RDS(ON) = 17 mW @ VGS = 4.5 V  
RDS(ON) = 20 mW @ VGS = 2.5 V  
RDS(ON) = 30 mW @ VGS = 1.8 V  
using  
Fairchild  
Semiconductor’s  
advanced  
PowerTrench process that has been especially tailored  
to minimize the on-state resistance and yet maintain  
superior switching performance.  
·
·
Low gate charge (17 nC)  
These devices are well suited for low voltage and  
battery powered applications where low in-line power  
loss and fast switching are required.  
High performance trench technology for extremely  
low RDS(ON)  
·
High power and current handling capability  
D1  
5
6
7
8
4
3
2
1
D1  
D2  
Q1  
Q2  
D2  
G1  
SO-8  
S1  
G2  
S2  
Pin 1  
Absolute Maximum Ratings TA=25oC unless otherwise noted  
Symbol  
VDSS  
Parameter  
Drain-Source Voltage  
Ratings  
Units  
20  
V
V
A
VGSS  
Gate-Source Voltage  
± 8  
ID  
Drain Current – Continuous  
– Pulsed  
(Note 1a)  
8
32  
PD  
W
Power Dissipation for Dual Operation  
Power Dissipation for Single Operation  
2
(Note 1a)  
(Note 1b)  
1.6  
1
0.9  
(Note 1c)  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
–55 to +150  
°C  
Thermal Characteristics  
RqJA  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1)  
78  
40  
°C/W  
°C/W  
RqJC  
Thermal Resistance, Junction-to-Case  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
FDS6894A  
FDS6894A  
13’’  
12mm  
2500 units  
FDS6894A Rev C (W)  
Ó2001 Fairchild Semiconductor Corporation  
Electrical Characteristics  
TA = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BVDSS  
Drain–Source Breakdown Voltage  
VGS = 0 V,  
ID = 250 mA  
20  
V
Breakdown Voltage Temperature  
Coefficient  
13  
DBVDSS  
DTJ  
ID = 250 mA, Referenced to 25°C  
mV/°C  
IDSS  
Zero Gate Voltage Drain Current  
VDS = 16 V, VGS = 0 V  
1
mA  
10  
VDS = 16 V, VGS = 0 V, TJ = 55°C  
nA  
nA  
IGSSF  
IGSSR  
Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
VGS = 8 V,  
VDS = 0 V  
100  
VGS = – 8 V, VDS = 0 V  
–100  
On Characteristics  
(Note 2)  
VGS(th)  
Gate Threshold Voltage  
VDS = VGS  
,
ID = 250 mA  
0.6  
0.8  
–3  
1.5  
V
Gate Threshold Voltage  
Temperature Coefficient  
DVGS(th)  
DTJ  
ID = 250 mA, Referenced to 25°C  
mV/°C  
RDS(on)  
Static Drain–Source  
On–Resistance  
VGS = 4.5 V, ID = 8 A  
VGS = 2.5 V, ID = 7 A  
VGS = 1.8 V, ID = 6 A  
VGS = 4.5 V, ID = 8 A,TJ = 125°C  
13  
16  
21  
18  
17  
20  
30  
25  
mW  
ID(on)  
gFS  
On–State Drain Current  
VGS = 4.5V, VDS = 5 V  
16  
A
S
Forward Transconductance  
VDS = 5 V,  
ID = 8 A  
44  
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Input Capacitance  
1676  
288  
pF  
pF  
pF  
VDS = 10 V, V GS = 0 V,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
146  
Switching Characteristics (Note 2)  
td(on)  
tr  
td(off)  
tf  
Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
10  
14  
33  
12  
17  
2.8  
3.3  
20  
25  
53  
22  
24  
ns  
ns  
VDD = 10 V, ID = 1 A,  
VGS = 4.5 V, RGEN = 6 W  
ns  
ns  
Qg  
Qgs  
Qgd  
nC  
nC  
nC  
VDS = 10 V, ID = 8 A,  
VGS = 4.5 V  
Drain–Source Diode Characteristics and Maximum Ratings  
IS  
Maximum Continuous Drain–Source Diode Forward Current  
1.3  
1.2  
A
V
VSD  
Drain–Source Diode Forward  
Voltage  
VGS = 0 V, IS = 1.3 A  
(Note 2)  
0.7  
Notes:  
1. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins. RqJC is guaranteed by design while RqCA is determined by the user's board design.  
a) 78°C/W when  
mounted on a 0.5in2  
pad of 2 oz copper  
b) 125°C/W when  
mounted on a 0.02  
in2 pad of 2 oz  
copper  
c) 135°C/W when mounted on a  
minimum mounting pad.  
Scale 1 : 1 on letter size paper  
2. Pulse Test: Pulse Width < 300ms, Duty Cycle < 2.0%  
FDS6894A Rev C (W)  
Typical Characteristics  
50  
2
1.8  
1.6  
1.4  
1.2  
1
VGS = 4.5V  
2.5V  
3.0V  
40  
2.0V  
VGS = 1.8V  
30  
20  
10  
0
1.8V  
2.0V  
2.5V  
3.0V  
30  
3.5V  
4.5V  
0.8  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
0
10  
20  
40  
50  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
ID, DIRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.6  
1.4  
1.2  
1
0.045  
ID = 8A  
VGS = 4.5V  
ID = 4A  
0.04  
0.035  
0.03  
TA = 125oC  
0.025  
0.02  
TA = 25oC  
0.8  
0.6  
0.015  
0.01  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
1
2
3
4
5
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
30  
10  
VGS = 0V  
TA = -55oC  
25oC  
125oC  
VDS = 5V  
25  
20  
15  
10  
5
1
TA = 125oC  
0.1  
25oC  
0.01  
-55oC  
0.001  
0
0.0001  
0.5  
0.8  
1.1  
1.4  
1.7  
2
0
0.2  
0.4  
0.6  
0.8  
1
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDS6894A Rev C (W)  
Typical Characteristics  
5
2500  
2000  
1500  
1000  
500  
ID = 8A  
f = 1 MHz  
VGS = 0 V  
VDS = 5V  
10V  
4
3
2
1
0
15V  
CISS  
COSS  
CRSS  
0
0
5
10  
15  
20  
0
5
10  
15  
20  
Qg, GATE CHARGE (nC)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
50  
40  
30  
20  
10  
0
SINGLE PULSE  
100ms  
RqJA = 135°C/W  
1ms  
10ms  
TA = 25°C  
RDS(ON) LIMIT  
100ms  
1s  
10s  
DC  
1
VGS = 4.5V  
SINGLE PULSE  
0.1  
0.01  
R
qJA = 135oC/W  
TA = 25oC  
0.01  
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
t1, TIME (sec)  
VDS, DRAIN-SOURCE VOLTAGE (V)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
R
qJA(t) = r(t) * RqJA  
R
qJA = 135oC/W  
0.2  
0.1  
0.1  
0.05  
P(pk)  
0.02  
0.01  
t1  
t2  
0.01  
TJ - TA = P * RqJA(t)  
Duty Cycle, D = t1 / t2  
SINGLE PULSE  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t1, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1c.  
Transient thermal response will change depending on the circuit board design.  
FDS6894A Rev C (W)  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
â
SMART START™  
STAR*POWER™  
Stealth™  
VCX™  
FAST  
ACEx™  
Bottomless™  
CoolFET™  
OPTOLOGIC™  
OPTOPLANAR™  
PACMAN™  
FASTr™  
FRFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
CROSSVOLT™  
DenseTrench™  
DOME™  
POP™  
Power247™  
PowerTrenchâ  
QFET™  
EcoSPARK™  
E2CMOSTM  
TinyLogic™  
QS™  
EnSignaTM  
TruTranslation™  
UHC™  
QT Optoelectronics™  
Quiet Series™  
SILENTSWITCHERâ  
FACT™  
FACT Quiet Series™  
UltraFETâ  
STAR*POWER is used under license  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H4  

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