FDPF5N50 [FAIRCHILD]

N-Channel MOSFET 500V, 5A, 1.4ヘ; N沟道MOSFET 500V ,5A, 1.4ヘ
FDPF5N50
型号: FDPF5N50
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

N-Channel MOSFET 500V, 5A, 1.4ヘ
N沟道MOSFET 500V ,5A, 1.4ヘ

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
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中文:  中文翻译
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December 2007  
UniFETTM  
FDP5N50 / FDPF5N50  
tm  
N-Channel MOSFET  
500V, 5A, 1.4Ω  
Features  
Description  
RDS(on) = 1.15Ω ( Typ.)@ VGS = 10V, ID = 2.5A  
Low gate charge ( Typ. 11nC)  
Low Crss ( Typ. 5pF)  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary, planar  
stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand high energy pluse in the avalanche  
and commutation mode. These devices are well suited for high  
efficient switched mode power suppliesand active power  
factor correction.  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
RoHS compliant  
D
G
TO-220F  
FDPF Series  
TO-220  
FDP Series  
G D S  
G D S  
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted*  
Symbol  
VDSS  
VGSS  
Parameter  
FDP5N50  
FDPF5N50  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
500  
±30  
V
V
-Continuous (TC = 25oC)  
-Continuous (TC = 100oC)  
- Pulsed  
5
3
5*  
3*  
ID  
Drain Current  
A
IDM  
Drain Current  
(Note 1)  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
20  
20*  
A
mJ  
A
EAS  
IAR  
Single Pulsed Avalanche Energy  
Avalanche Current  
225  
5
EAR  
dv/dt  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
8.5  
4.5  
mJ  
V/ns  
W
W/oC  
oC  
(TC = 25oC)  
- Derate above 25oC  
85  
28  
PD  
Power Dissipation  
0.67  
0.22  
TJ, TSTG  
TL  
Operating and Storage Temperature Range  
-55 to +150  
Maximum Lead Temperature for Soldering Purpose,  
1/8” from Case for 5 Seconds  
300  
oC  
*Drain current limited by maximum junction temperature  
Thermal Characteristics  
Symbol  
Parameter  
FDP5N50  
FDPF5N50  
Units  
RθJC  
RθCS  
RθJA  
Thermal Resistance, Junction to Case  
1.4  
0.5  
4.5  
-
Thermal Resistance, Case to Sink Typ.  
Thermal Resistance, Junction to Ambient  
oC/W  
62.5  
62.5  
©2007 Fairchild Semiconductor Corporation  
FDP5N50 / FDPF5N50 Rev. A  
1
www.fairchildsemi.com  
Package Marking and Ordering Information TC = 25oC unless otherwise noted  
Device Marking  
FDP5N50  
Device  
FDP5N50  
FDPF5N50  
Package  
TO-220  
Reel Size  
Tape Width  
Quantity  
-
-
-
-
50  
50  
FDPF5N50  
TO-220F  
Electrical Characteristics  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = 250μA, VGS = 0V, TJ = 25oC  
500  
-
-
-
-
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
I
D = 250μA, Referenced to 25oC  
0.6  
V/oC  
V
DS = 500V, VGS = 0V  
-
-
-
-
-
-
1
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
Gate to Body Leakage Current  
μA  
VDS = 400V, TC = 125oC  
10  
VGS = ±30V, VDS = 0V  
±100  
nA  
On Characteristics  
VGS(th)  
RDS(on)  
gFS  
Gate Threshold Voltage  
VGS = VDS, ID = 250μA  
VGS = 10V, ID = 2.5A  
VDS = 20V, ID = 2.5A  
3.0  
-
-
5.0  
1.4  
-
V
Ω
S
Static Drain to Source On Resistance  
Forward Transconductance  
1.15  
4.3  
(Note 4)  
-
Dynamic Characteristics  
Ciss  
Input Capacitance  
-
-
-
-
-
480  
66  
5
640  
88  
8
pF  
pF  
pF  
nC  
nC  
VDS = 25V, VGS = 0V  
f = 1MHz  
Coss  
Crss  
Qg(tot)  
Qgs  
Output Capacitance  
Reverse Transfer Capacitance  
Total Gate Charge at 10V  
Gate to Source Gate Charge  
11  
3
15  
-
V
V
DS = 400V, ID = 5A  
GS = 10V  
Qgd  
Gate to Drain “Miller” Charge  
-
5
-
nC  
(Note 4, 5)  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
-
-
-
-
13  
22  
28  
20  
36  
54  
66  
50  
ns  
ns  
ns  
ns  
VDD = 250V, ID = 5A  
G = 25Ω  
R
(Note 4, 5)  
Drain-Source Diode Characteristics  
IS  
Maximum Continuous Drain to Source Diode Forward Current  
Maximum Pulsed Drain to Source Diode Forward Current  
-
-
-
-
-
-
-
5
20  
1.4  
-
A
A
ISM  
VSD  
trr  
Drain to Source Diode Forward Voltage  
Reverse Recovery Time  
VGS = 0V, ISD = 5A  
-
V
300  
1.8  
ns  
μC  
VGS = 0V, ISD = 5A  
dIF/dt = 100A/μs  
(Note 4)  
Qrr  
Reverse Recovery Charge  
-
Notes:  
1: Repetitive Rating: Pulse width limited by maximum junction temperature  
2: L = 18mH, I = 5A, V = 50V, R = 25Ω, Starting T = 25°C  
AS  
DD  
G
J
3:  
I
5A, di/dt 200A/μs, V BV , Starting T = 25°C  
SD  
DD  
DSS J  
4: Pulse Test: Pulse width 300μs, Duty Cycle 2%  
5: Essentially Independent of Operating Temperature Typical Characteristics  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
2
Typical Performance Characteristics  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
20  
20  
VGS = 15.0V  
10.0V  
10  
10  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
5.5 V  
150oC  
25oC  
1
1
-55oC  
*Notes:  
1. 250μs Pulse Test  
2. TC = 25oC  
*Notes:  
1. VDS = 20V  
0.1  
2. 250μs Pulse Test  
0.04  
0.1  
0.1  
1
10  
30  
4
5
6
7
8
VDS,Drain-Source Voltage[V]  
VGS,Gate-Source Voltage[V]  
Figure 3. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperature  
3.0  
70  
2.5  
150oC  
10  
VGS = 10V  
2.0  
25oC  
VGS = 20V  
1.5  
*Notes:  
1. VGS = 0V  
*Note: TJ = 25oC  
2. 250μs Pulse Test  
1
0.4  
1.0  
0.8  
1.2  
1.6  
0
3
6
9
12  
VSD, Body Diode Forward Voltage [V]  
ID, Drain Current [A]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
1000  
10  
C
C
C
= C + C (C = shorted)  
gs gd ds  
iss  
VDS = 100V  
VDS = 250V  
VDS = 400V  
8
= C + C  
ds gd  
oss  
rss  
= C  
gd  
750  
500  
250  
0
*Note:  
1. VGS = 0V  
2. f = 1MHz  
6
4
2
Ciss  
Coss  
Crss  
*Note: ID = 5A  
0
0.1  
1
10  
30  
0
4
8
12  
VDS, Drain-Source Voltage [V]  
Qg, Total Gate Charge [nC]  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
3
Typical Performance Characteristics (Continued)  
Figure 7. Breakdown Voltage Variation  
Figure 8. On-Resistance Variation  
vs. Temperature  
vs. Temperature  
3.0  
1.2  
2.5  
2.0  
1.5  
1.1  
1.0  
0.9  
1.0  
*Notes:  
*Notes:  
1. VGS = 10V  
1. VGS = 0V  
0.5  
-75  
2. ID = 2.5A  
2. ID = 250μA  
0.8  
-75  
-25  
25  
75  
125 175  
-25  
25  
75  
125  
175  
TJ, Junction Temperature [oC]  
TJ, Junction Temperature [oC]  
Figure 9. Maximum Safe Operating Area  
- FDP5N50  
Figure 10. Maximum Safe Operating Area  
- FDPF5N50  
30  
30  
30μs  
30μs  
100μs  
1ms  
10  
10  
100μs  
1ms  
10ms  
10ms  
DC  
1
1
DC  
Operation in This Area  
is Limited by R DS(on)  
Operation in This Area  
is Limited by R DS(on)  
0.1  
0.01  
0.1  
0.01  
*Notes:  
1. TC = 25oC  
2. TJ = 150oC  
*Notes:  
1. TC = 25oC  
2. TJ = 150oC  
3. Single Pulse  
3. Single Pulse  
100  
1
10  
100  
800  
1
10  
800  
VDS, Drain-Source Voltage [V]  
VDS, Drain-Source Voltage [V]  
Figure 11. Maximum Drain Current  
vs. Case Temperature  
6
5
4
3
2
1
0
25  
50  
75  
100  
125  
150  
TC, Case Temperature [oC]  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
4
Typical Performance Characteristics (Continued)  
Figure 12. Transient Thermal Response Curve - FDP5N50  
3
1
0.5  
0.2  
PDM  
0.1  
1
t
t2  
0.1  
0.05  
*Notes:  
1. ZθJC(t) = 1.4oC/W Max.  
2. Duty Factor, D= t1/t2  
3. TJM - TC = PDM * ZθJC(t)  
0.02  
0.01  
Single pulse  
0.01  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
101  
102  
Rectangular Pulse Duration [sec]  
Figure 13. Transient Thermal Response Curve - FDPF5N50  
10  
1
0.5  
0.2  
0.1  
PDM  
0.05  
t1  
t2  
0.02  
0.1  
0.01  
*Notes:  
0.01  
1. ZθJC(t) = 4.5oC/W Max.  
2. Duty Factor, D= t1/t2  
Single pulse  
3. TJM - TC = PDM * ZθJC(t)  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
101  
102  
103  
Rectangular Pulse Duration [sec]  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
5
Gate Charge Test Circuit & Waveform  
Resistive Switching Test Circuit & Waveforms  
Unclamped Inductive Switching Test Circuit & Waveforms  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
6
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
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www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
7
Mechanical Dimensions  
TO-220  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
8
Mechanical Dimensions  
TO-220F  
2.54 ±0.20  
10.16 ±0.20  
ø3.18 ±0.10  
(7.00)  
(0.70)  
(1.00x45°)  
MAX1.47  
0.80 ±0.10  
(30  
°
)
#1  
0.35 ±0.10  
+0.10  
–0.05  
0.50  
2.76 ±0.20  
2.54TYP  
2.54TYP  
[2.54 ±0.20  
]
[2.54 ±0.20]  
9.40 ±0.20  
Dimensions in Millimeters  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
9
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®
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PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
This datasheet contains the design specifications for product development.  
Specifications may change in any manner without notice.  
Advance Information  
Formative or In Design  
This datasheet contains preliminary data; supplementary data will be pub-  
lished at a later date. Fairchild Semiconductor reserves the right to make  
changes at any time without notice to improve design.  
Preliminary  
First Production  
Full Production  
Not In Production  
This datasheet contains final specifications. Fairchild Semiconductor reserves  
the right to make changes at any time without notice to improve design.  
No Identification Needed  
Obsolete  
This datasheet contains specifications on a product that has been discontin-  
ued by Fairchild semiconductor. The datasheet is printed for reference infor-  
mation only.  
Rev. I32  
www.fairchildsemi.com  
FDP5N50 / FDPF5N50 Rev. A  
10  

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