FDN306PD87Z [FAIRCHILD]
Small Signal Field-Effect Transistor, 2.6A I(D), 12V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-3;
| 型号： | FDN306PD87Z |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Small Signal Field-Effect Transistor, 2.6A I(D), 12V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SUPERSOT-3 开关 光电二极管 晶体管 |
| 文件： | 总8页 (文件大小：256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 2001
PRELIMINARY
FDN306P
P-Channel 1.8V Specified PowerTrench MOSFET
General Description
Features
This P-Channel 1.8V specified MOSFET uses
Fairchild’s advanced low voltage PowerTrench process.
It has been optimized for battery power management
applications.
• –2.6 A, –12 V. RDS(ON) = 40 mΩ @ VGS = –4.5 V
RDS(ON) = 60 mΩ @ VGS = –2.5 V
DS(ON) = 95 mΩ @ VGS = –1.8 V
R
• Fast switching speed
Applications
• High performance trench technology for extremely
• Battery management
• Load switch
low RDS(ON)
• SuperSOTTM -3 provides low RDS(ON) and 30% higher
power handling capability than SOT23 in the same
footprint
• Battery protection
D
D
S
S
G
SuperSOTTM-3
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
Parameter
Drain-Source Voltage
Ratings
Units
V
–12
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
V
A
±8
(Note 1a)
–2.6
–10
0.5
PD
Maximum Power Dissipation
(Note 1a)
(Note 1b)
W
0.46
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
250
75
RθJA
°C/W
°C/W
RθJC
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
306
FDN306P
7’’
8mm
3000 units
FDN306P Rev C(W)
2001 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
–12
V
V
GS = 0 V,
ID = –250 µA
Breakdown Voltage Temperature
Coefficient
–3
∆BVDSS
∆TJ
ID = –250 µA,Referenced to 25°C
mV/°C
IDSS
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VDS = –10 V,
VGS = 8 V,
VGS = 0 V
VDS = 0 V
VDS = 0 V
–1
µA
nA
nA
IGSSF
IGSSR
100
VGS = –8 V,
–100
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
–0.4
–10
–0.6
2.5
–1.5
V
V
DS = VGS
,
ID = –250 µA
Gate Threshold Voltage
Temperature Coefficient
∆VGS(th)
∆TJ
ID = –250 µA,Referenced to 25°C
mV/°C
RDS(on)
Static Drain–Source
On–Resistance
VGS = –4.5 V, ID = –2.6 A
V
VGS = –1.8V, ID = –1.8 A
VGS = –4.5 V, ID = –2.6A , TJ=125°C
30
39
54
40
40
50
72
54
mΩ
GS = –2.5 V, ID = –2.3 A
ID(on)
gFS
On–State Drain Current
VGS = –4.5 V, VDS = –5 V
A
S
Forward Transconductance
VDS = –5 V,
ID = –2.6 A
10
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
1138
454
pF
pF
pF
VDS = –6 V,
f = 1.0 MHz
V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
302
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
11
10
38
35
12
2
20
20
61
56
17
ns
ns
VDD = –6 V,
VGS = –4.5 V,
ID = –1 A,
RGEN = 6 Ω
ns
ns
Qg
Qgs
Qgd
nC
nC
nC
VDS = –6 V,
ID = –2.6 A,
V
GS = –4.5 V
3
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
–0.42
–1.2
A
V
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = –0.42 (Note 2)
–0.6
Notes:
1.
RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
b) 270°C/W when mounted on a
minimum pad.
a) 250°C/W when mounted on a
0.02 in pad of 2 oz. copper.
2
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
FDN306P Rev C(W)
Typical Characteristics
20
2.2
2
VGS = -4.5V
-2.5V
-3.0V
-2.0V
VGS = -1.8V
15
10
5
1.8
1.6
1.4
1.2
1
-2.0V
-1.8V
-2.5V
-3.0V
-1.5V
-3.5V
-4.5V
0
0.8
0
1
2
3
4
0
5
10
-ID, DIRAIN CURRENT (A)
15
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.4
1.3
1.2
1.1
1
0.12
ID = -1.3A
ID = -2.6A
VGS = -4.5V
0.1
0.08
0.06
0.04
0.02
TA = 125oC
0.9
0.8
TA = 25oC
1
2
3
4
5
-50
-25
0
25
50
75
100
125
150
-VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
20
TA = -55oC
VGS = 0V
25oC
-125oC
VDS = -5V
1
0.1
TA = 125oC
15
10
5
25oC
-55oC
0.01
0.001
0.0001
0
0
0.2
0.4
0.6
0.8
1
1.2
0.5
1
1.5
2
2.5
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDN306P Rev C(W)
Typical Characteristics
5
2000
1600
1200
800
400
0
VDS = -4V
ID = -2.6A
f = 1 MHz
GS = 0 V
-6V
V
4
3
2
1
0
-8V
CISS
COSS
CRSS
0
3
6
9
12
15
0
3
6
9
12
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
30
25
20
15
10
5
100
10
SINGLE PULSE
R
θJA = 270°C/W
TA = 25°C
RDS(ON) LIMIT
100µs
1ms
10ms
100ms
1s
1
DC
VGS = -4.5V
SINGLE PULSE
0.1
0.01
R
θJA = 270oC/W
T
A = 25oC
0
0.1
1
10
100
0.001
0.01
0.1
1
10
100
-VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
θJA(t) = r(t) * RθJA
θJA = 270oC/W
0.2
R
0.1
0.1
0.05
P(pk)
0.02
t1
0.01
t2
J - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.01
SINGLE PULSE
T
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDN306P Rev C(W)
SuperSOTTM-3 Tape and Reel Data
SSOT-3 Packaging
Configuration: Figure 1.0
Packaging Description:
Customize Label
SSOT-3 parts are shipped in tape. The carrier tape is
made from
a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7” or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 10,000 units per 13”
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
Antistatic Cover Tape
These full reels are individually labeled and placed inside
a
standard intermediate made of recyclable corrugated
brown paper with a Fairchild logo printing. One pizza box
contains five reels maximum. And these intermediate
boxes are placed inside
a labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
F63TNR Label
Embossed
Carrier Tape
3P
3P
3P
3P
SSOT-3 Std Packaging Information
Standard
(no flow code)
Packaging Option
D87Z
Packaging type
TNR
TNR
10,000
13”
SSOT-3 Std Unit Orientation
Qtyper Reel/Tube/Bag
ReelSize
3,000
7” Dia
Barcode Label
Box Dimension(mm)
Maxqty per Box
193x183x80 355x333x40
15,000
0.0097
0.1230
30,000
0.0097
0.4150
Weight perunit (gm)
Weight per Reel (kg)
Note/Comments
Barcode
Label
355mm x 333mm x 40mm
Intermediate container for 13” reel option
Barcode Label sample
Barcode
Label
LOT: CBVK741B019
FSID: MMSZ5221B
QTY: 3000
SPEC:
D/C1: D9842AB QTY1:
SPEC REV:
CPN:
D/C2:
QTY2:
FAIRCHILD SEMICONDUCTOR CORPORATION
(F63T
193mm x 183mm x 80mm
Pizza Box for Standard Option
SSOT-3 Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Tr ailer Ta pe
Leader Tape
300mm minimum or
75 empty pockets
500mm minimum or
125 empty pockets
©2001 Fairchild Semiconductor Corporation
May 2001, Rev. D
SuperSOTTM-3 Tape and Reel Data, continued
SSOT-3 Embossed Carrier Tape
Configuration: Figure 3.0
P0
P2
D0
D1
T
E1
E2
W
F
Wc
B0
Tc
K0
A0
P1
User Direction of Feed
Dimensions are in millimeter
E1 E2
A0
B0
W
D0
D1
F
P1
P0
K0
T
Wc
Tc
Pkg type
SSOT-3
(8mm)
3.15
+/-0.10
2.77
+/-0.10
8.0
+/-0.3
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
6.25
min
3.50
+/-0.05
4.0
+/-0.1
4.0
+/-0.1
1.30
+/-0.10
0.228
+/-0.013
5.2
+/-0.3
0.06
+/-02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
0.5mm
maximum
B0
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
Sketch B (Top View)
Component Rotation
SSOT-3 Reel Configuration: Figure 4.0
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7"Diameter Option
B Min
Dim C
See detail AA
Dim D
min
W3
13" Diameter Option
W2 max Measured at Hub
DETAIL AA
Dim W2
Dimensions are in inches and millimeters
Reel
Option
Tape Size
8mm
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W3 (LSL-USL)
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
7" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.311 – 0.429
7.9 – 10.9
8mm
13" Dia
July 1999, Rev. C
SuperSOTTM-3 Package Dimensions
SuperSOT -3 (FS PKG Code 32)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0097
September 1998, Rev. A
©2000 Fairchild Semiconductor International
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
â
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STAR*POWER™
Stealth™
VCX™
FAST
ACEx™
Bottomless™
CoolFET™
OPTOLOGIC™
OPTOPLANAR™
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FASTr™
FRFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
CROSSVOLT™
DenseTrench™
DOME™
POP™
Power247™
PowerTrenchâ
QFET™
EcoSPARK™
E2CMOSTM
TinyLogic™
QS™
EnSignaTM
TruTranslation™
UHC™
QT Optoelectronics™
Quiet Series™
SILENTSWITCHERâ
FACT™
FACT Quiet Series™
UltraFETâ
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
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As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
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be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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