FAN7528_07 [FAIRCHILD]

Dual-Output, Critical Conduction Mode PFC Controller; 双路输出,临界导通模式PFC控制器
FAN7528_07
型号: FAN7528_07
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Dual-Output, Critical Conduction Mode PFC Controller
双路输出,临界导通模式PFC控制器

功率因数校正 控制器
文件: 总21页 (文件大小:2594K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
February 2007  
FAN7528  
Dual-Output, Critical Conduction Mode PFC Controller  
Features  
Description  
„ Low Total Harmonic Distortion (THD)  
„ Dual Output Voltage Control  
The FAN7528 is an active power factor correction (PFC)  
controller for boost PFC applications that operates in  
critical conduction mode (CRM). It uses voltage mode  
PWM that compares an internal ramp signal with the  
error amplifier output to generate MOSFET turn-off sig-  
nal. Because the voltage mode CRM PFC controller does  
not need the rectified AC line voltage information, it can  
save the power loss of the input voltage sensing network  
necessary for the current mode CRM PFC controller.  
„ Precise Adjustable Output Over-Voltage Protection  
„ Open-Feedback Protection and Disable Function  
„ Zero Current Detector  
„ 160µs Internal Start-up Timer  
„ MOSFET Over-Current Protection  
„ Under-Voltage Lockout with 3.5V Hysteresis  
„ Low Start-up (40µA) and Operating Current (1.5mA)  
„ Totem-Pole Output with High State Clamp  
„ ±400mA Peak Gate Drive Current  
„ 8-Pin DIP or 8-Pin SOP  
The FAN7528 provides the dual-output voltage control  
function without the AC line voltage sensing for adapter  
applications. It changes the PFC output voltage accord-  
ing to the AC line voltage.  
It provides protection functions such as over-voltage pro-  
tection, open-feedback protection, over-current protec-  
tion, and under-voltage lockout protection. The FAN7528  
can be disabled if the INV pin voltage is lower than 0.45V  
and the operating current decreases to 65µA. Using a  
new variable on-time control method, THD is lower than  
the conventional CRM boost PFC ICs.  
Applications  
„ Adapter  
Related Application Notes  
„ AN-6012: Design of Power Factor Correction Circuit  
Using FAN7528  
Ordering Information  
OperatingTemp.  
Marking  
Part Number  
FAN7528N  
Range  
Pb-Free  
Yes  
Package  
8-DIP  
Packing Method  
Code  
-40°C to +125°C  
-40°C to +125°C  
-40°C to +125°C  
Rail  
Rail  
FAN7528  
FAN7528  
FAN7528  
FAN7528M  
Yes  
8-SOP  
8-SOP  
FAN7528MX  
Yes  
Tape & Reel  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
Typical Application Diagrams  
L
D
VO  
AC IN  
NAUX  
VAUX  
R2  
RZCD  
ZCD  
CO  
VCC  
FAN7528  
INV  
MOT  
CS  
COMP  
R1  
GND  
FAN7528 Rev. 1.01  
Figure 1. Typical Boost PFC Application  
Internal Block Diagram  
2.5V  
Ref  
8
Vref  
VCC  
UVLO  
Vcc  
Internal  
Bias  
Drive  
Output  
OUT  
Disable  
7
12V 8.5V  
160μs  
Timer  
13V  
5
ZCD  
S
Q
6.7V  
1.4V 1.5V  
R
Zero Current  
Detector  
OVP  
2.55V  
2.66V  
4
CS  
Disable  
40k  
0.45V 0.35V  
8pF  
0.8V  
OCP  
Comparator  
VCC=8.5V Reference Set  
=4.5V Reference Reset  
V
CC  
Ramp  
Signal  
Dual-Output Reference  
Generator  
1V Offset  
1.5V/2.5V  
Sawtooth  
Generator  
Error  
Amplifier  
3
MOT  
Gm  
INV  
1
1V ~ 5V  
Range  
6
2
GND  
COMP  
FAN7528 Rev. 1.00  
Figure 2. Functional Block Diagram of FAN7528  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
2
Pin Assignments  
VCC  
8
OUT  
7
GND  
6
ZCD  
5
W W W  
F A N 7 5 2 8  
1
2
3
4
INV  
COMP  
MOT  
CS  
FAN7528 Rev. 1.00  
Figure 3. Pin Configuration (Top View)  
Pin Definitions  
Pin #  
Name  
Description  
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC  
converter should be resistively divided to 2.5V at the high line condition and connected  
to this pin. If this pin voltage is controlled to be lower than 0.45V, the device is  
disabled.  
1
INV  
This pin is the output of the transconductance error amplifier. Some components for  
the output voltage compensation should be connected between this pin and GND.  
2
3
COMP  
MOT  
This pin is used to set the slope of the internal ramp. The voltage of this pin is  
maintained to be 1V. If a resistor is connected between this pin and GND, current flows  
out of the pin and the slope of the internal ramp is proportional to this current.  
This pin is the input of the over-current protection comparator. The MOSFET current is  
sensed using a sensing resistor and the resulting voltage is applied to this pin. An  
internal RC filter is included to filter switching noise. This pin is sensitive to the  
negative voltage below -0.3V. For proper operation, the stray inductance in the sensing  
path and the inductance of the sensing resistor must be minimized.  
4
CS  
This pin is the input of the zero current detection block. If the voltage of this pin goes  
higher than 1.5V, then lower than 1.4V, the MOSFET is turned on.  
5
6
ZCD  
GND  
This pin is used for the ground potential of all the pins. For proper operation, the signal  
ground and the power ground should be separated.  
This pin is the gate drive output. The peak sourcing and sinking current level is  
400mA. For proper operation, the stray inductance in the gate driving path must be  
minimized.  
7
8
OUT  
VCC  
This pin is the IC supply pin. IC current and MOSFET drive current are supplied using  
this pin.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-  
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-  
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The  
absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified.  
Symbol  
VCC  
Parameter  
Value  
23  
Unit  
V
Supply Voltage  
IOH, IOL  
Iclamp  
Idet  
Peak Drive Output Current  
±400  
mA  
mA  
mA  
V
Driver Output Clamping Diodes VO > VCC or VO < -0.3V  
Detector Clamping Diodes  
±10  
±10  
VIN  
Error Amp, MOT, CS Input Voltages  
Operating Junction Temperature  
Operating Temperature Range  
Storage Temperature Range  
Human Body Model  
-0.3 to 6  
150  
TJ  
°C  
°C  
°C  
kV  
V
TA  
-40 to 125  
-65 to 150  
2.0  
TSTG  
ESD  
Machine Model  
300  
Thermal Impedance  
Symbol  
Parameter  
Value  
110  
Unit  
°C/W  
°C/W  
8-DIP  
θJA  
Thermal Resistance, Junction-to-Ambient  
8-SOP  
150  
Note:  
1. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.  
© 2005 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7528 Rev. 1.0.6  
4
Electrical Characteristics  
VCC = 14V, TA = -40°C~125°C, unless otherwise specified.  
Symbol  
Parameter  
Condition  
Min.  
Typ.  
Max.  
Unit  
Under-Voltage Lockout Section  
VTH(start)  
VTH(stop)  
HY(uvlo)  
Start Threshold Voltage  
Stop Threshold Voltage  
UVLO Hysteresis  
VCC increasing  
11  
8.0  
3.0  
12  
8.5  
3.5  
13  
9.0  
4.0  
V
V
V
VCC decreasing  
Supply Current Section  
IST Start-up Supply Current  
ICC  
IDCC  
ICC(dis)  
VCC = VTH(start) – 0.2V  
Output no switching  
50kHz, CL=1nF  
Vinv = 0V  
40  
1.5  
2.5  
65  
70  
3.0  
4.0  
90  
μA  
mA  
mA  
μA  
Operating Supply Current  
Dynamic Operating Supply Current  
Operating Current at Disable  
40  
Error Amplifier Section  
TA = 25°C  
2.465 2.500  
2.435 2.500  
2.535  
2.565  
1.55  
V
V
Vref1  
Voltage Feedback Input Threshold1  
Vref2  
ΔVref1  
ΔVref3  
Ib(ea)  
Voltage Feedback Input Threshold2  
Line Regulation  
1.45  
1.50  
0.1  
20  
V
VCC = 14V~23V  
10.0  
mV  
mV  
μA  
μA  
μA  
V
(1)  
Temperature Stability of Vref1  
Input Bias Current  
Vinv = 1V~4V  
Vinv = 2.4V  
Vinv = 2.6V  
-0.5  
0.5  
Isource  
Isink  
Output Source Current  
-12  
12  
Output Sink Current  
Veao(H)  
Veao(Z)  
gm  
Output Upper Clamp Voltage  
Zero Duty Cycle Output Voltage  
Transconductance(1)  
4.5  
0.7  
90  
5.5  
1.0  
115  
1.30  
4.5  
6.5  
1.3  
V
140  
1.36  
6.0  
μmho  
V
VTH(in)  
VTH(reset)  
Output Voltage Selection Threshold  
Output Voltage Reset Threshold(1)  
TA = 25°C  
1.24  
3.0  
V
Maximum On-Time Section  
Vmot  
Maximum On-time Voltage  
Maximum On-time Programming  
Rmot = 13.7k  
0.95  
18.0  
1.00  
22.5  
1.05  
27.0  
V
tON-max  
Rmot = 13.7k, TA = 25°C  
μs  
Current Sense Section  
Current Sense Input Threshold  
Voltage Limit  
VCS(limit)  
0.7  
0.8  
0.9  
V
Ib(cs)  
td(cs)  
Input Bias Current  
Current Sense Delay to Output(1)  
VCS = 0V~1V  
-1.0  
-0.1  
350  
1.0  
μA  
500  
ns  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
5
Electrical Characteristics (Continued)  
VCC = 14V, TA = -40°C~125°C, unless otherwise specified.  
Symbol  
Parameter  
Condition  
Min. Typ. Max. Unit  
Zero Current Detection Section  
VTH(ZCD)  
HY(ZCD)  
Vclamp(h)  
Vclamp(l)  
Ib(ZCD)  
Input Voltage Threshold(1)  
Detect Hysteresis(1)  
1.35  
0.05  
6.0  
0
1.50  
0.10  
6.7  
1.65  
0.15  
7.4  
1.0  
1.0  
-10  
10  
V
V
Input High Clamp Voltage  
Input Low Clamp Voltage  
Input Bias Current  
Source Current Capability(1)  
Sink Current Capability(1)  
Idet = 3mA  
V
Idet = -3mA  
0.6  
V
VZCD = 1V~5V  
-1.0  
-0.1  
μA  
mA  
mA  
Isource(zcd)  
Isink(zcd)  
Maximum Delay from ZCD to Output  
Turn-on(1)  
tdead  
100  
9.2  
200  
ns  
Output Section  
VOH  
VOL  
Output Voltage High  
IO = -100mA  
IO = 100mA  
11.0  
1.0  
50  
12.8  
2.5  
V
V
Output Voltage Low  
Rising Time(1)  
Falling Time(1)  
tr  
CL = 1nF  
100  
100  
14.5  
1
ns  
ns  
V
tf  
CL = 1nF  
50  
VO(max)  
VO(uvlo)  
Restart Timer Section  
Maximum Output Voltage  
VCC = 20V, IO = 100μA  
11.5  
40  
13.0  
Output Voltage with UVLO Activated VCC = 5V, IO = 100μA  
V
td(rst)  
Restart Timer Delay  
160  
360  
μs  
Over-Voltage Protection Section  
VOVP  
OVP Threshold Voltage  
OVP Hysteresis  
TA = 25°C  
2.60  
0.06  
2.66  
0.11  
2.72  
0.16  
V
V
HY(ovp)  
Enable Section  
VTH(en)  
HY(en)  
Enable Threshold Voltage  
Enable Hysteresis  
0.40  
0.05  
0.45  
0.10  
0.50  
0.15  
V
V
Note:  
1. These parameters, although guaranteed by design, are not tested in production.  
© 2005 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7528 Rev. 1.0.6  
6
Typical Performance Characteristics  
12.8  
12.4  
12.0  
11.6  
11.2  
9.2  
8.8  
8.4  
8.0  
7.6  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Temperature [°C]  
Figure 4. Start Threshold Voltage vs. Temp.  
Figure 5. Stop Threshold Voltage vs. Temp.  
70  
60  
50  
40  
30  
20  
10  
0
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Temperature [°C]  
Figure 6. UVLO Hysteresis vs. Temp.  
Figure 7. Start-up Supply Current vs. Temp.  
3.0  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 8. Operating Supply Current vs. Temp.  
Figure 9. Dynamic Operating Current vs. Temp.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
7
Typical Performance Characteristics (Continued)  
90  
80  
70  
60  
50  
40  
2.56  
2.54  
2.52  
2.50  
2.48  
2.46  
2.44  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 10. ICC at Disable vs. Temp.  
Figure 11. Vref1 vs. Temp.  
0.4  
0.2  
1.54  
1.52  
1.50  
1.48  
1.46  
0.0  
-0.2  
-0.4  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 12. Vref2 vs. Temp.  
Figure 13. Input Bias Current vs. Temp.  
-6  
-9  
18  
15  
12  
9
-12  
-15  
-18  
6
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 14. Error Amp. Source Current vs. Temp.  
Figure 15. Error Amp. Sink Current vs. Temp.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
8
Typical Performance Characteristics (Continued)  
6.5  
6.0  
5.5  
5.0  
4.5  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
-60 -40 -20  
0
20 40 60 80 100 120 140  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Temperature [°C]  
Figure 16. Error Amp. Clamp Voltage vs. Temp.  
Figure 17. Zero Duty Output Voltage vs. Temp.  
1.36  
1.34  
1.32  
1.30  
1.28  
1.26  
1.24  
1.04  
1.02  
1.00  
0.98  
0.96  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 18. Output Select Threshold vs. Temp.  
Figure 19. MOT Pin Voltage vs. Temp.  
0.88  
0.84  
0.80  
0.76  
0.72  
26  
24  
22  
20  
18  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 20. Maximum On-Time vs. Temp.  
Figure 21. Current Limit vs. Temp.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
9
Typical Performance Characteristics (Continued)  
7.4  
7.2  
7.0  
6.8  
6.6  
6.4  
6.2  
6.0  
0.9  
0.6  
0.3  
0.0  
-0.3  
-0.6  
-0.9  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 22. CS Input Bias Current vs. Temp.  
Figure 23. ZCD Input High Clamp vs. Temp.  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
0.8  
0.4  
0.0  
-0.4  
-0.8  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 24. ZCD Input Low Clamp vs. Temp.  
Figure 25. ZCD Input Bias Current vs. Temp.  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
12.5  
12.0  
11.5  
11.0  
10.5  
10.0  
9.5  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 26. Output Voltage High vs. Temp.  
Figure 27. Output Voltage Low vs. Temp.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
10  
Typical Performance Characteristics (Continued)  
14.5  
14.0  
13.5  
13.0  
12.5  
12.0  
11.5  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 28. Maximum Output Voltage vs. Temp.  
Figure 29. Output Voltage when UVLO vs. Temp.  
400  
350  
300  
250  
200  
150  
100  
50  
2.74  
2.72  
2.70  
2.68  
2.66  
2.64  
2.62  
2.60  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 30. Restart Timer Delay vs. Temp.  
Figure 31. Over-Voltage Protection vs. Temp.  
0.14  
0.12  
0.10  
0.08  
0.06  
0.50  
0.48  
0.46  
0.44  
0.42  
0.40  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 32. OVP Hysteresis vs. Temp.  
Figure 33. Enable Threshold Voltage vs. Temp.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
11  
Typical Performance Characteristics (Continued)  
0.14  
0.12  
0.10  
0.08  
0.06  
-60 -40 -20  
0
20 40 60 80 100 120 140  
Temperature [°C]  
Figure 34. Enable Hysteresis vs. Temp.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
12  
Applications Information  
1. Error Amplifier Block  
1.2 Over-Voltage Protection Function  
The error amplifier block has several functions, such as  
dual output function, over-voltage protection function,  
and disable function.  
The control speed of the PFC converter is very slow;  
therefore, the over-voltage protection (OVP) of the out-  
put voltage is very important. The FAN7528 provides a  
precise OVP function that shuts down the drive circuit  
when the INV pin voltage exceeds 2.66V and there is  
0.11V hysteresis.  
1.1 Dual-Output Function  
Unlike conventional CRM PFC controllers, the FAN7528  
has the dual-output control function according to the AC  
line voltage without sensing the rectified AC line voltage.  
Because the output voltage of the boost converter is pro-  
portional to the peak voltage of the input AC line voltage  
before the boost converter starts switching, the INV pin  
voltage represents the peak AC line voltage. When the  
AC line is connected to the boost converter, VCC voltage  
starts to increase from zero voltage. If the VCC voltage  
reaches 8.5V, the dual-output reference generator com-  
pares the INV pin voltage with 1.3V reference and, if the  
INV pin voltage is lower than 1.3V, the dual-output refer-  
ence generator sets the reference voltage of the error  
amplifier to 1.5V. If the INV pin voltage is higher than  
1.3V, the reference voltage is set to 2.5V. That means if  
the output voltage of the boost converter is set to 400V at  
high line, the output voltage is 240V (400V*1.5/2.5) at  
low line. If the output voltage is set to 390V at high line,  
the output voltage is 234V at low line. Because this block  
does not need the input voltage sensing network, the  
power loss and cost related with the sensing network  
can be saved. The reference voltage of the error ampli-  
fier is not reset until VCC goes below 4.5V.  
1.3 Disable Function  
If the INV pin voltage is lower than 0.45V, most of the  
internal block is disabled, the operating current is  
reduced to be 65µA, and there is 0.1V hysteresis in the  
comparator.  
1.4 Error Amplifier  
The error amplifier is a transconductance type amplifier.  
The output current of the amplifier is proportional to the  
voltage difference between the inverting input and the  
non-inverting input of the amplifier. Some resistors and  
capacitors should be connected to the error amplifier  
output pin, the COMP pin, for the output voltage loop  
compensation.  
2. Zero Current Detection Block  
The zero current detector (ZCD) generates the turn-on  
signal of the MOSFET when the boost inductor current  
reaches zero using an auxiliary winding coupled with the  
inductor. If the voltage of the ZCD pin goes higher than  
1.5V, the ZCD comparator waits until the voltage goes  
below 1.4V. If the voltage goes below 1.4V, the zero cur-  
rent detector turns on the MOSFET. The ZCD pin is pro-  
tected internally by two clamps, 6.7V high clamp and  
0.6V low clamp. The 160µs timer generates a MOSFET  
turn-on signal if the drive output has been low for more  
than 160µs from the falling edge of the drive output.  
2.66V  
2.55V  
OVP  
Disable  
0.45V 0.35V  
Dual-Output  
Reference  
Generator  
VOUT  
Turn-on  
Signal  
Error Amp  
160μs  
Timer  
1.5V/2.5V  
VIN  
INV  
Gm  
ZCD  
1
5
S
RZCD  
Q
6.7V  
1.4V  
1.5V  
2
Zero Current  
Detector  
R
COMP  
FAN7528 Rev. 1.00  
Figure 36. Zero Current Detector Block  
FAN7528 Rev. 1.00  
Figure 35. Error Amplifier Block  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
13  
3. Sawtooth Generator Block  
4. Over-Current Protection Block  
The output of the error amplifier and the output of the  
sawtooth generator are compared to determine the  
MOSFET turn-off instance. The slope of the sawtooth is  
determined by an external resistor connected to the  
MOT pin. The voltage of the MOT pin is 1V and the slope  
is proportional to the current flowing out of the MOT pin.  
The internal ramp signal has 1V offset; therefore, the  
drive output is shut down if the voltage of the COMP pin  
is lower than 1V. The MOSFET on-time is maximum  
when the COMP pin voltage is 5V. According to the slope  
of the internal ramp, the maximum on-time can be pro-  
grammed. The necessary maximum on-time depends on  
the boost inductor, lowest AC line voltage, and maximum  
output power. The resistor value should be designed  
properly.  
The MOSFET current is sensed using an external sens-  
ing resistor for the over-current protection. If the CS pin  
voltage is higher than 0.8V, the over-current protection  
comparator generates a protection signal. An internal RC  
filter is included to filter switching noise.  
OCP  
Signal  
40k  
4
CS  
8pF  
Over-Current  
Protection  
Comparator  
0.8V  
FAN7528 Rev. 1.00  
Figure 38. Over-Current Protection Block  
Off Signal  
1V  
5. Switch Drive Block  
MOT  
Sawtooth  
Generator  
The FAN7528 contains a single totem-pole output stage  
designed for a direct drive of power MOSFET. The drive  
output is capable of up to 400mA peak current with a typ-  
ical rise and fall time of 50ns with 1nF load. The output  
voltage is clamped to be 13V to protect MOSFET gate  
even if the VCC voltage is higher than 13V.  
3
1V  
Error Amp  
Output  
FAN7528 Rev. 1.00  
6. Under-Voltage Lockout Block  
Figure 37. Sawtooth Generator Block  
If the VCC voltage reaches 12V, the IC’s internal blocks  
are enabled and start operation. If the VCC voltage drops  
below 8.5V, most of the internal blocks are disabled to  
reduce the operating current. VCC voltage should be  
higher than 8.5V under normal conditions.  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
14  
Typical Application Circuit  
Application  
Output power  
Input voltage  
Output voltage  
Universal input  
(90~264 Vac)  
Adapter  
100W  
389V/232V  
Features  
„ High efficiency (>90% at 90 Vac input)  
„ Low THD (total harmonic distortion) (<10% at 264 Vac input)  
„ Dual-output control  
Key Design Notes  
„ Diode D4 is used to prevent IC malfunction that can happen if the CS pin voltage is lower than -0.3V.  
„ Important components for low THD are R2, R5, and C11.  
1. Schematic  
T1  
PFC OUTPUT  
VAUX  
D2  
BD  
C5  
R4  
R3  
R5  
R10  
D3  
R6  
C10  
Q1  
NTC  
ZD1  
D1  
7
C11  
6
C9  
C3  
C4  
8
1
5
C2  
R9  
LF1  
FAN7528  
R2  
C1  
V1  
R11  
2
3
4
R8  
C8  
R7  
F1  
C7 R1  
D4  
C6  
FAN7528 Rev. 1.00  
AC INPUT  
Figure 39. Schematic  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
15  
2. Inductor Schematic Diagram  
1
NVcc  
2
3
Np  
5
FAN7528 Rev. 1.00  
Figure 40. Inductor Schematic Diagram  
3. Winding Specification  
No  
Pin (sf)  
5 3  
Wire  
0.2φ × 10  
Turns  
Winding Method  
Np  
44  
Solenoid Winding  
Insulation: Polyester Tape t = 0.050mm, 4 Layers  
NVcc 2 1  
0.2φ × 1  
6
Solenoid Winding  
Outer Insulation: Polyester Tape t = 0.050mm, 4 Layers  
Air Gap: 0.6mm for each leg  
4. Electrical Characteristics  
Pin  
Specification  
Remarks  
Inductance  
3–5  
400µH ± 10%  
100kHz, 1V  
5. Core & Bobbin  
„ Core: EI 3026  
„ Bobbin: EI3026  
„ Ae(mm2): 111  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
16  
6. Demo Circuit Part List  
Part  
Value  
3A/250V  
10D-9  
Note  
Part  
Value  
Note  
Fuse  
NTC  
Inductor  
F1  
T1  
400µH  
EI3026  
NTC  
MOSFET  
Resistor  
Q1  
FQPF13N50C  
Fairchild  
R1  
R2  
R3  
R4  
R5  
R6  
R7  
R8  
R9  
R10  
R11  
10kΩ  
1/4W  
1/4W  
1/2W  
1/2W  
1/4W  
1/4W  
1/2W  
1/4W  
1/4W  
1/4W  
1/4W  
370kΩ  
330kΩ  
150Ω  
20kΩ  
10Ω  
Diode  
D1  
D2  
1N4148  
BYV26C  
1N5819  
1N5819  
1N4746  
Fairchild  
600V, 1A  
Fairchild  
Fairchild  
18V  
D3  
D4  
0.22Ω  
10kΩ  
10kΩ  
2MΩ  
ZD1  
Bridge Diode  
KBL06  
BD  
LF1  
IC1  
V1  
600V/4A  
Wire 0.4mm  
Fairchild  
470V  
12.9kΩ  
Capacitor  
Line Filter  
C1  
C2  
C3  
C4  
C5  
C6  
C7  
C8  
C9  
C10  
C11  
150nF/275VAC  
330nF/275VAC  
2.2nF/3kV  
2.2nF/3kV  
150nF/630V  
47uF/25V  
Box Capacitor  
Box Capacitor  
40mH  
FAN7528  
471  
Ceramic Capacitor  
Ceramic Capacitor  
Film Capacitor  
IC  
Electrolytic Capacitor  
Ceramic Capacitor  
MLCC  
TNR  
47nF/50V  
220nF  
100µF/450V  
12nF/100V  
47pF/50V  
Electrolytic Capacitor  
Film Capacitor  
Ceramic Capacitor  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
17  
7. Layout  
Separate the power ground and the  
signal ground  
Power Ground  
Signal Ground  
Place the output voltage sensing resistors  
close to IC  
Figure 41. PCB Layout Considerations for FAN7528  
8. Performance Data  
90 Vac  
0.999  
3.5%  
110 Vac  
0.998  
3.6%  
220 Vac  
0.991  
264 Vac  
0.983  
100W  
50W  
PF  
THD  
PF  
6.1%  
7.3%  
0.997  
5.1%  
0.996  
5.5%  
0.971  
0.947  
THD  
11.1%  
13.0%  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
18  
Mechanical Dimensions  
8-DIP  
Dimensions are in millimeters unless otherwise noted.  
Figure 42. 8-Lead Dual In-Line Package (DIP)  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
19  
Mechanical Dimensions  
8-SOP  
Dimensions are in millimeters unless otherwise noted.  
Figure 43. 8-Lead Small Outline Package (SOP)  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
20  
© 2005 Fairchild Semiconductor Corporation  
FAN7528 Rev. 1.0.6  
www.fairchildsemi.com  
21  

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