DM74ALS174SJX [FAIRCHILD]
Hex D-Type Flip-Flop ; 六路D类触发器\n
| 型号： | DM74ALS174SJX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Hex D-Type Flip-Flop
|
| 文件： | 总7页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 1986
Revised February 2000
DM74ALS174 • DM74ALS175
Hex/Quad D-Type Flip-Flops with Clear
General Description
Features
These positive-edge-triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic. Both have an asynchro-
nous clear input, and the quad (DM74ALS175) version fea-
tures complementary outputs from each flip-flop.
■ Advanced oxide-isolated ion-implanted Schottky TTL
process
■ Pin and functional compatible with LS family counterpart
■ Typical clock frequency maximum is 80 MHz
Information at the D inputs meeting the setup time require-
ments is transferred to the Q outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at a partic-
ular voltage level and is not directly related to the transition
time of the positive-going pulse. When the clock input is at
either the HIGH or LOW level, the D input signal has no
effect at the output.
■ Switching performance guaranteed over full temperature
and VCC supply range
Ordering Code:
Ordering Code Package Number
Package Description
DM74ALS174M
DM74ALS174SJ
DM74ALS174N
DM74ALS175M
DM74ALS175SJ
DM74ALS175N
M16A
M16D
N16E
M16A
M16D
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74ALS174
DM74ALS175
© 2000 Fairchild Semiconductor Corporation
DS006112
www.fairchildsemi.com
Function Table
Inputs
Outputs
Q (Note 1)
Clear
Clock
D
X
H
L
Q
L
L
H
H
H
X
↑
H
L
H
↑
L
H
L
X
Q0
Q0
H = HIGH Level (steady state)
L = LOW Level (steady state)
X = Don’t Care
↑ = Transition from LOW-to-HIGH Level
Q
= the level of Q before the indicated steady-state input conditions were established
0
Note 1: applies to DM74ALS175 only
Logic Diagrams
DM74ALS174
DM74ALS175
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2
Absolute Maximum Ratings(Note 2)
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
Storage Temperature Range
Typical θJA
0°C to +70°C
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
−65°C to +150°C
N Package
77.9°C/W
M Package
107.3°C/W
Recommended Operating Conditions
Symbol
Parameter
Min
4.5
2
Nom
Max
Units
V
VCC
VIH
VIL
IOH
IOL
tW
Supply Voltage
5
5.5
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Pulse Width
V
0.8
−0.4
8
V
mA
mA
Clock
10
HIGH or LOW
ns
Clear LOW
Data Input
10
tSETUP
Setup Time (Note 3)
10↑
Clear
ns
6↑
Inactive State
tHOLD
fCLOCK
TA
Data Hold Time (Note 3)
Clock Frequency
0↑
0
ns
MHz
°C
50
70
Free Air Operating Temperature
0
Note 3: The symbol ↑ indicates that the rising edge of the clock is used as reference.
3
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Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.
Symbol
Parameter
Conditions
= 4.5V, I = −18 mA
Min
Typ
Max
Units
V
V
Input Clamp Voltage
HIGH Level
V
−1.5
V
IK
CC
IN
I
= −400 µA
OH
OH
V
− 2
V
− 1.6
V
V
CC
CC
Output Voltage
V
= 4.5V to 5.5V
CC
V
LOW Level
OL
V
= 4.5V
I
= 8 mA
0.35
0.5
0.1
CC
OL
Output Voltage
I
Input Current at
I
V
= 5.5V, V = 7V
mA
CC
IN
Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
Supply Current
I
I
I
I
V
V
V
V
= 5.5V, V = 2.7V
20
µA
mA
mA
IH
IL
CC
CC
CC
CC
IH
= 5.5V, V = 0.4V
−0.1
−112
IN
= 5.5V, V = 2.25V
−30
O
O
= 5.5V
CC
DM74ALS174
DM74ALS175
11
8
19
14
Clock = 4.5V
Clear = GND
D Input = GND
mA
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
Min
Max
Units
f
t
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level
R
C
= 500Ω
= 50 pF
50
MHz
MAX
L
PLH
PHL
PLH
PHL
L
V
= 4.5V to 5.5V
5
8
3
5
18
23
15
17
ns
CC
Output From Clear (175 Only)
Propagation Delay Time
HIGH-to-LOW Level
t
t
t
ns
ns
ns
Output From Clear
Propagation Delay Time
LOW-to-HIGH Level
Output From Clock
Propagation Delay Time
HIGH-to-LOW Level
Output From Clock
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4
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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相关型号：
DM74ALS175MX_NL
D Flip-Flop, ALS Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16
FAIRCHILD
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