DM74ALS175 [FAIRCHILD]
Hex/Quad D-Type Flip-Flops with Clear; 六/四路D型触发器与Clear
| 型号： | DM74ALS175 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Hex/Quad D-Type Flip-Flops with Clear |
| 文件： | 总9页 (文件大小：331K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2007
DM74ALS174, DM74ALS175
tm
Hex/Quad D-Type Flip-Flops with Clear
Features
General Description
■ Advanced oxide-isolated ion-implanted Schottky
These positive-edge-triggered flip-flops utilize TTL
circuitry to implement D-type flip-flop logic. Both have an
asynchronous clear input, and the quad (DM74ALS175)
version features complementary outputs from each
flip-flop.
TTL process
■ Pin and functional compatible with LS family
counterpart
■ Typical clock frequency maximum is 80MHz
Information at the D inputs meeting the setup time
requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. Clock triggering
occurs at a particular voltage level and is not directly
related to the transition time of the positive-going pulse.
When the clock input is at either the HIGH or LOW level,
the D input signal has no effect at the output.
■ Switching performance guaranteed over full
temperature and V supply range
CC
Ordering Information
Ordering
Code
Package
Number
Package Description
DM74ALS174M
DM74ALS174SJ
DM74ALS175M
DM74ALS175SJ
DM74ALS175N
M16A
M16D
M16A
M16D
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number.
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
Connection Diagrams
DM74ALS174
DM74ALS175
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
2
Function Table
Inputs
Outputs
(1)
Clear
Clock
D
X
H
L
Q
L
Q
L
H
H
H
X
↑
H
H
L
L
↑
H
L
X
Q
Q
0
0
H = HIGH Level (steady state)
X = Don't Care
L = LOW Level (steady state)
↑ = Transition from LOW-to-HIGH Level
Q = the level of Q before the indicated steady-state input conditions were established.
0
Note:
1. Applies to DM74ALS175 only.
Logic Diagrams
DM74ALS174
DM74ALS175
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
Input Voltage
7V
7V
CC
V
I
T
Operating Free Air Temperature Range
Storage Temperature Range
Typical Thermal Resistance
N Package
0°C to +70°C
A
T
–65°C to +150°C
STG
θ
JA
77.9°C/W
M Package
107.3°C/W
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
4.5
2
Nom.
Max.
Units
V
V
Supply Voltage
5
5.5
CC
V
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
V
IH
V
0.8
–0.4
8
V
IL
I
mA
mA
ns
OH
I
OL
t
Pulse Width
Clock HIGH or LOW
10
10
10↑
6↑
0↑
0
W
Clear LOW
(2)
t
Setup Time
Data Input
ns
SETUP
Clear, Inactive State
(2)
t
Data Hold Time
ns
MHz
°C
HOLD
f
Clock Frequency
Free Air Operating Temperature
50
70
CLOCK
T
0
A
Note:
2. The symbol ↑ indicates that the rising edge of the clock is used as reference.
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
4
Electrical Characteristics
Over recommended operating free air temperature range. All typical values are measured at V = 5V, T = 25°C.
CC
A
Symbol
Parameter
Conditions
Min.
Typ.
Max. Units
V
Input Clamp Voltage
V
= 4.5V, I = –18 mA
–1.5
V
V
IK
CC
IN
V
HIGH Level Output Voltage
LOW Level Output Voltage
I
= –400µA, V = 4.5V to 5.5V
V
– 2
V
– 1.6
CC
OH
OH
CC
CC
V
V
V
= 4.5V, I = 8mA
0.35
0.5
0.1
V
OL
CC
CC
OL
I
Input Current at Max. Input
Voltage
= 5.5V, V = 7V
mA
I
IN
I
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
Supply Current
V
V
V
V
= 5.5V, V = 2.7V
20
–0.1
–112
19
µA
mA
mA
mA
IH
CC
CC
CC
CC
IH
I
= 5.5V, V = 0.4V
IN
IL
I
= 5.5V, V = 2.25V
–30
O
O
I
= 5.5V,
DM74ALS174
DM74ALS175
11
8
CC
Clock = 4.5V,
Clear = GND,
D Input = GND
14
Switching Characteristics
Over recommended operating free air temperature range.
Symbol
Parameter
Conditions
Min.
50
Max.
Units
MHz
ns
f
Maximum Clock Frequency
R = 500Ω,
L
C = 50pF,
MAX
L
t
Propagation Delay Time, LOW-to-HIGH Level
Output From Clear (175 Only)
5
18
23
15
17
PLH
PHL
PLH
PHL
V
= 4.5V to 5.5V
CC
t
Propagation Delay Time, HIGH-to-LOW Level
Output From Clear
8
3
5
ns
ns
ns
t
t
Propagation Delay Time, LOW-to-HIGH Level
Output From Clock
Propagation Delay Time, HIGH-to-LOW Level
Output From Clock
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
5
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
6
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
7
Physical Dimensions (Continued)
Dimensions are in inches (millimeters) unless otherwise noted.
Figure 3. 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
8
TRADEMARKS
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and
is not intended to be an exhaustive list of all such trademarks
®
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FACT Quiet Series™
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Motion-SPM™
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FAST
OPTOLOGIC
SPM
®
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF
THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE
UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF
FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE
PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in significant injury to the user.
2.
A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.
Advance Information
Formative or In Design
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve design.
No Identification Needed
Obsolete
This datasheet contains specifications on a product that has been
discontinued by Fairchild semiconductor. The datasheet is printed for
reference information only.
Rev. I28
©1986 Fairchild Semiconductor Corporation
DM74ALS174, DM74ALS175 Rev. 1.2
www.fairchildsemi.com
9
相关型号：
DM74ALS175MX_NL
D Flip-Flop, ALS Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, TTL, PDSO16, 0.150 INCH, MS-012, SOIC-16
FAIRCHILD
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