74LVX174MX [FAIRCHILD]
Hex D-Type Flip-Flop ; 六路D类触发器\n
| 型号： | 74LVX174MX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Hex D-Type Flip-Flop
|
| 文件： | 总6页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1993
Revised March 1999
74LVX174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
Features
The LVX174 is a high-speed hex D flip-flop. The device is
used primarily as a 6-bit edge-triggered storage register.
The information on the D inputs is transferred to storage
during the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number
Package Description
74LVX174M
M16A
M16D
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX174SJ
74LVX174MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
D0–D5
CP
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
MR
Q0–Q5
© 1999 Fairchild Semiconductor Corporation
DS011607.prf
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Truth Table
Inputs
Outputs
Qn
Operating Mode
Dn
MR
L
CP
Reset (Clear)
Load ‘1’
X
X
H
L
L
H
L
H
Load ‘0’
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
2.0V to 3.6V
0V to 5.5V
−20 mA
Input Voltage (VI)
DC Input Voltage (VI)
−0.5V to 7V
Output Voltage (VO)
0V to VCC
DC Output Diode Current (IOK
)
Operating Temperature (TA)
−40°C to +85°C
0 ns/V to 100 ns/V
VO = −0.5V
−20 mA
+20 mA
Input Rise and Fall Time (∆t/∆V)
VO = VCC + 0.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
or Sink Current (IO)
±25 mA
DC VCC or Ground Current
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
(ICC or IGND
)
±50 mA
−65°C to +150°C
180 mW
Storage Temperature (TSTG
Power Dissipation (PD)
)
DC Electrical Characteristics
T
= +25°C
T = −40°C to +85°C
A
A
V
Symbol
Parameter
Units
Conditions
CC
Min
1.5
2.0
2.4
Typ
Max
Min
1.5
2.0
2.4
Max
V
HIGH Level
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
IH
Input Voltage
V
V
V
V
LOW Level
0.5
0.8
0.8
0.5
0.8
0.8
IL
Input Voltage
V
V
V
HIGH Level
1.9
2.9
2.0
3.0
1.9
2.9
V
V
= V or V
I
I
I
I
I
I
= −50 µA
= −50 µA
= −4 mA
= 50 µA
= 50 µA
= 4 mA
OH
OL
IN
IN
IL
IH
OH
OH
OH
OL
OL
OL
Output Voltage
2.58
2.48
LOW Level
0.0
0.0
0.1
0.1
0.1
0.1
= V or V
IL
IH
Output Voltage
0.36
±0.1
4.0
0.44
±1.0
40.0
I
I
Input Leakage Current
µA
µA
V
V
= 5.5V or GND
IN
CC
IN
IN
Quiescent Supply Current
= V or GND
CC
Noise Characteristics (Note 3)
T
= 25°C
V
(V)
A
CC
C
(pF)
Symbol
Parameter
Units
L
Typ
Limit
V
V
V
V
Quiet Output Maximum Dynamic V
3.3
3.3
3.3
3.3
0.3
0.5
−0.5
2.0
V
V
V
V
50
OLP
OLV
IHD
ILD
OL
Quiet Output Minimum Dynamic V
−0.3
50
50
50
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
0.8
Note 3: (Input t = t = 3 ns)
r
f
3
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AC Electrical Characteristics
T
= +25°C
T = −40°C to +85°C
A
V
(V)
A
CC
C
(pF)
Symbol
Parameter
Units
L
Min
Typ
7.6
Max
14.5
18.0
9.3
Min
1.0
1.0
1.0
1.0
1.0
1.0
Max
17.5
21.0
11.0
14.5
18.5
22.0
t
t
Propagation
Delay Time
CP to Q
2.7
15
PLH
PHL
10.1
5.9
50
15
50
15
50
ns
3.3 ± 0.3
n
8.4
12.8
15.0
18.5
t
Propagation Delay
MR to Q
2.7
7.9
PHL
10.4
n
ns
ns
ns
3.3 ± 0.3
6.2
8.7
9.7
1.0
1.0
8.5
6.0
0
11.5
15.0
15
50
13.2
t
t
t
Setup Time
to CP
2.7
3.3 ± 0.3
2.7
7.5
5.0
0
S
D
n
Hold Time
to CP
H
D
3.3 ± 0.3
2.7
0
0
n
Removal Time
4.5
3.0
4.5
3.0
REC
3.3 ± 0.3
MR to CP
Clock Pulse
Width
t
t
2.7
3.3 ± 0.3
2.7
6.5
5.0
6.5
7.5
5.0
7.5
W
W
MR Pulse
Width
ns
MHz
ns
3.3 ± 0.3
5.0
65
5.0
55
40
95
55
f
Maximum Clock
Frequency
2.7
130
60
15
50
15
50
50
MAX
45
3.3 ± 0.3
115
65
180
95
t
t
Output to Output
Skew (Note 4)
2.7
3.3
1.5
1.5
1.5
1.5
OSLH
OSHL
Note 4: Parameter guaranteed by design. t
= |t
− t
|, t
= |t
− t
|
PHLn
OSLH
PLHm
PLHn OSHL
PHLm
Capacitance
T
= +25°C
T = −40°C to +85°C
A
A
Symbol
Parameter
Units
Min
Typ
4
Max
10
Min
Max
C
C
Input Capacitance
Power Dissipation Capacitance (Note 5)
10
pF
pF
IN
29
PD
Note 5: C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
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4
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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