74LVQ174SJX [FAIRCHILD]
D Flip-Flop, LVQ Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, CMOS, PDSO16, EIAJ, PLASTIC, SOIC-16;
| 型号： | 74LVQ174SJX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | D Flip-Flop, LVQ Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, CMOS, PDSO16, EIAJ, PLASTIC, SOIC-16 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总6页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1998
74LVQ174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
Features
n Ideal for low power/low noise 3.3V applications
The LVQ174 is a high-speed hex D-type flip-flop. The device
is used primarily as a 6-bit edge-triggered storage register.
The information on the D inputs is transferred to storage dur-
ing the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Guaranteed pin-to-pin skew AC performance
n Guaranteed incident wave switching into 75Ω
Ordering Code:
Order Number
74LVQ174SC
74LVQ174SJ
Package Number
M16A
Package Description
16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC
16-Lead Molded Small Outline Package, SOIC EIAJ
M16D
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment for
SOIC JEDEC and EIAJ
DS011353-1
IEEE/IEC
DS011353-3
Pin Descriptions
Pin Names
Description
D0–D5
CP
Data Inputs
Clock Pulse Input
Master Reset Input
Outputs
MR
Q0–Q5
DS011353-2
© 1998 Fairchild Semiconductor Corporation
DS011353
www.fairchildsemi.com
Functional Description
Truth Table
The LVQ174 consists of six edge-triggered D flip-flops with
individual D inputs and Q outputs. The Clock (CP) and Mas-
ter Reset (MR) are common to all flip-flops. Each D input’s
state is transferred to the corresponding flip-flop’s output fol-
lowing the LOW-to-HIGH Clock (CP) transition. A LOW input
to the Master Reset (MR) will force all outputs LOW indepen-
dent of Clock or Data inputs. The LVQ174 is useful for appli-
cations where the true output only is required and the Clock
and Master Reset are common to all storage elements.
Inputs
Output
MR
L
CP
X
D
X
H
L
Q
L
N
H
H
L
N
H
H
L
X
Q
=
=
=
H
L
X
HIGH Voltage Level
LOW Voltage Level
Immaterial
N =
LOW-to-HIGH Transition
Logic Diagram
DS011353-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
)
Supply Voltage (VCC
)
2.0V to 3.6V
0V to VCC
=
VI −0.5V
−20 mA
+20 mA
Input Voltage (VI)
=
VI VCC + 0.5V
Output Voltage (VO
)
0V to VCC
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
VIN from 0.8V to 2.0V
−40˚C to +85˚C
DC Output Diode Current (IOK
)
=
VO −0.5V
−20 mA
+20 mA
=
VO VCC + 0.5V
@
VCC 3.0V
125 mV/ns
DC Output Voltage (VO
DC Output Source
)
−0.5V to VCC + 0.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be op-
erated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for ac-
tual device operation.
±
50 mA
or Sink Current (IO
DC VCC or Ground Current
(ICC or IGND
)
±
)
200 mA
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
Storage Temperature (TSTG
DC Latch-Up Source or
Sink Current
)
−65˚C to +150˚C
±
100 mA
DC Electrical Characteristics
VCC
=
=
Symbol
Parameter
TA +25˚C
TA −40˚C to +85˚C
Units
Conditions
(V)
3.0
3.0
3.0
3.0
3.0
3.0
3.6
Typ
Guaranteed Limits
=
VIH
Minimum High Level
Input Voltage
1.5
1.5
2.0
0.8
2.0
V
V
VOUT 0.1V
or VCC − 0.1V
=
VIL
Maximum Low Level
Input Voltage
0.8
2.9
VOUT 0.1V
or VCC − 0.1V
=
IOUT −50 µA
VOH
Minimum High Level
Output Voltage
2.99
2.9
V
=
VIN VIL or VIH (Note 3)
2.58
0.1
2.48
0.1
V
=
IOH −12 mA
=
IOUT 50 µA
VOL
Maximum Low Level
Output Voltage
0.002
V
=
VIN VIL or VIH (Note 3)
0.36
0.44
V
=
IOL 12 mA
=
±
±
1.0
IIN
Maximum Input
0.1
µA
VI VCC, GND
Leakage Current
=
VOLD 0.8V Max (Note 5)
IOLD
IOHD
ICC
Minimum Dynamic (Note 4)
Output Current
3.6
3.6
3.6
36
mA
mA
µA
=
VOHD 2.0V Min (Note 5)
−25
40.0
=
Maximum Quiescent
Supply Current
4.0
VIN VCC
or GND
VOLP
VOLV
VIHD
VILD
Quiet Output
3.3
3.3
3.3
3.3
0.7
−0.6
1.8
0.8
−0.8
2.0
V
V
V
V
(Notes 6, 7)
Maximum Dynamic VOL
Quiet Output
(Notes 6, 7)
(Notes 6, 8)
(Notes 6, 8)
Minimum Dynamic VOL
Maximum High Level
Dynamic Input Voltage
Maximum Low Level
Dynamic Input Voltage
1.6
0.8
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V ), 0V to threshold (V ),
ILD
IHD
=
f
1 MHz.
3
www.fairchildsemi.com
AC Electrical Characteristics
=
=
TA −40˚C to +85˚C
VCC
(V)
TA +25˚C
Symbol
Parameter
Units
=
=
CL 50 pF
CL 50 pF
Min
60
Typ
90
Max
Min
Max
fmax
Maximum Clock
Frequency
2.7
50
70
MHz
ns
±
3.3 0.3
90
100
10.8
9.0
tPLH
tPHL
tPHL
Propagation Delay
CP to Qn
2.7
2.0
2.0
2.0
2.0
2.5
2.5
16.2
11.5
15.5
11.0
16.2
11.5
1.5
1.5
1.5
1.5
1.5
2.0
2.0
18.0
12.5
17.0
12.0
18.0
12.5
1.5
±
3.3 0.3
Propagation Delay
CP to Qn
2.7
10.2
8.5
ns
±
3.3 0.3
Propagation Delay
MR to Qn
2.7
10.8
9.0
ns
±
3.3 0.3
tOSHL
,
Output to
2.7
1.0
ns
±
tOSLH
Output Skew (Note 9)
3.3 0.3
1.0
1.5
1.5
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-
fication applies to any outputs switching in the same direction, either HIGH to LOW (t ) or LOW to HIGH (t ). Parameter guaranteed by design.
OSHL OSLH
AC Operating Requirements
=
=
TA −40˚C to +85˚C
VCC
(V)
TA +25˚C
Symbol
Parameter
Units
=
=
CL 50 pF
CL 50 pF
Typ
3.0
2.5
1.2
1.0
1.2
1.0
1.2
1.0
0
Guaranteed Minimum
tS
Setup Time, HIGH or LOW
Dn to CP
2.7
8.0
6.5
4.0
3.0
7.0
5.5
7.0
5.5
3.5
2.5
10.0
7.0
ns
ns
ns
ns
ns
±
3.3 0.3
tH
Hold Time, HIGH or LOW
Dn to CP
2.7
4.5
±
3.3 0.3
3.0
tW
tW
trec
MR Pulse Width, LOW
2.7
10.0
7.0
±
3.3 0.3
CP Pulse Width
2.7
10.0
7.0
±
3.3 0.3
Recovery Time
MR to CP
2.7
3.5
±
3.3 0.3
0
2.5
Capacitance
Symbol
Parameter
Input Capacitance
Typ
Units
pF
Conditions
=
VCC Open
CIN
CPD (Note 10)
4.5
23
=
VCC 3.3V
Power Dissipation
Capacitance
pF
Note 10:
C
PD
is measured at 10 MHz.
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC
Package Number M16A
16-Lead Molded Small Outline Package, SOIC EIAJ
Package Number M16D
5
www.fairchildsemi.com
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Fairchild Semiconductor
Corporation
Fairchild Semiconductor
Europe
Fairchild Semiconductor
Hong Kong Ltd.
Fairchild Semiconductor
Japan Ltd.
Americas
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 8 141-35-0
8/F Room 808 Empire Centre
68 Mody Road, Tsimshatsui East
Kowloon, Hong Kong
Tel: 852-2722-8338
Fax: 852-2722-8383
4F, Natsume BI,
Customer Response Center
Tel: 1-888-522-5372
Fax: 972-910-8036
2-18-6 Yushima, Bunkyo-ku,
Tokyo 113-0034, Japan
Tel: 81-3-3818-8840
Fax: 81-3-3818-8450
English Tel: +44 (0) 1 793-85-68-56
Italy
Tel: +39 (0) 2 57 5631
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
相关型号：
©2020 ICPDF网 联系我们和版权申明