74FR16540QCX [FAIRCHILD]
Dual 8-Bit Buffer/Driver ; 双8位缓冲器/驱动器\n
| 型号： | 74FR16540QCX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Dual 8-Bit Buffer/Driver
|
| 文件： | 总6页 (文件大小：56K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1989
Revised August 1999
74FR16540
16-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
Features
The 74FR16540 contains sixteen inverting buffers with 3-
STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is byte controlled. Each byte has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
■ Inverting buffers
■ 3-STATE outputs drive bus lines
■ Output sink capability of 64 mA, source capability of
15 mA
■ Separate 3-STATE control pins for each byte
■ Guaranteed 4000V minimum ESD protection
■ Guaranteed multiple output switching, 250 pF delays
and pin-to-pin skew
■ 16-bit version of the 74F540, 74F240, or 74FR240
Ordering Code:
Order Number Package Number
Package Description
74FR16540QC
74FR16540SSC
V44A
44-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.650 Square
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
MS48A
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignment for SSOP
Pin Assignment for PLCC
Logic Symbol
© 1999 Fairchild Semiconductor Corporation
DS010615
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Pin Descriptions
Pin Names
Description
OEn
Output Enable Inputs
Inputs
I0–I15
O0–O15
3-STATE Outputs
Truth Table
Inputs
Outputs
I0–I7 I8–I15 O0–O7 O8–O15
Byte1 [0:7] Byte2 [8:15]
OE1 OE2 OE3 OE4
L
H
X
L
L
X
H
L
L
L
L
L
H
X
X
L
H
L
L
Z
Z
H
L
L
H
L
L
L
H
X
X
X
L
H
X
H
L
X
H
H
L
Z
Z
Z
H
L
L
H
X
L
H
L
H
L
Z
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
3-STATE Output
−0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Twice the Rated IOL (mA)
4000V
ESD Last Passing Voltage (Min)
DC Electrical Characteristics
V
Symbol
Parameter
Input HIGH Voltage
Min
Typ
Max
Units
Conditions
CC
V
V
V
V
2.0
V
V
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
IH
Input LOW Voltage
0.8
IL
Input Clamp Diode Voltage
Output HIGH Voltage
−1.2
Min
Min
I
I
I
I
= −18 mA
CD
OH
IN
2.4
2.0
= −3 mA
= −15 mA
= 64 mA
= 2.7V
OH
OH
OL
V
V
Output LOW Voltage
Input HIGH Current
Input HIGH Current
Breakdown Test
0.55
5.0
V
Min
OL
I
I
µA
Max
V
IH
IN
IN
V
= 7.0V
BVI
7.0
µA
Max
(OE )
n
I
I
I
I
I
Input LOW Current
−120
−225
20
µA
mA
µA
µA
µA
V
Max
Max
Max
Max
Max
0.0
V
V
V
V
V
= 0.5V
IL
IN
Output Short-Circuit Current
Output Leakage Current
Output Leakage Current
Output HIGH Leakage Current
Input Leakage Test
−100
= 0V
OS
OUT
OUT
OUT
OUT
0
0
= 2.7V
= 0.5V
OZH
OZL
CEX
−20
50
= V
CC
V
4.75
I
= 1.9 µA
ID
ID
All Other Pins Grounded
V = 150 mV
IOD
I
Output Circuit
OD
3.75
µA
0.0
Leakage Current
All Other Pins Grounded
I
I
I
I
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
Input Capacitance
100
20
µA
mA
mA
mA
pF
0.0
Max
Max
Max
5.0
V
V
V
V
= 5.25V
ZZ
OUT
14
75
38
8
= HIGH
CCH
CCL
CCZ
O
O
O
92
= LOW
= HIGH Z
50
C
IN
3
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AC Electrical Characteristics
T
= +25°C
T = 0°C to +70°C
A
A
V
= +5.0V
= 50 pF
V
= +5.0V
C = 50 pF
L
CC
CC
Symbol
Parameter
Units
C
L
Min
1.0
1.0
3.4
3.4
1.8
1.8
Typ
2.8
2.0
5.6
7.8
4.0
4.4
Max
4.3
Min
1.0
1.0
3.4
3.4
1.8
1.8
Max
t
Propagation Delay
In to On
4.3
4.3
PLH
ns
ns
ns
t
4.3
PHL
t
Output Enable Time
11.6
11.6
6.6
11.6
11.6
6.6
PZH
t
PZL
t
Output Disable Time
PHZ
t
6.6
6.6
PLZ
Extended AC Characteristics
T
= 0°C to +70°C
T = 0°C to +70°C
A
A
V
= +5.0V
= 50 pF
V
= +5.0V
CC
CC
C
C
= 250 pF
L
L
Symbol
Parameter
Units
16 Outputs Switching
(Note 4)
(Note 5)
Min
1.0
1.0
Max
6.0
Min
3.2
3.2
Max
8.2
t
Propagation Delay
In to On
PLH
ns
ns
ns
ns
ns
ns
t
6.0
8.2
PHL
t
t
t
t
t
Output Enable Time
3.4
3.4
1.8
1.8
14.5
14.5
6.6
PZH
PZL
Output Disable Time
PHZ
PLZ
6.6
Pin-to-Pin Skew
for HL Transitions
Pin-to-Pin Skew
for LH Transitions
Pin-to-Pin Skew
for HL/LH Transitions
OSHL
1.4
1.6
(Note 3)
t
OSLH
(Note 3)
t
OST
3.0
(Note 3)
Note 3: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-
cation applies to any outputs switching HIGH-to-LOW (t ), LOW-to-HIGH, (t ), or HIGH-to-LOW and/or LOW-to-HIGH, (t ). Specifications guaran-
OSHL
OSLH
OST
teed with all outputs switching in phase. This specification is guaranteed but not tested.
Note 4: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase,
i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.
Note 5: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
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4
Physical Dimensions inches (millimeters) unless otherwise noted
44-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.650 Square
Package Number V44A
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS48A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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6
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