74FR2240PC [FAIRCHILD]
Octal Buffer/Line Driver with 25ヘ Series Resistors in the Outputs; 与25з系列电阻在输出的八路缓冲器/线路驱动器型号: | 74FR2240PC |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Octal Buffer/Line Driver with 25ヘ Series Resistors in the Outputs |
文件: | 总5页 (文件大小:48K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
January 1991
Revised August 1999
74FR2240
Octal Buffer/Line Driver
with 25Ω Series Resistors in the Outputs
General Description
Features
■ 3-STATE outputs drive bus lines or buffer memory
The 74FR2240 is an inverting octal buffer and line driver
designed to drive capacitive inputs of MOS memory
devices, address and clock lines or act as a low under-
shoot general purpose bus driver.
address registers
■ Outputs sink 12 mA and source 15 mA
■ 25Ω series resistors in outputs eliminate the need for
external resistors
■ Designed to drive the capacitive inputs of MOS devices
Ordering Code:
Order Number Package Number
Package Description
74FR2240SC
74FR2240PC
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
Description
OE1, OE2
I0–I7
Output Enable Input (Active-LOW)
Inputs
O0–O7
Outputs
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
H
X
H
L
H
Z
Inputs
Outputs
OE2
In
(Pins 3, 5, 7, 9)
L
L
L
H
X
H
L
H
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
© 1999 Fairchild Semiconductor Corporation
DS010904
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Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
3-STATE Output
−0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Twice the Rated IOL (mA)
4000V
ESD Last Passing Voltage (Min)
DC Electrical Characteristics
V
Symbol
Parameter
Input HIGH Voltage
Min
Typ
Max
Units
Conditions
CC
V
V
V
V
2.0
V
V
Recognized HIGH Signal
Recognized LOW Signal
IH
Input LOW Voltage
0.8
IL
Input Clamp Diode Voltage
Output HIGH Voltage
−1.2
V
Min
Min
Min
Min
Min
Max
I
I
I
I
I
= −18 mA
CD
OH
IN
2.4
2.0
V
= −3 mA
= −15 mA
= 1 mA
OH
OH
OL
OL
V
V
Output LOW Voltage
0.5
0.75
5
V
OL
V
= 12 mA
= 2.7V
I
Input HIGH Current
Input HIGH Current
Breakdown Test
µA
V
V
V
IH
IN
IN
IN
I
BVI
7
µA
Max
= 7.0V
= 0.5V
I
Input LOW Current
Input Leakage Test
−150
µA
Max
0.0
IL
V
4.75
V
I
= 1.9 µA
ID
ID
All Other Pins Grounded
V = 150 mV
IOD
I
Output Circuit Leakage Current
3.75
µA
0.0
OD
All Other Pins Grounded
I
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
20
−20
−225
50
µA
µA
Max
Max
Max
Max
0.0
V
V
V
V
V
= 2.7V
= 0.5V
= 0.0V
OZH
OUT
OUT
OUT
OUT
OUT
I
OZL
I
−100
mA
µA
OS
I
= V
CC
CEX
I
100
13
µA
= 5.25V
ZZ
I
Power Supply Current
Power Supply Current
Power Supply Current
9
mA
mA
mA
Max
Max
Max
All Outputs HIGH
All Outputs LOW
Outputs 3-STATE
CCH
I
37
30
45
CCL
I
38
CCZ
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AC Electrical Characteristics
T
= +25°C
T = 0°C to +70°C
A
A
V
= +5.0V
= 50 pF
V
= +5.0V
C = 50 pF
L
CC
CC
Symbol
Parameter
Units
C
L
Min
1.7
1.7
2.6
2.6
2.1
2.1
Typ
3.3
2.9
4.0
6.3
3.9
3.4
Max
4.7
4.7
8.5
8.5
6.6
6.6
Min
1.7
1.7
2.6
2.6
2.1
2.1
Max
t
t
t
t
t
t
Propagation Delay
to B or B to A
n
4.7
4.7
8.5
8.5
6.6
6.6
PLH
ns
ns
ns
A
PHL
PZH
PZL
PHZ
PLZ
n
n
n
Output Enable Time
Output Disable Time
Extended AC Electrical Characteristics
T
= 0°C to +70°C
T = 0°C to +70°C
A
A
V
= +5.0V
= 50 pF
V
= +5.0V
CC
CC
C
C
= 250 pF
L
L
Symbol
Parameter
Units
Eight Outputs Switching
(Note 3)
(Note 4)
Min
1.7
1.7
2.6
2.6
2.1
2.1
Max
6.4
6.4
8.9
8.9
6.8
6.8
Min
4.2
4.2
Max
8.6
t
Propagation Delay
to B or B to A
n
PLH
ns
ns
ns
ns
ns
ns
t
t
t
t
t
t
A
8.6
PHL
PZH
PZL
n
n
n
Output Enable Time
Output Disable Time
PHZ
PLZ
Pin-to-Pin Skew
for HL Transitions
Pin-to-Pin Skew
for LH Transitions
Pin-to-Pin Skew
for HL/LH Transitions
OSHL
1.0
1.1
3.0
(Note 5)
t
OSLH
(Note 5)
t
OST
(Note 5)
Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase,
i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.
Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-
cation applies to any outputs switching HIGH-to-LOW, (t
teed with all outputs switching in phase.
), LOW-to-HIGH, (t
), or HIGH-to-LOW and/or LOW-to-HIGH, (t
). Specifications guaran-
OST
OSHL
OSLH
3
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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