SI482024-A10 [ETC]
BROADCAST MECHANICAL TUNING AM/FM/SW RADIO RECEIVER;
| 型号： | SI482024-A10 |
| 厂家： | 
ETC |
| 描述： | BROADCAST MECHANICAL TUNING AM/FM/SW RADIO RECEIVER |
| 文件： | 总20页 (文件大小：194K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si4820/24-A10
BROADCAST MECHANICAL TUNING AM/FM/SW RADIO RECEIVER
Features
Worldwide FM band support
(64–109 MHz)
Worldwide AM band support
(504–1750 kHz)
SW band support (Si4824 only)
(5.6–22 MHz)
No manual alignment necessary
Mono audio output
Automatic frequency control (AFC)
Integrated LDO regulator
2.0 to 3.6 V supply voltage
Wide range of ferrite loop sticks and
air loop antennas supported
24-pin SSOP
RoHS-compliant
Direct volume control
Not EN55020 compliant*
Selectable support AM/FM/SW
regional bands
Ordering Information:
*Note: For consumer applications that
require EN 55020 compliance,
use Si4831/35-B.
See page 14.
Applications
Pin Assignments
Table and portable radios
Mini/micro systems
CD/DVD players
Modules
Clock radios
Mini HiFi
Si4820/24-A10 (SSOP)
Boom boxes
Entertainment systems
1
2
24
23
22
21
20
19
18
17
16
15
14
13
AOUT
NC
LNA_EN
NC
Description
3
DBYP
VDD2
VDD1
XTALI
XTALO
TUNE1
TUNE2
BAND
NC
The Si4820/24-A10 is the entry level mechanical-tuned digital CMOS AM/FM/SW
radio receiver IC that integrates the complete receiver function from antenna input
to audio output. The Si4820/24-A10 extends Silicon Laboratories multi-band tuner
family, and further increases the ease and attractiveness of design radio reception
to audio devices through small size and board area, minimum component count,
and superior, proven performance. The Si4820/24-A10 is drop-in replaceable to
the existing Si4831/35 tuner, requires a simple application circuit, and removes
any requirements for manually tuning components during the manufacturing
process. It is a very simple product to design, manufacture, and support across
multiple product lines. The receiver has very low power consumption, runs off two
AAA batteries, and delivers the performance benefits of digital tuning to the
analog radio market.
4
5
6
7
NC
8
FMI
VOL-
VOL+
RST
9
RFGND
NC
10
11
12
GND
GND
NC
AMI
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
Functional Block Diagram
Si4820/24
ADC
ADC
AMI
AM
ANT
LNA
AGC
7,272,373;
7,355,476;
7,272,375;
7,426,376;
7,321,324;
7,471,940;
DSP
DAC
AOUT
RFGND
FM
ANT
7,339,503; 7,339,504.
FMI
0/90
TUNE1/2
BAND
ADC
AFC
REG
CONTROL INTERFACE
XTALI
2.0~3.6V
VDD1/2
XTAL
OSC
Rev. 1.0 11/11
Copyright © 2011 by Silicon Laboratories
Si4820/24-A10
Si4820/24-A10
2
Rev. 1.0
Si4820/24-A10
TABLE OF CONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.7. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
5. Pin Descriptions: Si4820/24-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
7. Package Outline: Si4820/24-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8. PCB Land Pattern: Si4820/24-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
9. Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
9.1. Si4820/24-A10 Top Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
9.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
10. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Rev. 1.0
3
Si4820/24-A10
1. Electrical Specifications
Table 1. Recommended Operating Conditions1,2
Parameter
Symbol Test Condition
Min
2
Typ
—
Max
3.6
—
Unit
V
3
Supply Voltage
V
DD
Power Supply Powerup Rise Time
V
10
—
µs
DDRISE
Note:
1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated.
2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for
minimum VDD = 2.7 V.
3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part
initialization may become unresponsive below 2.3 V.
Table 2. DC Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
—
Typ
21.0
17.0
10
Max
—
Unit
mA
mA
µA
FM Mode
*
I
Supply Current
FM
AM/SW Mode
*
I
—
—
Supply Current
AM
Supplies and Interface
Powerdown Current
V
I
—
—
DD
DDPD
*Note: Specifications are guaranteed by characterization.
4
Rev. 1.0
Si4820/24-A10
Table 3. Reset Timing Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Min
Typ
Max
Unit
RST Pulse Width
t
100
—
—
µs
SRST
tSRST
70%
30%
RST
Figure 1. Reset Timing
Rev. 1.0
5
Si4820/24-A10
Table 4. FM Receiver Characteristics1,2
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Unit
MHz
Symbol
Test Condition
Min
64
Typ
—
Max
109
—
Input Frequency
f
RF
Sensitivity with Headphone
(S+N)/N = 26 dB
—
4.0
µV EMF
3
Network
4,5
—
—
—
—
—
—
—
—
—
15
—
10
—
—
4
5
—
—
k
LNA Input Resistance
4,5
pF
dB
LNA Input Capacitance
4,5,6,7
m = 0.3
50
105
45
60
72
45
—
—
0.1
—
—
—
—
AM Suppression
4,8
—
dBµV EMF
dB
Input IP3
4
4
±200 kHz
±400 kHz
—
Adjacent Channel Selectivity
—
dB
Alternate Channel Selectivity
5,6,7
—
mV
RMS
Audio Output Voltage
5,6,7,9,10
—
dB
Audio Mono S/N
–3 dB
–3 dB
30
—
Hz
kHz
%
Audio Frequency Response Low
Audio Frequency Response High
6,5,11
0.5
—
Audio THD
4,10
R
Single-ended
Single-ended
k
pF
Audio Output Load Resistance
Audio Output Load Capacitance
L
L
4,10
C
50
110
4
ms
Powerup/Band Switch Time
Notes:
1. Additional testing information is available in “AN569: Si4831/35/20/24-DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 98.1 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN555: Si483x-B/Si4820/24 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. Frequency is 64~109 MHz.
4. Guaranteed by characterization.
5. VEMF = 1 mV.
6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise.
7. f = 22.5 kHz.
8. |f2 – f1| > 2 MHz, f = 2 x f – f .
0
1
2
9. BAF = 300 Hz to 15 kHz, A-weighted.
10. At AOUT pin.
11. f = 75 kHz.
6
Rev. 1.0
Si4820/24-A10
Table 5. AM/SW Receiver Characteristics1, 2
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Input Frequency
Symbol
Test Condition
Medium Wave (AM)
Short Wave (SW)
(S+N)/N = 26 dB
Min
504
5.60
—
Typ
—
Max
1750
22.0
—
Unit
kHz
f
RF
—
MHz
3,4,5
30
µV EMF
Sensitivity
5
THD < 8%
—
—
300
40
54
45
0.1
—
—
—
mV
Large Signal Voltage Handling
RMS
RMS
5
∆V = 100 mVRMS, 100 Hz
dB
Power Supply Rejection Ratio
DD
3,6
—
—
mV
Audio Output Voltage
3,4,6
—
—
dB
Audio S/N
3,6
—
—
%
Audio THD
5,7
180
—
450
110
µH
ms
Antenna Inductance
5
From powerdown
—
Powerup/Band Switch Time
Notes:
1. Additional testing information is available in “AN569: Si4831/35/20/24-DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 520 kHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN555: Si483x-B/Si4820/24 Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter.
4. BAF = 300 Hz to 15 kHz, A-weighted.
5. Guaranteed by characterization.
6. VIN = 5 mVrms.
7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels.
Table 6. Reference Clock and Crystal Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Reference Clock
XTALI Supported Reference Clock
Frequencies
—
32.768
—
—
kHz
Reference Clock Frequency
Tolerance for XTALI
–100
100
ppm
Crystal Oscillator
Crystal Oscillator Frequency
—
–100
—
32.768
—
—
100
3.5
kHz
ppm
pF
Crystal Frequency Tolerance
Board Capacitance
—
Rev. 1.0
7
Si4820/24-A10
Table 7. Thermal Conditions
Parameter
Thermal Resistance*
Ambient Temperature
Junction Temperature
Symbol
Min
—
0
Typ
80
Max
—
Unit
°C/W
°C
JA
T
25
70
A
T
—
—
77
°C
J
*Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad.
Table 8. Absolute Maximum Ratings1,2
Parameter
Supply Voltage
Symbol
Value
–0.5 to 5.8
10
Unit
V
V
I
DD
IN
3
Input Current
mA
C
Operating Temperature
Storage Temperature
T
–40 to 95
–55 to 150
0.4
OP
T
C
STG
4
RF Input Level
V
PK
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2. The Si4820/24-A10 devices are high-performance RF integrated circuits with certain pins having an ESD rating of
< 2 kV HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3. For input pins RST, VOL+, VOL–, XTALO, XTALI, BAND, TUNE2, TUNE1, LNA_EN.
4. At RF input pins, FMI and AMI.
8
Rev. 1.0
Si4820/24-A10
2. Typical Application Schematic
TUNE1
R3
143k
FMI
SW
S2
VR1
100k
R6
110k
BAND
1
2
3
4
AM
C5
R4
180k
AMI
0.47u
FM
R5
67k
C5
U1
AMI
0.47u
ANT2
RFGND
T1
AOUT
C4
Optional: AM air loop antenna
0.1u
VDD
VDD
2.0 TO 3.6V
2.0 TO 3.6V
R1
100k
C1
0.1u
Y1
32.768KHz
C3
C2
22p
22p
Optional
Notes:
1. Place C4 close to VDD2 and DBYP pins.
2. All grounds connect directly to GND plane on PCB.
3. Pin 6, pin 7, and pin 23 leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in "AN555: Si483x-B/Si4820/24 Antenna,
Schematic, Layout, and Design Guidelines." Silicon Labs will evaluate the schematics and layouts for qualified
customers.
5. Pin 8 connects to the FM antenna interface and pin 12 connects to the AM antenna interface.
6. Place Si4820/24 as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.
7. Recommend keeping the AM ferrite loop antenna at least 5 cm away from the tuner chip.
8. Keep the AM ferrite loop antenna at least 5 cm away from MCU, audio AMP, and other circuits which have AM
interference.
9. Place the transformer T1 away from any sources of interference and even away from the I/O signals of the Si4820/24.
Rev. 1.0
9
Si4820/24-A10
3. Bill of Materials
Table 9. Si4820/24-A Bill of Materials
Value/Description
Component(s)
Supplier
Reset capacitor 0.1 µF, ±20%, Z5U/X7R
C1
C4
C5
B1
Murata
Murata
Murata
Murata
Kennon
Venkel
Venkel
Venkel
Venkel
Venkel
Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R
Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R
Ferrite bead 2.5 k/100 MHz
Variable resistor (POT), 100 k, ±10%
Reset timing resistor, 100 k, ±5%
Resistor, 143 k, ±1%,
VR1
R1
R3
R4
R5
R6
U1
Resistor, 180 k, ±1%
Resistor, 67 k, ±1%
Resistor,110 k, ±1%
Si4820/24-A AM/FM/SW Analog Tune Analog Display Radio Tuner
Silicon
Laboratories
Band switch
S2
Any, depends on
customer
Ferrite stick,180-450 μH
ANT1
Jiaxin
Optional Components
C2, C3
Y1
Crystal load capacitors, 22 pF, ±5%, COG
(Optional: for crystal oscillator option)
Venkel
32.768 kHz crystal (Optional: for crystal oscillator option)
Epson or
equivalent
ANT2
Air loop antenna, 10-20 μH
Various
10
Rev. 1.0
Si4820/24-A10
4. Functional Description
Si4820/24
ADC
ADC
AMI
AM
ANT
LNA
DSP
DAC
AOUT
RFGND
FM
ANT
AGC
FMI
0/90
TUNE1/2
BAND
ADC
AFC
REG
CONTROL INTERFACE
XTALI
2.0~3.6V
VDD1/2
XTAL
OSC
Figure 2. Si4820/24-A10 Functional Block Diagram
4.2. FM Receiver
4.1. Overview
The Si4820/24-A10 is the entry level mechanical-tuned The Si4820/24-A10 integrates a low noise amplifier
digital CMOS AM/FM/SW radio receiver IC that (LNA) supporting the worldwide FM broadcast band (64
integrates the complete receiver function from antenna to 109 MHz).
input to audio output. The Si4820/24-A10 extends
Pre-emphasis and de-emphasis is a technique used by
Silicon Laboratories multi-band tuner family, and further
FM broadcasters to improve the signal-to-noise ratio of
increases the ease and attractiveness of design radio
FM receivers by reducing the effects of high frequency
reception to audio devices through small size and board
interference and noise. When the FM signal is
area, minimum component count, and superior, proven
transmitted,
a
pre-emphasis filter is applied to
performance. The Si4820/24-A10 is drop-in replaceable
to the existing Si4831/35 tuner, requires a simple
application circuit, and removes any requirements for
manually tuning components during the manufacturing
process. It is a very simple product to design,
manufacture, and support across multiple product lines.
accentuate the high audio frequencies. All FM receivers
incorporate a de-emphasis filter which attenuates high
frequencies to restore a flat frequency response. Two
time constants are used in various regions. The de-
emphasis time constant can be chosen to be 50 or
75 µs.
Leveraging Silicon Laboratories' proven and patented
digital low intermediate frequency (low-IF) receiver
architecture, the Si4820/24-A10 delivers desired RF
performance and interference rejection in AM, FM, and
SW bands. The high integration and complete system
production test simplifies design-in, increases system
quality, and improves manufacturability.
Rev. 1.0
11
Si4820/24-A10
4.3. AM Receiver
4.5. Frequency Tuning
The highly integrated Si4820/24-A10 supports
A
valid channel can be found by tuning the
worldwide AM band reception from 504 to 1750 kHz potentiometer that is connected to the TUNE1 and
with five sub-bands using a digital low-IF architecture TUNE2 pin of the Si4820/24-A10 chip.
with a minimum number of external components and no
To offer easy tuning, the Si4820/24-A10 also supports a
manual alignment required. This patented architecture
station LED light. It will light up the LED if the RF signal
allows for high-precision filtering, offering excellent
quality passes the LED sensitivity threshold when tuned
selectivity and SNR with minimum variation across the
to a valid station.
AM band. Similar to the FM receiver, the Si4820/24-A10
4.6. Band Select
optimizes sensitivity and rejection of strong interferers,
allowing better reception of weak stations.
The Si4820/24-A10 supports worldwide AM band with
To offer maximum flexibility, the receiver supports a five sub-bands, US/Europe/Japan/China FM band with
wide range of ferrite loop sticks from 180–450 µH. An five sub-bands, and SW band with 16 sub-bands. For
air loop antenna is supported by using a transformer to details on band selection, refer to “AN555: Si483x-
increase the effective inductance from the air loop. B/Si4820/24 Antenna, Schematic, Layout, and Design
Using a 1:5 turn ratio inductor, the inductance is Guidelines."
increased by 25 times and easily supports all typical AM
air loop antennas, which generally vary between 10 and
4.7. Volume Control
20 µH.
The Si4820/24-A10 not only allows customers to use
the traditional PVR wheel volume control through an
external speaker amplifier, it also supports direct digital
4.4. SW Receiver
The Si4824 supports 16 short wave (SW) band volume control through pins 16 and pin 17 by using
receptions from 5.60 to 22.0 MHz. Si4824 supports volume up and down buttons. Refer to "AN555: Si483x-
extensive short wave features such as minimal discrete B/Si4820/24 Antenna, Schematic, Layout, and Design
components and no factory adjustments. The Si4824 Guidelines."
supports using the FM antenna to capture short wave
signals.
12
Rev. 1.0
Si4820/24-A10
5. Pin Descriptions: Si4820/24-A10
1
24
23
22
21
20
19
18
17
16
15
14
13
AOUT
LNA_EN
2
NC
NC
3
DBYP
VDD2
VDD1
XTALI
XTALO
TUNE1
4
TUNE2
5
BAND
6
NC
7
NC
8
FMI
VOL-
VOL+
RST
9
RFGND
10
NC
11
GND
GND
NC
12
AMI
Pin Number(s)
Name
LNA_EN
NC
Description
1
2
Enable SW external LNA for Si4824
No connect
3
TUNE1
TUNE2
BAND
NC
Frequency tuning
4
Frequency tuning
5
Band selection and de-emphasis selection
No connect. Leave floating.
6,7
8
FMI
FM RF inputs. FMI should be connected to the antenna trace.
RF ground. Connect to ground plane on PCB.
Unused. Tie these pins to GND.
9
RFGND
NC
10,11
12
13,14
AMI
AM RF input. AMI should be connected to the AM antenna.
Ground. Connect to ground plane on PCB.
GND
15
16
17
18
19
20
21
22
23
24
RST
VOL+
VOL–
XTALO
XTALI
VDD1
VDD2
DBYP
NC
Device reset (active low) input
Volume button up
Volume button down
Crystal oscillator output
Crystal oscillator input
Supply voltage. May be connected directly to battery.
Supply voltage. May be connected directly to battery.
Dedicated bypass for VDD
No connect. Leave floating
Audio output
AOUT
Rev. 1.0
13
Si4820/24-A10
6. Ordering Guide
1,2
Description
Package
Type
Operating
Temperature/Voltage
Part Number
Si4820-A10-CU AM/FM Broadcast Radio Receiver
Si4824-A10-CU AM/FM/SW Broadcast Radio Receiver
24L SSOP
Pb-free
0 to 70 °C
2.0 to 3.6 V
24L SSOP
Pb-free
0 to 70 °C
2.0 to 3.6 V
Notes:
1. Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at
25 °C with degraded specifications for VDD voltage ramped down to 2.0 V.
2. The -C suffix in the part number indicates Consumer Grade product. Please visit www.silabs.com to get more
information on product grade specifications.
14
Rev. 1.0
Si4820/24-A10
7. Package Outline: Si4820/24-A10
The 24-pin SSOP illustrates the package details for the Si4820/24-A10. Table 10 lists the values for the dimensions
shown in the illustration.
Figure 3. 24-Pin SSOP
Table 10. Package Dimensions
Dimension
Min
—
Nom
—
Max
1.75
0.25
0.30
0.25
A
A1
b
0.10
0.20
0.10
—
—
c
—
D
8.65 BSC
6.00 BSC
3.90 BSC
0.635 BSC
—
E
E1
e
L
0.40
0°
1.27
8°
θ
—
aaa
bbb
ccc
ddd
0.20
0.18
0.10
0.10
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-137, Variation AE.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification
for Small Body Components.
Rev. 1.0
15
Si4820/24-A10
8. PCB Land Pattern: Si4820/24-A10
Figure 4, “PCB Land Pattern,” illustrates the PCB land pattern details for the Si4820/24-A10-CU SSOP. Table 11
lists the values for the dimensions shown in the illustration.
Figure 4. PCB Land Pattern
Table 11. PCB Land Pattern Dimensions
Dimension
Min
Max
C
E
5.20
5.40
0.635 BSC
X1
Y1
0.35
1.55
0.45
1.75
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut, and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
16
Rev. 1.0
Si4820/24-A10
9. Top Marking
9.1. Si4820/24-A10 Top Marking
4820A10CU
YYWWTTTTTT
4824A10CU
YYWWTTTTTT
9.2. Top Marking Explanation
Mark Method:
YAG Laser
4820A10CU = Si4820-A10
4824A10CU = Si4824-A10
Line 1 Marking:
Device identifier
YY = Year
Line 2 Marking:
WW = Work week
TTTTTT = Manufacturing code
Assigned by the Assembly House.
Rev. 1.0
17
Si4820/24-A10
10. Additional Reference Resources
Contact your local sales representatives for more information or to obtain copies of the following references:
AN555: Si483x-B/Si4820/24 Antenna, Schematic, Layout, and Design Guidelines
AN569: Si4831/35/20/24-DEMO Board Test Procedure
Si4820/24-DEMO Board User’s Guide
18
Rev. 1.0
Si4820/24-A10
NOTES:
Rev. 1.0
19
Si4820/24-A10
CONTACT INFORMATION
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The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-
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Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
20
Rev. 1.0
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