HWD2171 [ETC]

低电压放大器;
HWD2171
型号: HWD2171
厂家: ETC    ETC
描述:

低电压放大器

放大器
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中文:  中文翻译
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HWD2171  
3W Audio Power Amplifier with Shutdown Mode  
General Description  
Key Specifications  
n PO at 10% THD+N, 1kHz  
The HWD2171 is a mono bridged audio power amplifier ca-  
pable of delivering 3W of continuous average power into a  
3load with less than 10% THD when powered by a 5V  
power supply (Note 1). To conserve power in portable appli-  
cations, the HWD2171’s micropower shutdown modeQ(I =  
0.6µA, typ) is activated when VDD is applied to the SHUT-  
DOWN pin.  
n
n
HWD2171LD: 3, 4load  
All other HWD2171 packages: 8loa  
3W (typ), 2.5W (typ)  
1.5W (typ)  
0.6µA (typ)  
2.0V to 5.5V  
n Shutdown current  
n Supply voltage range  
n THD at 1kHz at 1W continuous average output power  
into 8Ω  
0.5% (max)  
audio power amplifiers are designed specifically to provide  
high power, high fidelity audio output. They require  
few external components and operate on low supply volt-  
ages from 2.0V to 5.5V. Since the HWD2171 does not require  
output coupling capacitors, bootstrap capacitors, or snubber  
networks, it is ideally suited for low-power portable systems  
that require minimum volume and weight.  
Features  
n No output coupling capacitors, bootstrap capacitors, or  
snubber circuits required  
n Unity-gain stable  
n LLP, MSOP, SO, or DIP packaging  
n External gain configuration capability  
n Pin compatible with the HWD2161  
Additional HWD2171 features include thermal shutdown pro-  
tection, unity-gain stability, and external gain set.  
Note 1: An HWD2171LD that has been properly mounted to a circuit board will  
deliver 3W into 3(at 10% THD). The other package options for the HWD2171  
will deliver 1.5W into 8(at 10% THD). See the Application Information  
sections for further information concerning the HWD2171LD, HWD2171MM,  
HWD2171M, and the HWD2171N.  
Applications  
n Portable computers  
n Desktop computers  
n Low voltage audio systems  
Typical Application  
Connection Diagram  
MSOP, Small Outline, and DIP Package  
Top View  
Order Number HWD2171MM, HWD2171M, or HWD2171N  
LLP Package  
FIGURE 1. Typical Audio Amplifier Application Circuit  
Top View  
Order Number HWD2171LD  
1
Absolute Maximum Ratings (Note 2)  
θJC (typ)M08A  
θJA (typ)M08A  
θJC (typ)N08E  
θJA (typ)N08E  
θJC (typ)MUA08A  
θJA (typ)MUA08A  
θJC (typ)LDC08A  
θJA (typ)LDC08A  
35˚C/W  
140˚C/W  
37˚C/W  
107˚C/W  
Supply Voltage  
6.0V  
56˚C/W  
Supply Temperature  
Input Voltage  
−65˚C to +150˚C  
−0.3V to VDD to +0.3V  
Internally Limited  
5000V  
210˚C/W  
4.3˚C/W  
Power Dissipation (Note 4)  
ESD Susceptibility (Note 5)  
ESD Susceptibility (Note 6)  
Junction Temperature  
Soldering Information  
Small Outline Package  
Vapor Phase (60 sec.)  
Infrared (15 sec.)  
56˚C/W (Note 9)  
Operating Ratings  
250V  
150˚C  
Temperature Range  
TMIN TA TMAX  
Supply Voltage  
−40˚C TA 85˚C  
2.0V VDD 5.5V  
215˚C  
220˚C  
See AN-450 Surface Mounting and their Effects on  
Product Reliabilityfor other methods of  
soldering surface mount devices.  
Electrical Characteristics(Notes 2, 3)  
The following specifications apply for VDD = 5V and RL = 8unless otherwise specified. Limits apply for TA = 25˚C.  
HWD2171  
Sym-  
bol  
Parameter  
Conditions  
Min  
(Note 7)  
2.0  
Typical  
Limit  
(Note 7)  
5.5  
Units  
(Limits)  
V
(Note 8)  
VDD  
Supply Voltage  
IDD  
Quiescent Power Supply  
Current  
VIN = 0V, Io = 0A  
6.5  
10.0  
mA  
ISD  
VOS  
Po  
Shutdown Current  
Output Offset Voltage  
Output Power  
VPIN1 = VDD  
0.6  
5.0  
2
µA  
VIN = 0V  
50  
mV  
THD = 1%, f = 1kHz  
HWD2171LD,LR= 3(Note 10)  
HWD2171LD,LR= 4(Note 10)  
HWD2171,LR= 8(Note 10)  
2.38  
2
1.2  
W
W
THD+N = 10%, f = 1kHz  
HWD2171LD,LR= 3(Note 10)  
HWD2171LD,LR= 4(Note 10)  
HWD2171,LR= 8(Note 10)  
3
2.5  
1.5  
THD+N Total Harmonic  
Distortion+Noise  
20Hz f 20kHz, AVD = 2  
HWD2171LD,LR= 4, P = 1.6W  
0.13  
0.25  
%
O
HWD2171,LR= 8, P = 1W  
O
PSRR  
Power Supply Rejection  
Ratio  
VDD = 4.9V to 5.1V  
60  
dB  
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which  
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit  
is given, however, the typical value is a good indication of device performance.  
Note 3: All voltages are measured with respect to the ground pin, unless otherwise specified.  
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T  
, θ , and the ambient temperature T . The maximum  
A
JMAX JA  
allowable power dissipation is P  
= (T  
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the HWD2171, T  
= 150˚C. For  
JMAX  
DMAX  
JMAX  
A
JA  
the θ ’s for different packages, please see the Application Information section or the Absolute Maximum Ratings section.  
JA  
Note 5: Human body model, 100pF discharged through a 1.5kresistor.  
Note 6: Machine Model, 220pF–240pF discharged through all pins.  
Note 7: Typicals are specified at 25˚C and represent the parametric norm.  
Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).  
2
Note 9: The given θ is for an HWD2171 packaged in an LDC08A with the Exposed–DAP soldered to an exposed 1in area of 1oz printed circuit board copper.  
JA  
Note 10: When driving 3or 4loads from a 5V supply, the HWD2171LD must be mounted to a circuit board.  
2
External Components Description (Figure 1)  
Components  
Functional Description  
1.  
Ri  
Inverting input resistance that sets the closed-loop gain in conjunction with Rf. This resistor also forms a  
high pass filter with Ci at fC= 1/(2π RiCi).  
2.  
Ci  
Input coupling capacitor that blocks the DC voltage at the amplifiers input terminals. Also creates a highpass  
filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components, for an  
explanation of how to determine the value of Ci.  
3.  
4.  
Rf  
Feedback resistance that sets the closed-loop gain in conjunction with Ri.  
CS  
Supply bypass capacitor that provides power supply filtering. Refer to the Power Supply Bypassing section  
for information concerning proper placement and selection of the supply bypass capacitor.  
5.  
CB  
Bypass pin capacitor that provides half-supply filtering. Refer to the section, Proper Selection of External  
Components, for information concerning proper placement and selection of CB.  
Typical Performance Characteristics  
LD Specific Characteristics  
HWD2171LD  
THD+N vs Output Power  
HWD2171LD  
THD+N vs Frequency  
HWD2171LD  
THD+N vs Frequency  
HWD2171LD  
THD+N vs Output Power  
HWD2171LD  
Power Dissipation vs Output Power  
HWD2171LD (Note 11)  
Power Derating Curve  
Note 11: This curve shows the HWD2171LD’s thermal dissipation ability at different ambient temperatures given the exposed-DAP of the part is soldered to a plane  
of 1oz. Cu with an area given in the label of each curve. This label also designates whether the plane exists on the same (top) layer as the chip, on the bottom layer,  
or on both layers. Infinite heatsink and unattached (no heatsink) conditions are also shown.  
3
Typical Performance Characteristics  
Non-LD Specific Characteristics  
THD+N vs Frequency  
THD+N vs Frequency  
THD+N vs Frequency  
THD+N vs Output Power  
THD+N vs Output Power  
THD+N vs Output Power  
Output Power vs  
Supply Voltage  
Output Power vs  
Supply Voltage  
Output Power vs  
Supply Voltage  
4
Typical Performance Characteristics  
Non-LD Specific Characteristics (Continued)  
Output Power vs  
Load Resistance  
Power Dissipation vs  
Output Power  
Power Derating Curve  
Clipping Voltage vs  
Supply Voltage  
Frequency Response vs  
Input Capacitor Size  
Noise Floor  
Power Supply  
Rejection Ratio  
Open Loop  
Frequency Response  
Supply Current vs  
Supply Voltage  
5
supply regulation. Therefore, making the power supply  
traces as wide as possible helps maintain full output voltage  
swing.  
Application Information  
EXPOSED-DAP PACKAGE PCB MOUNTING  
CONSIDERATION  
BRIDGE CONFIGURATION EXPLANATION  
The HWD2171’s exposed-DAP (die attach paddle) package  
(LD) provides a low thermal resistance between the die and  
the PCB to which the part is mounted and soldered. This  
allows rapid heat transfer from the die to the surrounding  
PCB copper traces, ground plane, and surrounding air. The  
result is a low voltage audio power amplifier that produces  
2W at 1% THD with a 4load. This high power is achieved  
through careful consideration of necessary thermal design.  
Failing to optimize thermal design may compromise the  
HWD2171’s high power performance and activate unwanted,  
though necessary, thermal shutdown protection.  
As shown in Figure 1, the HWD2171 has two operational  
amplifiers internally, allowing for a few different amplifier  
configurations. The first amplifier’s gain is externally config-  
urable; the second amplifier is internally fixed in a unity-gain,  
inverting configuration. The closed-loop gain of the first am-  
plifier is set by selecting the ratio of Rf to Ri while the second  
amplifier’s gain is fixed by the two internal 40kresistors.  
Figure 1 shows that the output of amplifier one serves as the  
input to amplifier two, which results in both amplifiers pro-  
ducing signals identical in magnitude, but 180˚ out of phase.  
Consequently, the differential gain for the IC is  
The LD package must have its DAP soldered to a copper  
pad on the PCB. The DAP’s PCB copper pad is connected to  
a large plane of continuous unbroken copper. This plane  
forms a thermal mass, heat sink, and radiation area. Place  
the heat sink area on either outside plane in the case of a  
two-sided PCB, or on an inner layer of a board with more  
than two layers. Connect the DAP copper pad to the inner  
layer or backside copper heat sink area with 4(2x2) vias. The  
via diameter should be 0.012in-0.013in with a 1.27mm pitch.  
Ensure efficient thermal conductivity by plating through the  
vias.  
A
VD= 2 *(Rf/Ri)  
By driving the load differentially through outputs Vo1 and  
Vo2, an amplifier configuration commonly referred to as  
“bridged mode” is established. Bridged mode operation is  
different from the classical single-ended amplifier configura-  
tion where one side of its load is connected to ground.  
A bridge amplifier design has a few distinct advantages over  
the single-ended configuration, as it provides differential  
drive to the load, thus doubling output swing for a specified  
supply voltage. Four times the output power is possible as  
compared to a single-ended amplifier under the same con-  
ditions. This increase in attainable output power assumes  
that the amplifier is not current limited or clipped. In order to  
choose an amplifier’s closed-loop gain without causing ex-  
cessive clipping, please refer to the Audio Power Amplifier  
Design section.  
Best thermal performance is achieved with the largest prac-  
tical heat sink area. If the heatsink and amplifier share the  
same PCB layer, a nominal 2.5in2 area is necessary for 5V  
operation with a 4load. Heatsink areas not placed on the  
same PCB layer as the HWD2171 should be 5in2 (min) for the  
same supply voltage and load resistance. The last two area  
recommendations apply for 25˚C ambient temperature. In-  
crease the area to compensate for ambient temperatures  
above 25˚C. The HWD2171’s power de-rating curve in the  
Typical Performance Characteristics shows the maximum  
power dissipation versus temperature. An example PCB lay-  
out for the LD package is shown in the Demonstration  
Board Layout section. Further detailed and specific infor-  
mation concerning PCB layout, fabrication, and mounting an  
LD (LLP) package is available from National Semiconduc-  
tor’s Package Engineering Group under application note  
AN1187.  
Another advantage of the differential bridge output is no net  
DC voltage across load. This results from biasing VO1 and  
VO2 at the same DC voltage, in this case VDD/2 . This  
eliminates the coupling capacitor that single supply, single-  
ended amplifiers require. Eliminating an output coupling ca-  
pacitor in a single-ended configuration forces a single supply  
amplifier’s half-supply bias voltage across the load. The  
current flow created by the half-supply bias voltage in-  
creases internal IC power dissipation and my permanently  
damage loads such as speakers.  
POWER DISSIPATION  
PCB LAYOUT AND SUPPLY REGULATION  
CONSIDERATIONS FOR DRIVING 3AND 4LOADS  
Power dissipation is a major concern when designing a  
successful amplifier, whether the amplifier is bridged or  
single-ended. A direct consequence of the increased power  
delivered to the load by a bridge amplifier is an increase in  
internal power dissipation. Equation 1 states the maximum  
power dissipation point for a bridge amplifier operating at a  
given supply voltage and driving a specified output load.  
Power dissipated by a load is a function of the voltage swing  
across the load and the load’s impedance. As load imped-  
ance decreases, load dissipation becomes increasingly de-  
pendant on the interconnect (PCB trace and wire) resistance  
between the amplifier output pins and the load’s connec-  
tions. Residual trace resistance causes a voltage drop,  
which results in power dissipated in the trace and not in the  
load as desired. For example, 0.1trace resistance reduces  
the output power dissipated by a 4load from 2.0W to  
1.95W. This problem of decreased load dissipation is exac-  
erbated as load impedance decreases. Therefore, to main-  
tain the highest load dissipation and widest output voltage  
swing, PCB traces that connect the output pins to a load  
must be as wide as possible.  
PDMAX = 4*(VDD)2/(2π2RL)  
(1)  
Since the HWD2171 has two operational amplifiers in one  
package, the maximum internal power dissipation is 4 times  
that of a single-ended ampifier. Even with this substantial  
increase in power dissipation, the HWD2171 does not require  
heatsinking under most operating conditions and output  
loading. From Equation 1, assuming a 5V power supply and  
an 8load, the maximum power dissipation point is  
625 mW. The maximum power dissipation point obtained  
from Equation 1 must not be greater than the power dissi-  
pation that results from Equation 2:  
Poor power supply regulation adversely affects maximum  
output power. A poorly regulated supply’s output voltage  
decreases with increasing load current. Reduced supply  
voltage causes decreased headroom, output signal clipping,  
and reduced output power. Even with tightly regulated sup-  
plies, trace resistance creates the same effects as poor  
PDMAX = (TJMAX–TA)/θJA  
(2)  
For the SO package, θJA = 140˚C/W, for the DIP package,  
θJA = 107˚C/W, and for the MSOP package, θJA = 210˚C/W  
6
current may be greater than the typical value of 0.6µA. In  
either case, the shutdown pin should be tied to a definite  
voltage to avoid unwanted state changes.  
Application Information (Continued)  
assuming free air operation. For the LD package soldered to  
a DAP pad that expands to a copper area of 1.0in2 on a  
PCB, the HWD2171’sJAθ is 56˚C/W. TJMAX = 150˚C for the  
In many applications, a microcontroller or microprocessor  
output is used to control the shutdown circuitry which pro-  
vides a quick, smooth transition into shutdown. Another so-  
lution is to use a single-pole, single-throw switch in conjunc-  
tion with an external pull-up resistor. When the switch is  
closed, the shutdown pin is connected to ground and en-  
ables the amplifier. If the switch is open, then the external  
pull-up resistor will disable the HWD2171. This scheme guar-  
antees that the shutdown pin will not float thus preventing  
unwanted state changes.  
HWD2171. The θ can be decreased by using some form of  
JA  
heat sinking. The resultant θJA will be the summation of the  
θJC, θCS, and θSA. θJC is the junction to case of the package  
(or to the exposed DAP, as is the case with the LD package),  
θCS is the case to heat sink thermal resistance and θSA is the  
heat sink to ambient thermal resistance. By adding addi-  
tional copper area around the HWD2171, theJAθ can be  
reduced from its free air value for the SO and MSOP pack-  
ages. Increasing the copper area around the LD package  
from 1.0in2 to 2.0in2 area results in a θJA decrease to  
46˚C/W. Depending on the ambient temperature, TA, and the  
θJA, Equation 2 can be used to find the maximum internal  
power dissipation supported by the IC packaging. If the  
result of Equation 1 is greater than that of Equation 2, then  
either the supply voltage must be decreased, the load im-  
pedance increased, the θJA decreased, or the ambient tem-  
perature reduced. For the typical application of a 5V power  
supply, with an 8load, and no additional heatsinking, the  
maximum ambient temperature possible without violating the  
maximum junction temperature is approximately 61˚C pro-  
vided that device operation is around the maximum power  
dissipation point and assuming surface mount packaging.  
For the LD package in a typical application of a 5V power  
supply, with a 4load, and 1.0in2 copper area soldered to  
the exposed DAP pad, the maximum ambient temperature is  
approximately 77˚C providing device operation is around the  
maximum power dissipation point. Internal power dissipation  
is a function of output power. If typical operation is not  
around the maximum power dissipation point, the ambient  
temperature can be increased. Refer to the Typical Perfor-  
mance Characteristics curves for power dissipation infor-  
mation for different output powers and output loading.  
PROPER SELECTION OF EXTERNAL COMPONENTS  
Proper selection of external components in applications us-  
ing integrated power amplifiers is critical to optimize device  
and system performance. While the HWD2171 is tolerant of  
external component combinations, consideration to compo-  
nent values must be used to maximize overall system qual-  
ity.  
The HWD2171 is unity-gain stable which gives a designer  
maximum system flexibility. The HWD2171 should be used in  
low gain configurations to minimize THD+N values, and  
maximize the signal to noise ratio. Low gain configurations  
require large input signals to obtain a given output power.  
Input signals equal to or greater than 1 Vrms are available  
from sources such as audio codecs. Please refer to the  
section, Audio Power Amplifier Design, for a more com-  
plete explanation of proper gain selection.  
Besides gain, one of the major considerations is the closed-  
loop bandwidth of the amplifier. To a large extent, the band-  
width is dictated by the choice of external components  
shown in Figure 1. The input coupling capacitor, Ci, forms a  
first order high pass filter which limits low frequency re-  
sponse. This value should be chosen based on needed  
frequency response for a few distinct reasons.  
POWER SUPPLY BYPASSING  
Selection Of Input Capacitor Size  
As with any amplifier, proper supply bypassing is critical for  
low noise performance and high power supply rejection. The  
capacitor location on both the bypass and power supply pins  
should be as close to the HWD2171 as possible. The capacitor  
connected between the bypass pin and ground improves the  
internal bias voltage’s stability, producing improved PSRR.  
The improvements to PSRR increase as the bypass pin  
capacitor increases. Typical applications employ a 5V regu-  
lator with 10µF and a 0.1µF bypass capacitors which aid in  
supply stability. This does not eliminate the need for bypass-  
ing the supply nodes of the HWD2171 with a 1µF tantalum  
capacitor. The selection of bypass capacitors, especially CB,  
is dependent upon PSRR requirements, click and pop per-  
formance as explained in the section, Proper Selection of  
External Components, system cost, and size constraints.  
Large input capacitors are both expensive and space hungry  
for portable designs. Clearly, a certain sized capacitor is  
needed to couple in low frequencies without severe attenu-  
ation. But in many cases the speakers used in portable  
systems, whether internal or external, have little ability to  
reproduce signals below 100Hz to 150Hz. Thus, using a  
large input capacitor may not increase actual system perfor-  
mance.  
In addition to system cost and size, click and pop perfor-  
mance is effected by the size of the input coupling capacitor,  
Ci. A larger input coupling capacitor requires more charge to  
reach its quiescent DC voltage (nominally 1/2 VDD). This  
charge comes from the output via the feedback and is apt to  
create pops upon device enable. Thus, by minimizing the  
capacitor size based on necessary low frequency response,  
turn-on pops can be minimized.  
SHUTDOWN FUNCTION  
In order to reduce power consumption while not in use, the  
HWD2171 contains a shutdown pin to externally turn off the  
amplifier’s bias circuitry. This shutdown feature turns the  
amplifier off when a logic high is placed on the shutdown pin.  
The trigger point between a logic low and logic high level is  
typically half- supply. It is best to switch between ground and  
supply to provide maximum device performance. By switch-  
ing the shutdown pin to VDD, the HWD2171 supply current  
draw will be minimized in idle mode. While the device will be  
disabled with shutdown pin voltages less then VDD, the idle  
Besides minimizing the input capacitor size, careful consid-  
eration should be paid to the bypass capacitor value. Bypass  
capacitor, CB, is the most critical component to minimize  
turn-on pops since it determines how fast the HWD2171 turns  
on. The slower the HWD2171’s outputs ramp to their quiescent  
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.  
Choosing CB equal to 1.0µF along with a small value of Ci (in  
the range of 0.1µF to 0.39µF), should produce a virtually  
clickless and popless shutdown function. While the device  
will function properly, (no oscillations or motorboating), with  
CB equal to 0.1µF, the device will be much more susceptible  
7
design an amplifier with a higher differential gain, the  
HWD2171 can still be used without running into bandwidth  
limitations.  
Application Information (Continued)  
to turn-on clicks and pops. Thus, a value of CB equal to  
1.0µF is recommended in all but the most cost sensitive  
designs.  
AUDIO POWER AMPLIFIER DESIGN  
Design a 1W/8Audio Amplifier  
Given:  
Power Output  
Load Impedance  
Input Level  
1 Wrms  
8Ω  
1 Vrms  
20 kΩ  
Input Impedance  
Bandwidth  
±
100 Hz–20 kHz 0.25 dB  
A designer must first determine the minimum supply rail to  
obtain the specified output power. By extrapolating from the  
Output Power vs Supply Voltage graphs in the Typical Per-  
formance Characteristics section, the supply rail can be  
easily found. A second way to determine the minimum sup-  
ply rail is to calculate the required Vopeak using Equation 3  
and add the output voltage. Using this method, the minimum  
supply voltage would be (Vopeak + (VOD  
+ VODBOT)), where  
VOD  
and VOD  
are extrapolated frToOmP the Dropout Volt-  
TOP  
age BvOsT Supply Voltage curve in the Typical Performance  
Characteristics section.  
(3)  
Using the Output Power vs Supply Voltage graph for an 8Ω  
load, the minimum supply rail is 4.6V. But since 5V is a  
standard voltage in most applications, it is chosen for the  
supply rail. Extra supply voltage creates headroom that al-  
lows the HWD2171 to reproduce peaks in excess of 1W with-  
out producing audible distortion. At this time, the designer  
must make sure that the power supply choice along with the  
output impedance does not violate the conditions explained  
in the Power Dissipation section.  
Once the power dissipation equations have been addressed,  
the required differential gain can be determined from Equa-  
tion 4.  
(4)  
Rf/Ri = AVD/2  
(5)  
From Equation 4, the minimum AVD is 2.83; use AVD = 3.  
Since the desired input impedance was 20k, and with a  
AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an  
allocation of Ri = 20kand Rf = 30k. The final design step  
is to address the bandwidth requirements which must be  
stated as a pair of −3dB frequency points. Five times away  
from a −3dB point is 0.17dB down from passband response  
±
which is better than the required 0.25dB specified.  
fL = 100Hz/5 = 20Hz  
fH = 20kHz * 5 = 100kHz  
As stated in the External Components section, Ri in con-  
junction with Ci create a highpass filter.  
Ci 1/(2π*20k*20Hz) = 0.397µF; use 0.39µF  
The high frequency pole is determined by the product of the  
desired frequency pole, fH, and the differential gain, AVD  
.
With a AVD = 3 and fH = 100kHz, the resulting GBWP =  
150kHz which is much smaller than the HWD2171 GBWP of  
4MHz. This figure displays that if a designer has a need to  
8
Demonstration Board Layout  
Recommended LD PC Board Layout:  
Component-Side Silkscreen  
Recommended LD PC Board Layout:  
Component-Side Layout  
Recommended LD PC Board Layout:  
Bottom-Side Layout  
9
Physical Dimensions inches (millimeters) unless otherwise noted  
Order Number HWD2171LD  
Order Number HWD2171M  
10  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Order Number HWD2171MM  
11  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Order Number HWD2171N  
12  
Chengdu Sino Microelectronics System Co.,Ltd  
(Http://www.csmsc.com)  
Headquarters of CSMSC:  
Beijing Office:  
Address: 2nd floor, Building D,  
Science & Technology  
Industrial Park, 11 Gaopeng  
Avenue, Chengdu High-Tech  
Zone,Chengdu City, Sichuan  
Province, P.R.China  
Address: Room 505, No. 6 Building,  
Zijin Garden, 68 Wanquanhe  
Rd., Haidian District,  
Beijing, P.R.China  
PC: 100000  
Tel: +86-10-8265-8662  
Fax: +86-10-8265-86  
PC: 610041  
Tel: +86-28-8517-7737  
Fax: +86-28-8517-5097  
Shenzhen Office:  
Address: Room 1015, Building B,  
Zhongshen Garden,  
Caitian Rd, Futian District,  
Shenzhen, P.R.China  
PC: 518000  
Tel : +86-775-8299-5149  
+86-775-8299-5147  
+86-775-8299-6144  
Fax: +86-775-8299-6142  

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