BUX48/D [ETC]
SWITCHMODE II Series NPN Silicon Power Transistors ; SWITCHMODE II系列NPN硅功率晶体管\n
| 型号： | BUX48/D |
| 厂家： | 
ETC |
| 描述： | SWITCHMODE II Series NPN Silicon Power Transistors
|
| 文件： | 总8页 (文件大小：148K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ON Semiconductort
BUX48
SWITCHMODEt II Series
BUX48A
NPN Silicon Power Transistors
The BUX 48/BUX 48A transistors are designed for high–voltage,
high–speed, power switching in inductive circuits where fall time is
critical. They are particularly suited for line–operated
SWITCHMODE applications such as:
15 AMPERES
NPN SILICON
POWER TRANSISTORS
400 AND 450 VOLTS
V(BR)CEO
• Switching Regulators
• Inverters
850–1000 VOLTS
V(BR)CEX
• Solenoid and Relay Drivers
• Motor Controls
175 WATTS
• Deflection Circuits
• Fast Turn–Off Times
60 ns Inductive Fall Time — 25_C (Typ)
120 ns Inductive Crossover Time — 25_C (Typ)
• Operating Temperature Range –65 to +200_C
CASE 1–07
TO–204AA
(TO–3)
• 100_C Performance Specified for:
Reverse–Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltage
Leakage Currents (125_C)
MAXIMUM RATINGS
Rating
Symbol
BUX48
400
BUX48A
450
Unit
Vdc
Vdc
Vdc
Adc
Collector–Emitter Voltage
V
CEO(sus)
Collector–Emitter Voltage (V = – 1.5 V)
VCEX
850
1000
BE
Emitter Base Voltage
V
EB
7
Collector Current — Continuous
— Peak (1)
I
C
15
30
60
I
CM
— Overload
I
OI
Base Current — Continuous
— Peak (1)
I
5
20
Adc
B
I
BM
Total Power Dissipation — T = 25_C
P
175
100
1
Watts
C
D
— T = 100_C
C
Derate above 25_C
Operating and Storage Junction Temperature Range
W/_C
_C
T , T
J
–65 to +200
stg
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
1
Unit
_C/W
_C
Thermal Resistance, Junction to Case
R
θ
JC
L
Maximum Lead Temperature for Soldering Purposes:
1/8″ from Case for 5 Seconds
T
275
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.
Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
March, 2001 – Rev. 9
BUX48/D
BUX48 BUX48A
ELECTRICAL CHARACTERISTICS (T = 25_C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1)
(I = 200 mA, I = 0) L = 25 mH
V
Vdc
CEO(sus)
BUX48
BUX48A
C
B
400
450
—
—
—
—
Collector Cutoff Current
I
mAdc
mAdc
CEX
CER
EBO
(V
CEX
(V
CEX
= Rated Value, V
= Rated Value, V
= 1.5 Vdc)
= 1.5 Vdc, T = 125_C)
BE(off)
BE(off)
—
—
—
—
0.2
2
C
Collector Cutoff Current
(V = Rated V , R = 10 Ω)
I
I
T
C
T
C
= 25_C
CE
CEX
BE
—
—
—
—
0.5
3
= 125_C
Emitter Cutoff Current
(V = 5 Vdc, I = 0)
—
—
0.1
mAdc
Vdc
EB
C
Emitter–Base Breakdown Voltage
(I = 50 mA – I = 0)
V
(BR)EBO
7
—
—
E
C
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
Clamped Inductive SOA with Base Reverse Biased
I
See Figure 12
See Figure 13
S/b
RBSOA
ON CHARACTERISTICS (1)
DC Current Gain
h
FE
(I = 10 Adc, V = 5 Vdc)
BUX48
BUX48A
C
CE
8
8
—
—
—
—
(I = 8 Adc, V = 5 Vdc)
C
CE
Collector–Emitter Saturation Voltage
(I = 10 Adc, I = 2 Adc)
V
Vdc
Vdc
CE(sat)
C
B
—
—
—
—
—
—
—
—
—
—
—
—
1.5
5
2
1.5
5
2
(I = 15 Adc, I = 3 Adc)
BUX48
C
B
(I = 10 Adc, I = 2 Adc, T = 100_C)
C
B
C
(I = 8 Adc, I = 1.6 Adc)
C
B
(I = 12 Adc, I = 2.4 Adc)
BUX48A
C
B
(I = 8 Adc, I = 1.6 Adc, T = 100_C)
C
B
C
Base–Emitter Saturation Voltage
(I = 10 Adc, I = 2 Adc)
V
BE(sat)
BUX48
C
B
—
—
—
—
—
—
—
—
1.6
1.6
1.6
1.6
(I = 10 Adc, I = 2 Adc, T = 100_C)
C
B
C
(I = 8 Adc, I = 1.6 Adc)
C
B
(I = 8 Adc, I = 1.6 Adc, T = 100_C)
BUX48A
C
B
C
DYNAMIC CHARACTERISTICS
Output Capacitance
C
—
—
350
pF
ob
d
(V = 10 Vdc, I = 0, f = 1 MHz)
test
CB
E
SWITCHING CHARACTERISTICS Resistive Load (Table 1)
Delay Time
t
—
—
—
—
0.1
0.4
1.3
0.2
0.2
0.7
2
µs
I
I
= 10 A, I = 2 A
BUX48
BUX48A
C
B
Rise Time
Storage Time
Fall Time
t
r
= 8 A, I = 1.6 A
C
B
Duty Cycle = 2%, V
T = 30 µs, V = 300 V
= 5 V
BE(off)
t
s
p
CC
t
0.4
f
Inductive Load, Clamped (Table 1)
Storage Time
t
t
—
—
—
—
—
1.3
0.06
1.5
—
—
µs
sv
I
I
= 10 A
C
(T = 25_C)
C
= 2 A
BUX48
BUX48
B1
Fall Time
t
fi
Storage Time
Crossover Time
Fall Time
2.5
0.6
0.35
sv
I
I
= 8 A
= 1.6 A
A
C
t
0.3
(T = 100_C)
C
c
B1
t
0.17
fi
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle v 2%.
Vcl = 300 V, V
= 5 V, Lc = 180µH
BE(off)
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2
BUX48 BUX48A
DC CHARACTERISTICS
50
30
20
10
90%
5
3
I = 5 A
C
7.5 A
10 A
15 A
10%
10
7
1
5
0.5
0.3
3
2
V
CE
= 5 V
2
T = 25°C
C
0.1
0.1
1
1
3
5
8 10
20
30
50
0.3
0.5
1
2
3
4
I , COLLECTOR CURRENT (AMPS)
C
I , BASE CURRENT (AMPS)
B
Figure 1. DC Current Gain
Figure 2. Collector Saturation Region
5
β = 5
f
3
2
90%
2
10%
T = 25°C
J
1
1
0.7
0.7
T = 100°C
J
0.5
0.5
0.3
0.3
0.2
0.1
1
2
3
5
7
10
20
30
50
0.1
0.3
1
3
10
I , COLLECTOR CURRENT (AMPS)
C
I , COLLECTOR CURRENT (AMPS)
C
Figure 3. Collector–Emitter Saturation Voltage
Figure 4. Base–Emitter Voltage
4
10
10 k
V
CE
= 250 V
C
ib
3
10
T = 150°C
J
1 k
2
1
0
10
10
10
125°C
100°C
C
ob
100
10
75°C
REVERSE
FORWARD
0.2
T = 25°C
J
25°C
-1
10
-ā0.4
-ā0.2
0
0.4
0.6
1
10
100
1000
V
BE
, BASE-EMITTER VOLTAGE (VOLTS)
V , REVERSE VOLTAGE (VOLTS)
R
Figure 6. Capacitance
Figure 5. Collector Cutoff Region
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3
BUX48 BUX48A
Table 1. Test Conditions for Dynamic Performance
V
RBSOA AND INDUCTIVE SWITCHING
RESISTIVE SWITCHING
CEO(sus)
+10 V
22 µF
TURN–ON TIME
33
2 W
D1
2N6438
160
1
D3
+10 V
0
1
2
MR854
20
220
100
2
MM3735
I
B1
22
680 pF
I
ADJUST
I ADJUST
b2
b1
D1ăD2ăD3ăD4 1N4934
680 pF
0.1 µF
I
adjusted to
B1
PULSES
δ = 3%
dT ADJUST
b
22
obtain the forced
desired
2N3763
h
FE
D4
100
680 pF
PW Varied to Attain
= 200 mA
MR854
TURN–OFF TIME
160
I
C
33
2 W
Use inductive switching
driver as the input to
the resistive test circuit.
2N6339
D3
0.22 µF
V
CC
L
R
V
= 180 µH
= 0.05 Ω
= 20 V
V
R
= 300 V
CC
= 83 Ω
L
coil
L
R
= 25 mH, V = 10 V
CC
= 0.7 Ω
V
R
= 300 V
coil
clamp
coil
CC
ADJUSTED TO ATTAIN DESIRED I
B B1
coil
Pulse Width = 10 µs
INDUCTIVE TEST CIRCUIT
OUTPUT WAVEFORMS
RESISTIVE TEST CIRCUIT
t
1
Adjusted to
Obtain I
I
C
C
TUT
L
(I
C
)
)
R
L
TUT
coil
coil
V
pk
1
I
t Clamped
f
C(pk)
1N4937
OR
EQUIVALENT
t
t
≈
≈
1
R
L
CC
(I
1
t
INPUT
coil
L
t
1
t
f
2
coil
C
pk
SEE ABOVE FOR
V
CC
2
V
clamp
DETAILED CONDITIONS
V
V
CC
V
CE
Clamp
V
CE or
RS =
0.1 Ω
2
Test Equipment
Scope — Tektronix
475 or Equivalent
V
clamp
t
TIME
t
2
10
I pk
C
V
CE(pk)
β = 5
f
I = 10 A
C
8
6
4
2
0
90% V
90% I
C(pk)
CE(pk)
I
C
t
sv
t
rv
t
fi
t
ti
t
c
V
I
10% V
CE(pk)
CE
10%
I pk
2% I
C
90% I
C
B
B1
0
1
2
3
4
5
6
TIME
V
BE(off)
, BASE-EMITTER VOLTAGE (VOLTS)
Figure 7. Inductive Switching Measurements
Figure 8. Peak–Reverse Current
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4
BUX48 BUX48A
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained
using the standard equation from AN–222:
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage
waveforms are not in phase. Therefore, separate
measurements must be made on each waveform to
determine the total switching time. For this reason, the
following new terms have been defined.
PSWT = 1/2 VCCIC(tc)f
In general, t + t ] t . However, at lower test currents
rv
fi
c
this relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25_C and has become a benchmark
for designers. However, for designers of high frequency
converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive
switching speeds (t and t ) which are guaranteed at 100_C.
tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp
trv = Voltage Rise Time, 10–90% Vclamp
tfi = Current Fall Time, 90–10% IC
tti = Current Tail, 10–2% IC
tc = Crossover Time, 10% Vclamp to 10% IC
c
sv
An enlarged portion of the inductive switching
waveforms is shown in Figure 7 to aid in the visual identity
of these terms.
INDUCTIVE SWITCHING
1
5
3
2
0.5
T = 100°C
C
0.3
0.2
T = 100°C
C
T = 100°C
C
T = 25°C
C
T = 25°C
C
1
0.7
0.1
0.5
T = 25°C
C
0.05
0.3
0.2
t
t
0.03
0.02
c
fi
β = 5
f
β = 5
f
0.01
0.1
1
2
3
5
7
10
20
30
50
1
2
3
5
7
10
20
30
50
I , COLLECTOR CURRENT (AMPS)
C
I , COLLECTOR CURRENT (AMPS)
C
Figure 9. Storage Time, tsv
Figure 10. Crossover and Fall Times
3
3
t
sv
2
2
T = 25°C
C
I = 10 A
C
1
1
β = 5
f
t
sv
0.5
0.5
0.3
0.2
0.3
0.2
t
c
t
c
t
fi
0.1
0.1
t
fi
0.05
0.05
T = 25°C
C
I = 10 A
0.03
0.02
0.03
0.02
C
V
BE(off)
= 5 V
0.01
0.01
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
β , FORCED GAIN
f
Ib /Ib
2
1
Figure 11. Turn–Off Times versus Forced Gain
Figure 12. Turn–Off Times versus Ib2/Ib1
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5
BUX48 BUX48A
The Safe Operating Area figures shown in Figures 12 and 13
are specified for these devices under the test conditions
SAFE OPERATING AREA INFORMATION
shown.
30
FORWARD BIAS
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
10
5
breakdown. Safe operating area curves indicate I – V
C
CE
1 ms
DC
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
2
1
0.5
LIMIT ONLY
FOR TURN ON
The data of Figure 13 is based on T = 25_C; T
is
C
J(pk)
0.2
0.1
T = 25°C
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
C
t ≤ 0.7 µs
r
0.05
derated when T w 25_C. Second breakdown limitations do
C
not derate the same as thermal limitations. Allowable
current at the voltages shown on Figure 13 may be found at
any case temperature by using the appropriate curve on
Figure 15.
0.02
0.01
1
2
5
10
20
50
100 200
500 1000
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
T
may be calculated from the data in Figure 13. At
J(pk)
Figure 13. Forward Bias Safe Operating Area
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
50
40
30
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases,
with the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping, RC
snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage–current conditions during
reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 14 gives RBSOA characteristics.
BUX48A
BUX48
20
10
V
= 5 V
BE(off)
T = 100°C
I /I ≥ 5
C B1
C
0
0
200
400
600
800
1000
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 14. Reverse Bias Safe Operating Area
100
SECOND BREAKDOWN
DERATING
80
60
40
20
0
THERMAL
DERATING
0
40
80
120
160
200
T , CASE TEMPERATURE (°C)
C
Figure 15. Power Derating
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6
BUX48 BUX48A
1
D = 0.5
0.5
0.2
0.1
0.2
0.1
P
(pk)
R
(t) = r(t) R
θ
JC
= 1°C/W MAX
θ
JC
0.05
0.02
θ
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
0.05
t
1
SINGLE
PULSE
0.01
READ TIME AT t
t
2
1
SINGLE PULSE
T
- T = P
C
R (t)
θ
JC
J(pk)
(pk)
DUTY CYCLE, D = t /t
0.02
0.01
1 2
0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1000 2000
t, TIME (ms)
Figure 16. Thermal Response
OVERLOAD CHARACTERISTICS
100
OLSOA
T = 25°C
C
OLSOA applies when maximum collector current is
limited and known. A good example is a circuit where an
inductor is inserted between the transistor and the bus, which
limits the rate of rise of collector current to a known value.
If the transistor is then turned off within a specified amount
of time, the magnitude of collector current is also known.
Maximum allowable collector–emitter voltage versus
collector current is plotted for several pulse widths. (Pulse
width is defined as the time lag between the fault condition
and the removal of base drive.) Storage time of the transistor
has been factored into the curve. Therefore, with bus voltage
and maximum collector current known, Figure 17 defines
the maximum time which can be allowed for fault detection
and shutdown of base drive.
80
60
40
20
BUX48A
t = 10 µs
p
BUX48
0
100
200
300
400 450 500
V
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
Figure 17. Rated Overload Safe Operating Area
(OLSOA)
OLSOA is measured in a common–base circuit (Figure
19) which allows precise definition of collector–emitter
voltage and collector current. This is the same circuit that is
used to measure forward–bias safe operating area.
5
4
3
2
1
R
= 100 Ω
BE
500 µF
500 V
R
= 10 Ω
BE
R
BE
= 2.2 Ω
V
CC
Notes:
•
•
V
= V + V
CE CC BE
R
= 0
BE
Adjust pulsed current source
for desired I , t
C
p
V
EE
0
2
4
6
8
10
dV/dt (KV/µs)
Figure 19. Overload SOA Test Circuit
Figure 18. IC = f(dV/dt)
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7
BUX48 BUX48A
PACKAGE DIMENSIONS
TO–204AA (TO–3)
CASE 1–07
ISSUE Z
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
N
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.
C
SEATING
PLANE
–T–
E
INCHES
DIM MIN MAX
1.550 REF
MILLIMETERS
K
D 2 PL
MIN
MAX
A
B
C
D
E
G
H
K
L
39.37 REF
M
M
M
Y
0.13 (0.005)
T Q
---
0.250
0.038
0.055
1.050
---
6.35
0.97
1.40
26.67
8.51
1.09
1.77
0.335
0.043
0.070
U
–Y–
L
V
H
0.430 BSC
0.215 BSC
0.440 0.480
0.665 BSC
10.92 BSC
5.46 BSC
11.18 12.19
16.89 BSC
2
1
B
G
N
Q
U
V
---
0.151
0.830
---
3.84
21.08
0.165
0.188
4.19
4.77
1.187 BSC
30.15 BSC
0.131
3.33
–Q–
0.13 (0.005)
M
M
T Y
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC (SCILLC)
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are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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Email: ONlit–french@hibbertco.com
Email: ONlit–asia@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)
Email: ONlit@hibbertco.com
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
For additional information, please contact your local
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*Available from Germany, France, Italy, UK, Ireland
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