BUX48A [ONSEMI]
SITCHMODE II Series NPN Silicon Power Transistors; SITCHMODE II系列NPN硅功率晶体管型号: | BUX48A |
厂家: | ONSEMI |
描述: | SITCHMODE II Series NPN Silicon Power Transistors |
文件: | 总8页 (文件大小:328K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Order this document
by BUX48/D
SEMICONDUCTOR TECHNICAL DATA
15 AMPERES
NPN SILICON
POWER TRANSISTORS
400 AND 450 VOLTS
The BUX 48/BUX 48A transistors are designed for high–voltage, high–speed,
power switching in inductive circuits where fall time is critical. They are particularly
suited for line–operated SWITCHMODE applications such as:
•
•
•
•
•
Switching Regulators
Inverters
Solenoid and Relay Drivers
Motor Controls
V
(BR)CEO
850–1000 VOLTS
V
(BR)CEX
175 WATTS
Deflection Circuits
Fast Turn–Off Times
60 ns Inductive Fall Time — 25 C (Typ)
120 ns Inductive Crossover Time — 25 C (Typ)
Operating Temperature Range –65 to +200 C
100 C Performance Specified for:
Reverse–Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltage
CASE 1–07
TO–204AA
(TO–3)
Leakage Currents (125 C)
MAXIMUM RATINGS
Rating
Symbol
BUX48
400
BUX48A
450
Unit
Vdc
Vdc
Vdc
Adc
Collector–Emitter Voltage
V
CEO(sus)
Collector–Emitter Voltage (V
Emitter Base Voltage
= – 1.5 V)
VCEX
850
1000
BE
V
EB
7
Collector Current — Continuous
— Peak (1)
I
C
15
30
60
I
CM
— Overload
I
OI
Base Current — Continuous
— Peak (1)
I
5
20
Adc
B
I
BM
Total Power Dissipation — T = 25 C
P
175
100
1
Watts
C
D
— T = 100 C
C
W/ C
C
Derate above 25 C
Operating and Storage Junction Temperature Range
T , T
J
–65 to +200
stg
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
1
Unit
C/W
C
Thermal Resistance, Junction to Case
R
θJC
Maximum Lead Temperature for Soldering Purposes:
1/8″ from Case for 5 Seconds
T
L
275
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle
10%.
SWITCHMODE is a trademark of Motorola, Inc.
REV 7
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (T = 25 C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1)
V
Vdc
CEO(sus)
(I = 200 mA, I = 0) L = 25 mH
BUX48
BUX48A
400
450
—
—
—
—
C
B
Collector Cutoff Current
I
mAdc
mAdc
CEX
CER
EBO
(V
CEX
(V
CEX
= Rated Value, V
= Rated Value, V
= 1.5 Vdc)
= 1.5 Vdc, T = 125 C)
—
—
—
—
0.2
2
BE(off)
BE(off)
C
Collector Cutoff Current
(V = Rated V , R
I
I
= 10 Ω)
T
C
T
C
= 25 C
= 125 C
—
—
—
—
0.5
3
CE CEX BE
Emitter Cutoff Current
(V = 5 Vdc, I = 0)
—
—
0.1
mAdc
Vdc
EB
Emitter–Base Breakdown Voltage
(I = 50 mA – I = 0)
C
V
(BR)EBO
7
—
—
E
C
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
Clamped Inductive SOA with Base Reverse Biased
I
See Figure 12
See Figure 13
S/b
RBSOA
ON CHARACTERISTICS (1)
DC Current Gain
h
FE
(I = 10 Adc, V
= 5 Vdc)
= 5 Vdc)
BUX48
BUX48A
8
8
—
—
—
—
C
CE
(I = 8 Adc, V
CE
C
Collector–Emitter Saturation Voltage
(I = 10 Adc, I = 2 Adc)
V
Vdc
Vdc
CE(sat)
—
—
—
—
—
—
—
—
—
—
—
—
1.5
5
2
1.5
5
2
C
B
(I = 15 Adc, I = 3 Adc)
BUX48
C
B
(I = 10 Adc, I = 2 Adc, T = 100 C)
C
C
B
B
B
B
C
(I = 8 Adc, I = 1.6 Adc)
(I = 12 Adc, I = 2.4 Adc)
BUX48A
C
(I = 8 Adc, I = 1.6 Adc, T = 100 C)
C
C
Base–Emitter Saturation Voltage
(I = 10 Adc, I = 2 Adc)
V
BE(sat)
BUX48
—
—
—
—
—
—
—
—
1.6
1.6
1.6
1.6
C
B
(I = 10 Adc, I = 2 Adc, T = 100 C)
C
C
B
B
B
C
(I = 8 Adc, I = 1.6 Adc)
(I = 8 Adc, I = 1.6 Adc, T = 100 C)
C
BUX48A
C
DYNAMIC CHARACTERISTICS
Output Capacitance
C
—
—
350
pF
ob
(V
CB
= 10 Vdc, I = 0, f = 1 MHz)
test
E
SWITCHING CHARACTERISTICS Resistive Load (Table 1)
Delay Time
t
t
—
—
—
—
0.1
0.4
1.3
0.2
0.2
0.7
2
µs
d
I
I
= 10 A, I = 2 A
BUX48
BUX48A
C
C
B
Rise Time
Storage Time
Fall Time
t
r
= 8 A, I = 1.6 A
B
Duty Cycle = 2%, V
T
= 5 V
BE(off)
= 300 V
s
= 30 µs, V
CC
p
t
0.4
f
Inductive Load, Clamped (Table 1)
Storage Time
t
—
—
—
—
—
1.3
0.06
1.5
—
—
µs
sv
I
I
= 10 A
C
(T = 25 C)
C
= 2 A
BUX48
B1
Fall Time
t
fi
Storage Time
t
sv
2.5
0.6
0.35
I
I
= 8 A
= 1.6 A
C
B1
Crossover Time
Fall Time
(T = 100 C)
C
t
0.3
c
fi
BUX48A
2%.
t
0.17
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle
Vcl = 300 V, V
= 5 V, Lc = 180µH
BE(off)
3–402
Motorola Bipolar Power Transistor Device Data
DC CHARACTERISTICS
50
10
90%
30
20
5
3
I
= 5 A
7.5 A
10 A
15 A
C
10%
10
7
1
5
0.5
0.3
3
2
V
= 5 V
2
CE
T = 25°C
C
0.1
0.1
1
5
1
3
5
8
10
20
30
50
0.3
0.5
, BASE CURRENT (AMPS)
B
1
2
3
4
I
, COLLECTOR CURRENT (AMPS)
I
C
Figure 1. DC Current Gain
Figure 2. Collector Saturation Region
β
= 5
f
3
2
90%
2
10%
T
= 25°C
1
1
J
0.7
0.7
T
= 100°C
J
0.5
0.5
0.3
0.2
0.3
0.1
1
2
3
5
7
10
20
30
50
0.1
0.3
1
3
10
I
, COLLECTOR CURRENT (AMPS)
I , COLLECTOR CURRENT (AMPS)
C
C
Figure 3. Collector–Emitter Saturation Voltage
Figure 4. Base–Emitter Voltage
4
3
10
10 k
1 k
V
T
= 250 V
CE
C
ib
10
= 150°C
J
2
1
0
10
10
10
125
°
C
C
100°
C
ob
100
10
75
°
C
C
REVERSE
–0.2
FORWARD
0.2
T
= 25°C
J
25
°
–1
10
–0.4
0
0.4
0.6
1
10
V , REVERSE VOLTAGE (VOLTS)
R
100
1000
V
, BASE–EMITTER VOLTAGE (VOLTS)
BE
Figure 6. Capacitance
Figure 5. Collector Cutoff Region
3–403
Motorola Bipolar Power Transistor Device Data
Table 1. Test Conditions for Dynamic Performance
V
RBSOA AND INDUCTIVE SWITCHING
RESISTIVE SWITCHING
CEO(sus)
+10 V
22 µF
TURN–ON TIME
33
D1
2N6438
2 W
160
1
D3
+10 V
0
1
2
MR854
20
220
100
100
2
MM3735
I
22
B1
680 pF
I
ADJUST
b1
D1 D2 D3 D4 1N4934
680 pF
0.1
µ
F
I
ADJUST
dT ADJUST
b
b2
I
adjusted to
B1
obtain the forced
PULSES
= 3%
22
D4
δ
2N3763
h
desired
FE
680 pF
PW Varied to Attain
MR854
TURN–OFF TIME
160
I
= 200 mA
C
33
2 W
Use inductive switching
driver as the input to
the resistive test circuit.
2N6339
D3
0.22 µF
V
CC
L
R
V
= 180 µH
= 0.05 Ω
= 20 V
V
= 300 V
coil
coil
CC
CC
R = 83 Ω
L
L
R
= 25 mH, V
= 0.7 Ω
= 10 V
V
R
= 300 V
clamp
B B1
coil
coil
CC
ADJUSTED TO ATTAIN DESIRED I
Pulse Width = 10 µs
INDUCTIVE TEST CIRCUIT
OUTPUT WAVEFORMS
RESISTIVE TEST CIRCUIT
t
Adjusted to
1
Obtain I
L
I
C
C
TUT
(I
)
)
R
L
TUT
coil
V
C
coil
1
pk
I
t
Clamped
t
C(pk)
1N4937
OR
EQUIVALENT
t
≈
f
1
R
L
CC
1
INPUT
coil
L
(I
t
t
f
2
coil
V
C
1
SEE ABOVE FOR
pk
V
CC
t
≈
2
V
DETAILED CONDITIONS
clamp
V
V
CC
Clamp
CE
V
RS =
CE or
2
Test Equipment
Scope — Tektronix
475 or Equivalent
V
0.1
Ω
clamp
t
TIME
t
2
10
I
pk
C
V
CE(pk)
β
= 5
= 10 A
f
I
C
8
6
4
2
0
90% V
90% I
CE(pk)
C(pk)
I
t
t
t
t
ti
C
sv
rv
fi
t
c
V
I
10% V
CE(pk)
CE
10%
pk
2% I
C
I
90% I
B1
C
B
0
1
2
3
4
5
6
TIME
V
, BASE–EMITTER VOLTAGE (VOLTS)
BE(off)
Figure 7. Inductive Switching Measurements
Figure 8. Peak–Reverse Current
3–404
Motorola Bipolar Power Transistor Device Data
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times
is shown in Figure 7 to aid in the visual identity of these
terms.
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained
using the standard equation from AN–222:
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power supplies
and hammer drivers, current and voltage waveforms are not
in phase. Therefore, separate measurements must be made
on each waveform to determine the total switching time. For
this reason, the following new terms have been defined.
P
= 1/2 V I (t )f
CC C c
SWT
t . However, at lower test currents this
In general, t + t
rv fi
c
relationship may not be valid.
t
t
= Voltage Storage Time, 90% I to 10% V
B1 clamp
sv
rv
As is common with most switching transistors, resistive
switching is specified at 25 C and has become a benchmark
for designers. However, for designers of high frequency con-
verter circuits, the user oriented specifications which make
this a “SWITCHMODE” transistor are the inductive switching
= Voltage Rise Time, 10–90% V
clamp
t = Current Fall Time, 90–10% I
fi
t = Current Tail, 10–2% I
C
ti
c
C
t = Crossover Time, 10% V
to 10% I
C
clamp
An enlarged portion of the inductive switching waveforms
speeds (t and t ) which are guaranteed at 100 C.
sv
c
INDUCTIVE SWITCHING
1
5
3
2
0.5
0.3
T
= 100°C
C
T
= 100°C
C
T
= 100°C
C
0.2
T
= 25°C
C
T
= 25°C
1
C
0.7
0.1
0.5
T
= 25°C
C
0.05
0.3
0.2
t
t
0.03
0.02
c
fi
β
= 5
2
f
β
= 5
2
f
0.01
0.1
1
3
5
7
10
20
30
50
1
3
5
7
10
I , COLLECTOR CURRENT (AMPS)
C
20
30
50
I
, COLLECTOR CURRENT (AMPS)
C
Figure 9. Storage Time, t
Figure 10. Crossover and Fall Times
sv
3
2
3
2
t
sv
T
= 25°C
= 10 A
= 5
C
I
C
1
1
β
f
t
sv
0.5
0.5
0.3
0.2
0.3
0.2
t
c
t
c
t
0.1
0.1
fi
t
fi
0.05
0.05
T
= 25
= 10 A
°
C
C
0.03
0.02
0.03
0.02
I
V
C
= 5 V
9
BE(off)
0.01
0.01
0
1
2
3
4
5
6
7
8
10
0
1
2
3
4
5
6
7
8
9
10
β
, FORCED GAIN
Ib /Ib
2 1
f
Figure 11a. Turn–Off Times versus Forced Gain
Figure 11b. Turn–Off Times versus Ib /Ib
2 1
3–405
Motorola Bipolar Power Transistor Device Data
The Safe Operating Area figures shown in Figures 12 and 13 are
specified for these devices under the test conditions shown.
SAFE OPERATING AREA INFORMATION
30
FORWARD BIAS
10
5
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
1 ms
DC
down. Safe operating area curves indicate I – V
limits of
C
CE
2
1
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
0.5
LIMIT ONLY
FOR TURN ON
The data of Figure 12 is based on T = 25 C; T
is
J(pk)
C
0.2
0.1
T
= 25°C
C
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
t
≤
0.7
µs
r
0.05
when T
25 C. Second breakdown limitations do not der-
C
ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 12 may be found at any case tem-
perature by using the appropriate curve on Figure 14.
0.02
0.01
1
2
5
10
20
50
100 200
500 1000
V
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
T
may be calculated from the data in Figure 11. At high
CE
J(pk)
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations im-
posed by second breakdown.
Figure 12. Forward Bias Safe Operating Area
REVERSE BIAS
50
40
30
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage–current conditions during re-
verse biased turn–off. This rating is verified under clamped
conditions so that the device is never subjected to an ava-
lanche mode. Figure 13 gives RBSOA characteristics.
BUX48A
BUX48
20
10
V
= 5 V
BE(off)
T
I
= 100°C
/I ≥ 5
C
C B1
0
0
200
400
600
800
1000
V
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
CE
FIgure 13. Reverse Bias Safe Operating Area
100
80
SECOND BREAKDOWN
DERATING
60
40
20
0
THERMAL
DERATING
0
40
80
120
160
200
T
, CASE TEMPERATURE (°C)
C
Figure 14. Power Derating
3–406
Motorola Bipolar Power Transistor Device Data
1
D = 0.5
0.5
0.2
0.1
0.2
P
(pk)
R
(t) = r(t) R
JC
θ
θ
JC
0.1
0.05
0.02
θ
= 1°C/W MAX
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
0.05
t
SINGLE
PULSE
1
0.01
READ TIME AT t
1
t
2
SINGLE PULSE
T
– T = P
R (t)
θJC
J(pk)
C
(pk)
DUTY CYCLE, D = t /t
1 2
0.02
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1000
2000
t, TIME (ms)
Figure 15. Thermal Response
OVERLOAD CHARACTERISTICS
100
80
60
40
20
OLSOA
T
= 25°C
C
OLSOA applies when maximum collector current is limited
and known. A good example is a circuit where an inductor is
inserted between the transistor and the bus, which limits the
rate of rise of collector current to a known value. If the tran-
sistor is then turned off within a specified amount of time, the
magnitude of collector current is also known.
Maximum allowable collector–emitter voltage versus col-
lector current is plotted for several pulse widths. (Pulse width
is defined as the time lag between the fault condition and the
removal of base drive.) Storage time of the transistor has
been factored into the curve. Therefore, with bus voltage and
maximum collector current known, Figure 16 defines the
maximum time which can be allowed for fault detection and
shutdown of base drive.
BUX48A
t
= 10 µs
BUX48
p
0
100
200
300
400
450
500
V
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
CE
OLSOA is measured in a common–base circuit (Figure 18)
which allows precise definition of collector–emitter voltage
and collector current. This is the same circuit that is used to
measure forward–bias safe operating area.
Figure 16. Rated Overload Safe Operating Area
(OLSOA)
5
4
3
2
1
R
= 100 Ω
BE
500
500 V
µ
F
R
= 10 Ω
BE
R
= 2.2
Ω
V
BE
CC
Notes:
•
•
V
= V
CC
+ V
BE
CE
R
= 0
8
BE
Adjust pulsed current source
for desired I , t
C
p
V
EE
0
2
4
6
10
dV/dt (KV/µs)
Figure 18. Overload SOA Test Circuit
Figure 17. I = f(dV/dt)
C
3–407
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
A
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
C
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO–204AA OUTLINE SHALL APPLY.
SEATING
PLANE
–T–
E
K
D 2 PL
0.13 (0.005)
INCHES
MIN MAX
1.550 REF
MILLIMETERS
M
M
M
T
Q
Y
DIM
A
B
C
D
E
MIN
MAX
39.37 REF
U
–––
0.250
0.038
0.055
1.050
–––
6.35
0.97
1.40
26.67
8.51
1.09
1.77
–Y–
L
V
H
0.335
0.043
0.070
2
1
G
H
K
L
0.430 BSC
0.215 BSC
0.440 0.480
0.665 BSC
10.92 BSC
5.46 BSC
B
G
11.18
12.19
16.89 BSC
N
Q
U
V
–––
0.151
1.187 BSC
0.131
0.830
–––
3.84
30.15 BSC
3.33
21.08
4.19
–Q–
0.165
0.188
M
M
0.13 (0.005)
T Y
4.77
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
CASE 1–07
TO–204AA (TO–3)
ISSUE Z
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintendedor unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA / EUROPE: Motorola Literature Distribution;
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447
6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE (602) 244–6609
INTERNET: http://Design–NET.com
HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
BUX48/D
◊
相关型号:
BUX48LEADFREE
Power Bipolar Transistor, 15A I(C), 400V V(BR)CEO, 1-Element, NPN, Silicon, TO-3, Metal, 2 Pin, TO-3, 2 PIN
CENTRAL
©2020 ICPDF网 联系我们和版权申明