EN2360QI-E [ENPIRION]
6A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor; 6A电压模式同步降压PWM DC -DC转换器集成电感器型号: | EN2360QI-E |
厂家: | ENPIRION, INC. |
描述: | 6A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor |
文件: | 总24页 (文件大小:1531K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EN2360QI
6A Voltage Mode Synchronous Buck PWM
DC-DC Converter with Integrated Inductor
Description
Features
The EN2360QI is a Power System on a Chip
(PowerSoC) DC-DC converter. It integrates MOSFET
switches, small-signal control circuits, compensation
and an integrated inductor in an advanced 8x11x3mm
QFN module. It offers high efficiency, excellent line
and load regulation over temperature. The EN2360QI
operates over a wide input voltage range and is
specifically designed to meet the precise voltage and
fast transient requirements of high-performance
products. The EN2360QI features frequency
synchronization to an external clock, power OK
output voltage monitor, programmable soft-start along
with thermal and over current protection. The device’s
advanced circuit design, ultra high switching
frequency and proprietary integrated inductor
technology delivers high-quality, ultra compact, non-
isolated DC-DC conversion.
•
•
•
•
•
•
•
•
•
•
•
•
Integrated Inductor, MOSFETs, Controller
Wide Input Voltage Range: 4.5V – 14V
Total Solution Size Estimate: 185mm2
Frequency Synchronization (External Clock)
2% VOUT Accuracy (Over Line/Load/Temperature)
Output Enable Pin and Power OK signal
Programmable Soft-Start Time
Can be Pin Compatible with the EN2340QI (4A)
Under Voltage Lockout Protection (UVLO)
Programmable Over Current Protection
Thermal Shutdown and Short Circuit Protection
RoHS Compliant, MSL Level 3, 260oC Reflow
Applications
•
•
•
•
•
Space Constrained Applications
The Enpirion solution significantly helps in system
design and productivity by offering greatly simplified
Distributed Power Architectures
Output Voltage Ripple Sensitive Applications
Beat Frequency Sensitive Applications
board
design,
layout
and
manufacturing
requirements. In addition, overall system level
reliability is improved given the small number of
components required with the Enpirion solution.
Servers, Embedded Computing Systems,
LAN/SAN Adapter Cards, RAID Storage Systems,
Industrial Automation, Test and Measurement,
and Telecommunications
All Enpirion products are RoHS compliant and lead-
free manufacturing environment compatible.
Efficiency vs. Output Current
100
90
80
70
60
50
40
CONDITIONS
VIN = 12.0V
AVIN = 3.3V
Dual Supply
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
30
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
OUTPUT CURRENT (A)
Figure 1. Simplified Applications Circuit
Figure 2. Highest Efficiency in Smallest Solution Size
(Footprint Optimized)
www.enpirion.com
07514
September 17, 2012
Rev: A
EN2360QI
Ordering Information
Part Number
EN2360QI
EN2360QI-E
Package Markings
EN2360QI
Temp Rating (°C)
Package Description
68-pin (8mm x 11mm x 3mm) QFN T&R
QFN Evaluation Board
-40 to +85
EN2360QI
Packing and Marking Information: http://www.enpirion.com/resource-center-packing-and-marking-information.htm
Pin Assignments (Top View)
Figure 3: Pin Out Diagram (Top View)
NOTE A: NC pins are not to be electrically connected to each other or to any external signal, ground, or voltage.
However, they must be soldered to the PCB. Failure to follow this guideline may result in part malfunction or damage.
NOTE B: Shaded area highlights exposed metal below the package that is not to be mechanically or electrically
connected to the PCB. Refer to Figure 12 for details.
NOTE C: White ‘dot’ on top left is pin 1 indicator on top of the device package.
Pin Description
I/O Legend:
P=Power
G=Ground
NC=No Connect
I=Input O=Output
I/O=Input/Output
PIN
NAME I/O
FUNCTION
1-15,
25-26,
59, 64-
68
NO CONNECT – These pins may be internally connected. Do not connect them to each
NC other or to any other electrical signal. Failure to follow this guideline may result in device
damage.
NC
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 2
07514
September 17, 2012
Rev: A
EN2360QI
PIN
NAME I/O
FUNCTION
Regulated converter output. Connect these pins to the load and place output capacitor
between these pins and PGND pins 29-31.
16-24
VOUT
O
NO CONNECT – These pins are internally connected to the common switching node of the
NC(SW) NC internal MOSFETs. They are not to be electrically connected to any external signal, ground,
or voltage. Failure to follow this guideline may result in damage to the device.
27-28,
61-63
Input/Output power ground. Connect these pins to the ground electrode of the input and
29-34
35-41
PGND
PVIN
G
P
output filter capacitors. See VOUT and PVIN pin descriptions for more details.
Input power supply. Connect to input power supply. Decouple with input capacitor to
PGND pins 32-34.
Internal 3.3V linear regulator output. Connect this pin to AVIN (Pin 51) for applications
where operation from a single input voltage (PVIN) is required. If AVINO is being used,
place a 1µF, X5R, capacitor between AVINO and AGND as close as possible to AVINO.
42
AVINO
O
43
44
PG
BTMP
I/O Place a 47nF, X5R, capacitor between this pin and BTMP.
I/O See pin 43 description.
Internal regulated voltage used for the internal control circuitry. Place a 0.22µF, X5R,
capacitor between this pin and BGND.
See pin 45 description.
Digital Input. This pin accepts either an input clock to phase lock the internal switching
frequency or a S_OUT signal from another EN2360QI. Leave this pin floating if not used.
Digital Output. PWM signal is output on this pin. Leave this pin floating if not used.
Power OK is an open drain transistor (pulled up to AVIN or similar voltage) used for power
system state indication. POK is logic high when VOUT is within -10% of VOUT nominal.
Leave this pin floating if not used.
45
46
47
48
VDDB
BGND
S_IN
O
G
I
S_OUT
O
49
POK
O
Input Enable. Applying a logic high to this pin enables the output and initiates a soft-start.
Applying a logic Low disables the output. Do not leave floating.
3.3V Input power supply for the controller. Place a 0.1µF, X5R, capacitor between AVIN
and AGND.
Analog Ground. This is the ground return for the controller. All AGND pins need to be
connected to a quiet ground.
50
51
ENABLE
AVIN
I
P
G
52, 53
AGND
External Feedback Input. The feedback loop is closed through this pin. A voltage divider at
54
55
56
VFB
EAIN
SS
I/O VOUT is used to set the output voltage. The mid-point of the divider is connected to VFB. A
phase lead capacitor from this pin to VOUT is also required to stabilize the loop.
Optional Error Amplifier Input. Allows for customization of the control loop for performance
optimization. Leave this pin floating if not used.
O
Soft-start node. The soft-start capacitor is connected between this pin and AGND. The
I/O value of this capacitor determines the startup time. See Soft-Start Operation in the
Functional Description section for details.
Programmable over-current protection. Placement of a resistor on this pin will adjust the
over-current protection threshold. See Table 2 for the recommended RCLX Value to set
OCP at the nominal value specified in the Electrical Characteristics table. No current limit
protection when this pin is left floating.
57
58
RCLX
FADJ
I/O
Adding a resistor (RFS) to this pin will adjust the switching frequency of the EN2360QI. See
I/O Table 1 for suggested resistor values on RFS for various PVIN/VOUT combinations to
maximize efficiency. Do not leave this pin floating.
60
69
CGND
PGND
Test pin. For Enpirion Internal Use Only. Connect to GND plane at all times.
Not a perimeter pin. Device thermal pad to be connected to the system GND plane for heat-
sinking purposes.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 3
07514
September 17, 2012
Rev: A
EN2360QI
Absolute Maximum Ratings
CAUTION: Absolute Maximum ratings are stress ratings only. Functional operation beyond the recommended operating
conditions is not implied. Stress beyond the absolute maximum ratings may impair device life. Exposure to absolute
maximum rated conditions for extended periods may affect device reliability.
PARAMETER
Voltages on – PVIN, VOUT
SYMBOL
MIN
-0.5
MAX
15
UNITS
VIN
V
Pin Voltages – AVINO, AVIN, ENABLE, POK, S_IN, S_OUT, M/S
Pin Voltages – VFB, SS, EAIN, RCLX, FADJ
PVIN Slew Rate
2.5
-0.5
0.3
6.0
2.75
3
V
V
V/ms
°C
°C
°C
V
Storage Temperature Range
TSTG
-65
150
150
260
2000
500
Maximum Operating Junction Temperature
Reflow Temp, 10 Sec, MSL3 JEDEC J-STD-020A
ESD Rating - all pins (based on Human Body Model)
ESD Rating (based on CDM)
TJ-ABS Max
V
Recommended Operating Conditions
PARAMETER
SYMBOL
MIN
MAX
UNITS
PVIN: Input Voltage Range
PVIN
4.5
2.5
0.6
14.0
V
AVIN: Controller Supply Voltage
Output Voltage Range (Note 1)
Output Current
AVIN
VOUT
IOUT
5.5
5.0
6.0
125
85
V
V
A
Operating Junction Temperature
Operating Ambient Temperature
TJ-OP
TAMB
- 40
- 40
°C
°C
Thermal Characteristics
PARAMETER
SYMBOL
TYP
UNITS
Thermal Resistance: Junction to Ambient (0 LFM) (Note 2)
16
°C/W
θJA
Thermal Resistance: Junction to Case (0 LFM)
Thermal Shutdown
2
°C/W
°C
θJC
TSD
160
35
Thermal Shutdown Hysteresis
TSDH
°C
Note 1: RCLX resistor value may need to be raised for VOUT > VIN – 2.5V to increase current limit threshold. Contact
techsupport@enpirion.com for details.
Note 2: Based on 2oz. external copper layers and proper thermal design in line with EIJ/JEDEC JESD51-7 standard for
high thermal conductivity boards.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 4
07514
September 17, 2012
Rev: A
EN2360QI
Electrical Characteristics
NOTE: VIN=12V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.
Typical values are at TA = 25°C.
PARAMETER
Operating Input Voltage
SYMBOL
PVIN
TEST CONDITIONS
MIN TYP MAX UNITS
4.5
14.0
V
Controller Input Voltage
AVIN
2.5
5.5
V
PVIN Under Voltage
Lock-out
Voltage above which UVLO is not
asserted
UVLOPVIN
AVINUVLOR
2
V
V
AVIN Under Voltage
Lock-out rising
Voltage above which UVLO is not
asserted
2.3
AVIN Under Voltage
Lock-out falling
Voltage below which UVLO is
asserted
AVINOVLOF
IAVIN
2.1
9
V
mA
V
AVIN Pin Input Current
Internal Linear Regulator
Output Voltage
AVINO
3.3
IPVINS
IAVINS
PVIN=12V, AVIN=3.3, ENABLE=0V
PVIN=12V, AVIN=3.3, ENABLE=0V
300
50
μA
μA
Shut-Down Supply
Current
Feedback node voltage at:
VIN = 12V, ILOAD = 0, TA = 25°C
Feedback Pin Voltage
Feedback Pin Voltage
VFB
VFB
V
0.594
0.60
0.60
0.606
Feedback node voltage at:
4.5V ≤ VIN ≤ 14V
0A ≤ ILOAD ≤ 6A, TA = -40 to 85°C
V
0.588
-5
0.612
5
VFB pin input leakage current
(Note 3)
Feedback pin Input
Leakage Current
IFB
tRISE
nA
C
SS = 47nF
VOUT Rise Time
1.96
2.8
47
3.64
ms
nF
A
(Note 3, Note 4 and Note 5)
Soft Start Capacitor
Range
CSS_RANGE
Maximum Continuous
Output Current
IOUT_CONT
IOCP
0
6
Over Current Trip Level
ENABLE Logic High
ENABLE Logic Low
ENABLE Lockout Time
Reference Table 2
9
A
V
VENABLE_HIGH 4.5V ≤ VIN ≤ 14V;
VENABLE_LOW 4.5V ≤ VIN ≤ 14V;
TENLOCKOUT
1.8
0
AVIN
0.6
V
8
4
ms
ENABLE pin Input
Current
IENABLE
FSW
180kΩ pull down (Note 3)
RFADJ =3kΩ
μA
Switching Frequency
1.0
MHz
MHz
External SYNC Clock
Frequency Lock Range
FPLL_LOCK
Range of SYNC clock frequency
0.8
1.8
1.6
S_IN Threshold – Low
S_IN Threshold – High
VS_IN_LO
VS_IN_HI
S_IN Clock Logic Low Level (Note 3)
S_IN Clock Logic High Level (Note 3)
0.8
2.5
V
V
S_OUT Clock Logic Low Level
(Note 3)
S_OUT Threshold – Low
VS_OUT_LO
VS_OUT_HI
0.8
2.5
V
V
S_OUT Clock Logic High Level
(Note 3)
S_OUT Threshold –
High
1.8
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
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07514
September 17, 2012
Rev: A
EN2360QI
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Percentage of Nominal Output
Voltage for POK to be Low
POK Lower Threshold
POKLT
90
%
POK Output low Voltage
POK Output Hi Voltage
VPOKL
VPOKH
With 4mA Current Sink into POK
0.4
V
V
PVIN range: 4.5V ≤ VIN ≤ 14V
AVIN
POK pin VOH leakage
current
IPOKL
VT-LOW
VT-HIGH
IM/S
POK High (Note 3)
1
µA
V
M/S Pin Logic Low
M/S Pin Logic High
M/S Pin Input Current
Tie Pin to GND
0.8V
Pull up to AVIN Through an External
Resistor REXT
1.8V
V
100
VIN = 5.0V, REXT = 24.9kΩ
μA
Note 3: Parameter not production tested but is guaranteed by design.
Note 4: Rise time calculation begins when AVIN > VUVLO and ENABLE = HIGH.
Note 5: VOUT Rise Time Accuracy does not include soft-start capacitor tolerance.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
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07514
September 17, 2012
Rev: A
EN2360QI
Typical Performance Curves
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
CONDITIONS
VIN = 12.0V
AVIN = 3.3V
Dual Supply
CONDITIONS
VIN = 10.0V
AVIN = 3.3V
Dual Supply
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
30
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
OUTPUT CURRENT(A)
OUTPUT CURRENT(A)
Output Current De-rating
Output Current De-rating
6.0
5.0
4.0
3.0
2.0
1.0
0.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
VOUT = 3.3V
VOUT = 3.3V
CONDITIONS
VIN = 12V
CONDITIONS
VIN = 10V
TJMAX = 125 C
TJMAX = 125 C
θ
JA = 16 C/W
θJA = 16 C/W
8x11x3mm QFN
No Air Flow
8x11x3mm QFN
No Air Flow
75 76 77 78 79 80 81 82 83 84 85
AMBIENT TEMPERATURE ( C)
75 76 77 78 79 80 81 82 83 84 85
AMBIENT TEMPERATURE ( C)
No De-rating with Air Flow
No De-rating with Air Flow
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
VOUT = 3.3V
VOUT = 3.3V
CONDITIONS
VIN = 12V
CONDITIONS
VIN = 10V
TJMAX = 125 C
TJMAX = 125 C
θ
JA = 13 C/W
θJA = 13 C/W
8x11x3mm QFN
AirFlow (200fpm)
8x11x3mm QFN
AirFlow (200fpm)
75 76 77 78 79 80 81 82 83 84 85
AMBIENT TEMPERATURE ( C)
75 76 77 78 79 80 81 82 83 84 85
AMBIENT TEMPERATURE ( C)
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
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07514
September 17, 2012
Rev: A
EN2360QI
Typical Performance Curves
Output Voltage vs. Output Current
Output Voltage vs. Output Current
1.005
1.205
1.204
1.203
1.202
1.201
1.200
1.199
1.198
1.197
1.196
1.195
VIN = 8V
1.004
VIN = 8V
VIN = 10V
VIN = 12V
VIN = 10V
1.003
VIN = 12V
1.002
1.001
1.000
0.999
0.998
0.997
CONDITIONS
VOUT_NOM =1.0V
CONDITIONS
VOUT_NOM =1.2V
0.996
0.995
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
OUTPUT CURRENT(A)
OUTPUT CURRENT(A)
Output Voltage vs. Output Current
Output Voltage vs. Output Current
2.505
2.504
2.503
2.502
2.501
2.500
2.499
2.498
2.497
2.496
2.495
1.805
1.804
1.803
1.802
1.801
1.800
1.799
1.798
1.797
1.796
1.795
VIN = 8V
VIN = 10V
VIN = 12V
VIN = 8V
VIN = 10V
VIN = 12V
CONDITIONS
VOUT_NOM = 1.8V
CONDITIONS
VOUT_NOM = 2.5V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
OUTPUT CURRENT(A)
OUTPUT CURRENT(A)
Output Voltage vs. Temperature
Output Voltage vs. Temperature
1.204
1.203
1.202
1.201
1.200
1.199
1.198
1.197
1.196
1.204
1.203
1.202
1.201
1.200
1.199
1.198
1.197
1.196
CONDITIONS
VIN = 8V
VOUT_NOM =1.2V
CONDITIONS
VIN = 10V
VOUT_NOM =1.2V
LOAD = 0A
LOAD = 1A
LOAD = 2A
LOAD = 4A
LOAD = 6A
LOAD = 0A
LOAD = 1A
LOAD = 2A
LOAD = 4A
LOAD = 6A
-40
-15
10
35
60
85
-40
-15
10
35
60
85
AMBIENT TEMPERATURE ( C)
AMBIENT TEMPERATURE ( C)
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
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07514
September 17, 2012
Rev: A
EN2360QI
Typical Performance Curves
Output Voltage vs. Temperature
Output Voltage vs. Temperature
1.204
1.204
1.203
1.202
1.201
1.200
1.199
1.198
1.197
1.196
CONDITIONS
1.203
CONDITIONS
VIN = 14V
VOUT_NOM =1.2V
VIN = 12V
VOUT_NOM =1.2V
1.202
1.201
1.200
1.199
1.198
1.197
1.196
LOAD = 0A
LOAD = 1A
LOAD = 2A
LOAD = 4A
LOAD = 6A
LOAD = 0A
LOAD = 1A
LOAD = 2A
LOAD = 4A
LOAD = 6A
-40
-15
10
35
60
85
-40
-15
10
35
60
85
AMBIENT TEMPERATURE ( C)
AMBIENT TEMPERATURE ( C)
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
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07514
September 17, 2012
Rev: A
EN2360QI
Typical Performance Characteristics
Enable Startup/Shutdown Waveform (0A)
Enable Startup/Shutdown Waveform (2A)
ENABLE
ENABLE
VOUT
POK
VOUT
POK
LOAD
LOAD
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 3.3V, Load = 0A, Css = 47nF
VIN = 12V, VOUT = 3.3V, Load = 2A, Css = 47nF
CIN = 22µF(1206), COUT = 2x47µF(1206)+100µF(1206)
CIN = 22µF(1206), COUT = 2x47µF(1206)+100µF(1206)
Enable Startup/Shutdown Waveform (4A)
Enable Startup/Shutdown Waveform (6A)
ENABLE
ENABLE
VOUT
POK
VOUT
POK
LOAD
LOAD
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 3.3V, Load = 4A, Css = 47nF
VIN = 12V, VOUT = 3.3V, Load = 6A, Css = 47nF
CIN = 22µF(1206), COUT = 2x47µF(1206)+100µF(1206)
CIN = 22µF(1206), COUT = 2x47µF(1206)+100µF(1206)
Power Up Waveform (0A)
Power Up Waveform (6A)
PVIN
PVIN
VOUT
POK
VOUT
POK
LOAD
LOAD
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 3.3V, Load = 0A, Css = 47nF
VIN = 12V, VOUT = 3.3V, Load = 6A, Css = 47nF
CIN = 22µF(1206), COUT = 2x47µF(1206)+100µF(1206)
CIN = 22µF(1206), COUT = 2x47µF(1206)+100µF(1206)
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
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07514
September 17, 2012
Rev: A
EN2360QI
Typical Performance Characteristics
Output Ripple at 20MHz Bandwidth
Output Ripple at 20MHz Bandwidth
VOUT = 1V
(AC Coupled)
VOUT = 1V
(AC Coupled)
LOAD = 0A
LOAD = 6A
VOUT = 1.8V
(AC Coupled)
VOUT = 1.8V
(AC Coupled)
VOUT = 3.3V
(AC Coupled)
VOUT = 3.3V
(AC Coupled)
20mV / DIV
20mV / DIV
CONDITIONS
VIN = 12V, CIN = 22µF (1206), COUT = 2x47µF + 100µF (1206)
CONDITIONS
VIN = 12V, CIN = 22µF (1206), COUT = 2x47µF + 100µF (1206)
Output Ripple at 500MHz Bandwidth
Output Ripple at 500MHz Bandwidth
LOAD = 0A
LOAD = 6A
VOUT = 1V
VOUT = 1V
(AC Coupled)
(AC Coupled)
VOUT = 1.8V
(AC Coupled)
VOUT = 1.8V
(AC Coupled)
VOUT = 3.3V
(AC Coupled)
VOUT = 3.3V
(AC Coupled)
20mV / DIV
20mV / DIV
CONDITIONS
VIN = 12V, CIN = 22µF (1206), COUT = 2x47µF + 100µF (1206)
CONDITIONS
VIN = 12V, CIN = 22µF (1206), COUT = 2x47µF + 100µF (1206)
Load Transient from 0 to 3A (VOUT =1V)
Load Transient from 0 to 6A (VOUT =1V)
VOUT
(AC Coupled)
VOUT
(AC Coupled)
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 1.0V
CIN = 22µF (1206)
VIN = 12V, VOUT = 1.0V
CIN = 22µF (1206)
LOAD
LOAD
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
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07514
September 17, 2012
Rev: A
EN2360QI
Typical Performance Characteristics
Load Transient from 0 to 3A (VOUT =1.2V)
Load Transient from 0 to 6A (VOUT =1.2V)
VOUT
(AC Coupled)
VOUT
(AC Coupled)
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 1.2V
CIN = 22µF (1206)
VIN = 12V, VOUT = 1.2V
CIN = 22µF (1206)
LOAD
LOAD
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
Load Transient from 0 to 3A (VOUT =1.8V)
Load Transient from 0 to 6A (VOUT =1.8V)
VOUT
(AC Coupled)
VOUT
(AC Coupled)
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 1.8V
CIN = 22µF (1206)
VIN = 12V, VOUT = 1.8V
CIN = 22µF (1206)
LOAD
LOAD
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
Load Transient from 0 to 6A (VOUT =3.3V)
Load Transient from 0 to 3A (VOUT =3.3V)
VOUT
(AC Coupled)
VOUT
(AC Coupled)
CONDITIONS
CONDITIONS
VIN = 12V, VOUT = 3.3V
CIN = 22µF (1206)
VIN = 12V, VOUT = 3.3V
CIN = 22µF (1206)
LOAD
LOAD
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
COUT = 2x47µF (1206) + 100µF (1206)
Using Best Performance Configuration
www.enpirion.com
07514
September 17, 2012
Rev: A
EN2360QI
Functional Block Diagram
S_OUT S_IN
Digital I/O
BTMP
PG
PVIN
Linear
Regulator
UVLO
To PLL
AVINO
Thermal Limit
Current Limit
Gate Drive
NC(SW)
VOUT
10k
BGND
(-)
PWM
Comp
PGND
VDDB
(+)
Compensation
Network
PLL/Sawtooth
FADJ
EAIN
VFB
Generator
Compensation
Network
(-)
Error
Amp
(+)
Power
Good
Logic
POK
ENABLE
300k
180k
Soft Start
SS
Voltage Reference Generator
Band Gap
Reference
AVIN
AGND
Figure 4: Functional Block Diagram
Functional Description
frequency of the EN2360QI enables the use of
small size input and output capacitors, as well as a
wide loop bandwidth within a small foot print.
Synchronous Buck Converter
The EN2360QI is a highly integrated synchronous,
buck converter with integrated controller, power
MOSFET switches and integrated inductor. The
nominal input voltage (PVIN) range is 4.5V to 14V
and can support up to 6A of continuous output
current. The output voltage is programmed using
an external resistor divider network. The control
loop utilizes a Type IV Voltage-Mode compensation
network and maximizes on a low-noise PWM
topology. Much of the compensation circuitry is
internal to the device. However, a phase lead
capacitor is required along with the output voltage
feedback resistor divider to complete the Type IV
compensation network.. The high switching
Protection Features:
The power supply has the following protection
features:
•
•
•
Programmable Over-Current Protection
Thermal Shutdown with Hysteresis.
Under-Voltage Lockout Protection
Additional Features:
•
•
•
Switching Frequency Synchronization.
Programmable Soft-Start
Power OK Output Monitoring
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 13
07514
September 17, 2012
Rev: A
EN2360QI
In this application, place a 0.1µF, X7R, capacitor
between AVIN and AGND as close as possible to
AVIN. Refer to Figure 6 for a recommended
schematic for a dual input supply application.
Power Power Up Sequence
The EN2360QI is designed to be powered by either
a single input supply (PVIN) or two separate
supplies: one for PVIN and the other for AVIN.
For dual input supply applications, the sequencing
of the two input supplies, PVIN and AVIN, is very
important. There are two common acceptable turn-
on sequences for the device. AVIN can always
come up before PVIN. If PVIN comes up before
AVIN, then ENABLE should be toggled last, after
AVIN is asserted. During turn-off, the ENABLE
should be toggled low before AVIN or PVIN is
disabled.
Single Input Supply Application (PVIN):
47nF
0.22µF
VOUT
PG BTMP VDDB BGND
VOUT
VIN
PVIN
EN2360QI
ENABLE
RVB
4.75k
2x
F
0805
RA
CA
22
1206
F
AVINO
AVIN
RCA
F
F
VFB
SS
Enable Operation
4nF
The ENABLE pin provides a means to enable
normal operation or to shut down the device. A
logic high will enable the converter into normal
operation. When the ENABLE pin is asserted (high)
the device will undergo a normal soft-start, allowing
the output voltage to rise monotonically into
regulation. A logic low will disable the converter and
the device will power down in a controlled manner.
The ENABLE signal has to be low for at least the
ENABLE Lockout Time (8ms) in order for the
device to be re-enabled.
PGND
PGND
FADJ
RB
AGND RCLX
RFS
RCLX
Figure 5. Single Supply Applications Circuit
The EN2360QI has an internal linear regulator that
converts PVIN to 3.3V. The output of the linear
regulator is provided on the AVINO pin once the
device is enabled. AVINO should be connected to
AVIN on the EN2360QI. In this application, the
following external components are required: Place
a 1µF, X5R/X7R, capacitor between AVINO and
AGND as close as possible to AVINO. Place a
0.1µF, X5R/X7R, capacitor between AVIN and
AGND as close as possible to AVIN. In addition,
place a resistor (RVB) between VDDB and AVIN, as
shown in Figure 5. Enpirion recommends
RVB=4.75kΩ. In this application, ENABLE cannot be
asserted before PVIN. If no external enable signal
is used, tying ENABLE to AVIN meets this
requirement.
Pre-Bias Precaution
The EN2360QI is not designed to be turned on into
a pre-biased output voltage. Be sure the output
capacitors are not charged or the output of the
EN2360QI is not pre-biased when the EN2360QI is
first enabled.
Frequency Synchronization
The switching frequency of the EN2360QI can be
phase-locked to an external clock source to move
unwanted beat frequencies out of band. The
internal switching clock of the EN2360QI can be
phase locked to a clock signal applied to the S_IN
pin. An activity detector recognizes the presence of
an external clock signal and automatically phase-
locks the internal oscillator to this external clock.
Phase-lock will occur as long as the input clock
frequency is in the range of 0.8MHz to 1.6MHz.
When no clock is present, the device reverts to the
free running frequency of the internal oscillator.
Adding a resistor (RFS) to the FADJ pin will adjust
the switching frequency. If a 3kΩ resistor is placed
on FADJ the nominal switching frequency of the
EN2360QI is 1MHz. Figure 7 shows the typical RFS
resistor value versus switching frequency.
Dual Input Supply Application (PVIN and AVIN):
Figure 6: Dual Input Supply Application Circuit
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 14
07514
September 17, 2012
Rev: A
EN2360QI
threshold to when VOUT reaches its programmed
value.
Rfs vs. SW Frequency
1.800
1.600
1.400
1.200
1.000
0.800
0.600
POK Operation
The POK signal is an open drain signal (requires a
pull up resistor to AVIN or similar voltage) from the
converter indicating the output voltage is within the
specified range. Typically, a 100kꢀ or lower
resistance is used as the pull-up resistor. The POK
signal will be logic high (AVIN) when the output
voltage is above 90% of the programmed voltage
level. If the output voltage is below this point, the
POK signal will be a logic low. The POK signal can
be used to sequence down-stream converters by
tying to their enable pins.
CONDITIONS
VIN = 6V to 12V
VOUT =0.8V to 3.3V
0
2
4
6
8
10 12 14 16 18 20 22
RFS RESISTOR VALUE (kꢀ)
Figure 7. RFS versus Switching Frequency
Over-Current Protection (OCP)
The efficiency performance of the EN2360QI for
various VOUTs can be optimized by adjusting the
switching frequency. Table 1 shows recommended
RFS values for various VOUTs in order to optimize
performance of the EN2360QI.
The current limit function is achieved by sensing
the current flowing through a sense PFET. When
the sensed current exceeds the current limit, both
power FETs are turned off for the rest of the
switching cycle. If the over-current condition is
removed, the over-current protection circuit will re-
enable PWM operation. If the over-current condition
persists, the circuit will continue to protect the load.
The OCP trip point is nominally set as specified in
the Electrical Characteristics table. In the event the
OCP circuit trips consistently in normal operation,
the device enters a hiccup mode. While in hiccup
mode, the device is disabled for a short while and
restarted with a normal soft-start. The hiccup time
is approximately 32ms. This cycle can continue
indefinitely as long as the over current condition
persists.
PVIN
VOUT
1.0V
1.2V
1.8V
2.5V
3.3V
5.0V
RFS
3k
3.3k
4.87k
10k
15k
22k
12V
Table 1: Recommended RFS Values
Spread Spectrum Mode
The OCP trip point can be programmed to trip at a
lower level via the RCLX pin. The value of the
resistor connected between RCLX and ground will
determine the OCP trip point. Generally, the higher
the RCLX value, the higher the current limit
threshold. Note that if RCLX pin is left open the
output current will be unlimited and the device will
not have current limit protection. Reference Table 2
for a list of recommended resistor values on RCLX
that will set the OCP trip point at the typical value of
9A, also specified in the Electrical Characteristics
table.
The external clock frequency may be swept
between 0.8MHz and 1.6MHz at repetition rates of
up to 10 kHz in order to reduce EMI frequency
components.
Soft-Start Operation
Soft start is a means to ramp the output voltage
gradually upon start-up. The output voltage rise
time is controlled by the choice of soft-start
capacitor, which is placed between the SS pin (pin
56) and the AGND pin (pin 52).
Rise Time (ms): TR ≈ Css [nF] x 0.06
VOUT Range
RCLX Value
36.5k
During start-up of the converter, the reference
voltage to the error amplifier is linearly increased to
its final level by an internal current source of
approximately 10µA. Typical soft-start rise time is
~2.8ms with SS capacitor value of 47nF. The rise
time is measured from when VIN > VUVLOR and
ENABLE pin voltage crosses its logic high
0.6V < VOUT ≤ 0.9V
0.9V < VOUT ≤ 1.2V
1.2V < VOUT ≤ 2.0V
2.0V < VOUT ≤ 5.0V
38.4k
40.2k
45.3k
Table 2: Recommended RCLX Values vs. VOUT
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 15
07514
September 17, 2012
Rev: A
EN2360QI
Thermal Overload Protection
Input Under-Voltage Lock-Out (UVLO)
Thermal shutdown circuit will disable device
operation when the junction temperature exceeds
approximately 150ºC. After a thermal shutdown
event, when the junction temperature drops by
approx 20ºC, the converter will re-start with a
normal soft-start.
Internal circuits ensure that the converter will not
start switching until the input voltage is above the
specified minimum voltage. Hysteresis, input de-
glitch and output leading edge blanking ensures
high noise immunity and prevents false UVLO
triggers.
Application Information
Output Voltage Programming and Loop
Compensation
converter. The dielectric must be X5R or X7R
rated. Y5V or equivalent dielectric formulations
must not be used as these lose too much
capacitance with frequency, temperature and
bias voltage. In some applications, lower value
capacitors are needed in parallel with the larger,
capacitors in order to provide high frequency
The EN2360QI uses a Type IV Voltage Mode
compensation network. Type IV Voltage Mode
control is a proprietary Enpirion control scheme that
maximizes control loop bandwidth to deliver
excellent load transient responses and maintain
output regulation with pin point accuracy. For ease
of use, most of this network has been customized
and is integrated within the device package. The
EN2360QI output voltage is programmed using a
simple resistor divider network (RA and RB). The
feedback voltage at VFB is nominally 0.6V. RA is
predetermined based on Table 5 and RB can be
calculated based on Figure 10. The values
recommended for COUT, CA, RCA and REA make up
the external compensation of the EN2360QI. It will
vary with each PVIN and VOUT combination to
optimize on performance. The EN2360QI solution
can be optimized for either smallest size or highest
performance. Please see Table 5 for a list of
recommended RA, CA, RCA, REA and COUT values for
each solution.
decoupling.
Table
3
contains
a
list of
recommended input capacitors.
Recommended Input Capacitors
Description
MFG
P/N
22µF, 16V,
X5R, 10%,
1206
22µF, 16V,
X5R, 20%,
1206
Murata
GRM31CR61C226ME15
EMK316ABJ226ML-T
Taiyo Yuden
Table 3: Recommended Input Capacitors
Output Capacitor Selection
As seen from Table 5, the EN2360QI has been
optimized for use with one 100µF/1206 plus two
47µF/1206 output capacitors for best performance.
For the smallest solution size configuration see
Table 5. Low ESR ceramic capacitors are required
with X5R or X7R rated dielectric formulation. Y5V
or equivalent dielectric formulations must not
be used as these lose too much capacitance
with frequency, temperature and bias voltage.
Table 4 contains a list of recommended output
capacitors
Output ripple voltage is determined by the
aggregate output capacitor impedance. Capacitor
impedance, denoted as Z, is comprised of
capacitive reactance, effective series resistance,
ESR, and effective series inductance, ESL
reactance.
Figure 8: VOUT Resistor Divider & Compensation
Components. See Table 5 for details.
Input Capacitor Selection
Placing output capacitors in parallel reduces the
impedance and will hence result in lower ripple
voltage.
The EN2360QI requires
a
22µF/1206 input
capacitor. Low-cost, low-ESR ceramic capacitors
should be used as input capacitors for this
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 16
07514
September 17, 2012
Rev: A
EN2360QI
1
1
1
1
22µF, 10V, X5R,
20%, 0805
Panasonic
ECJ-2FB1A226M
=
+
+...+
ZTotal Z1 Z2
Zn
47µF, 6.3V, X5R,
20%, 0805
Taiyo
Yuden
JMK212BBJ476MG-T
LMK212BJ226MG-T
Recommended Output Capacitors
22µF, 10V, X5R,
20%, 0805
Taiyo
Yuden
Description
MFG
P/N
47µF, 6.3V, X5R,
20%, 1206
Murata
GRM31CR60J476ME19L
Table 4: Recommended Output Capacitors
47µF, 10V, X5R,
20%, 1206
Taiyo
Yuden
LMK316BJ476ML-T
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 17
07514
September 17, 2012
Rev: A
EN2360QI
Best Performance
Smallest Solution Size
CIN = 22µF/1206
CIN = 22µF/1206
VOUT ≤ 1.8V, COUT = 2x47µF/0805
3.3V > VOUT> 1.8V, COUT = 2x47µF/1206
COUT = 100µF/1206 + 2x47µF/1206, RA = 200kΩ
PVIN
(V)
VOUT
(V)
CA
(pF)
RCA
(kꢀ)
REA
(kꢀ)
Ripple
(mV)
Deviation
(mV)
PVIN
(V)
VOUT
(V)
RA
CA
RCA
REA
(kꢀ)
Ripple
(mV)
Deviation
(mV)
(kꢀ) (pF) (kꢀ)
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
Open
0.9V
1.2V
1.5V
1.8V
2.5V
3.3V
5.0V
0.9V
1.2V
1.5V
1.8V
2.5V
15
12
12
10
10
8.2
6.8
15
15
12
10
12
8.2
8.2
12
12
12
18
12
8.2
8.2
12
12
12
0
0
5.29
6.6
26
22
24
28
54
54
66
28
22
28
34
50
0.9V
1.2V
1.5V
1.8V
2.5V
3.3V
5.0V
0.9V
1.2V
1.5V
1.8V
2.5V
200
200
200
10
10
10
0.2
0.2
0.2
0.2
15
15
19
24
24
43
52
66
17
18
24
26
39
51
68
0
8.39
9.7
66
14V
0
14V
200 8.2
120 8.2
120 6.8
120 5.6
66
56
56
56
0
18.8
28.8
52.1
5.22
6.51
7.5
86
15
106
152
57
0.2
0.2
0.2
0.2
0.2
15
200
200
200
200
120
120
12
12
12
10
10
10
0
70
0
70
12V
10V
8V
12V
10V
8V
0
9
80
56
16.8
94
Open
Open
Open
3.3V
5.0V
0.9V
10
8.2
18
18
12
56
56
0
27.3
48.5
5.01
54
74
28
3.3V
5.0V
0.9V
15
0.2
0.2
45
56
15
114
164
69
120 6.8
8.2
200
200
200
200
120
18
18
15
12
15
Open
Open
Open
Open
1.2V
1.5V
1.8V
2.5V
18
15
12
15
8.2
12
12
12
0
0
6.11
7.3
26
28
32
44
1.2V
1.5V
1.8V
2.5V
0.2
0.2
0.2
15
19
23
29
29
67
78
94
98
0
8.13
16.8
56
Open
Open
Open
3.3V
5.0V
0.9V
12
10
22
18
12
56
56
0
27.2
42
68
84
26
3.3V
5.0V
0.9V
120
120
200
12
10
27
15
0.2
0.2
44
52
16
128
192
68
8.2
4.92
Open
Open
Open
Open
1.2V
1.5V
1.8V
2.5V
18
15
15
18
8.2
12
12
12
0
0
5.41
6.48
7.32
16.1
32
32
36
64
1.2V
1.5V
1.8V
2.5V
200
200
200
120
22
22
18
27
0.2
0.2
0.2
6.8
19
23
27
36
75
82
0
104
124
56
Open
Open
Open
3.3V
5.0V
0.9V
15
12
22
18
12
56
56
0
24
31.4
4.6
72
102
30
3.3V
5.0V
0.9V
120
120
200
22
12
33
6.8
0.2
0.2
36
40
14
152
236
70
8.2
Open
Open
Open
1.2V
1.5V
1.8V
22
18
18
8.2
12
12
0
0
0
5.59
5.88
7.12
32
36
38
1.2V
1.5V
1.8V
200
200
200
33
27
27
0.2
0.2
0.2
17
21
24
80
96
6.6V
6.6V
110
Open
Open
Open
2.5V
3.3V
0.9V
22
18
27
12
18
56
56
0
15.4
21.6
3.93
56
78
32
2.5V
3.3V
0.9V
120
120
200
39
27
68
4.3
4.3
0.2
29
28
13
140
184
80
8.2
Open
Open
1.2V
1.5V
22
22
8.2
12
0
0
4.4
38
38
1.2V
1.5V
200
200
56
47
0.2
0.2
15
17
92
5V
5V
5.91
106
Open
Open
1.8V
2.5V
22
27
12
12
0
6.91
13.6
42
76
1.8V
2.5V
200
120
39
68
0.2
0.2
19
21
124
172
56
Table 5: RA, CA, RCA and REA Values for Various PVIN/VOUT Combinations: Smallest Solution Size vs. Best
Performance. See Figure 8. Use the equation in Figure 8 to calculate RB.
Note 6: Nominal Deviation is for a 6A load transient step.
Note 7: For compensation values of output voltage in between the specified output voltages, choose compensation values
of the lower output voltage setting.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 18
07514
September 17, 2012
Rev: A
EN2360QI
Thermal Considerations
Thermal considerations are important power supply
design facts that cannot be avoided in the real
world. Whenever there are power losses in a
system, the heat that is generated by the power
dissipation needs to be accounted for. The Enpirion
PowerSoC helps alleviate some of those concerns.
η = POUT / PIN = 87% = 0.87
PIN = POUT / η
PIN ≈ 13.2W / 0.87 ≈ 22.76W
The power dissipation (PD) is the power loss in the
system and can be calculated by subtracting the
output power from the input power.
The Enpirion EN2360QI DC-DC converter is
packaged in an 8x11x3mm 68-pin QFN package.
The QFN package is constructed with copper lead
frames that have exposed thermal pads. The
exposed thermal pad on the package should be
soldered directly on to a copper ground pad on the
printed circuit board (PCB) to act as a heat sink.
The recommended maximum junction temperature
for continuous operation is 125°C. Continuous
operation above 125°C may reduce long-term
reliability. The device has a thermal overload
protection circuit designed to turn off the device at
an approximate junction temperature value of
150°C.
PD = PIN – POUT
≈ 22.76W – 19.8W ≈ 2.96W
With the power dissipation known, the temperature
rise in the device may be estimated based on the
theta JA value (θJA). The θJA parameter estimates
how much the temperature will rise in the device for
every watt of power dissipation. The EN2360QI has
a θJA value of 16 ºC/W without airflow.
Determine the change in temperature (ΔT) based
on PD and θJA.
ΔT = PD x θJA
ΔT ≈ 2.96W x 16°C/W = 47.36°C ≈ 47°C
The following example and calculations illustrate
the thermal performance of the EN2360QI.
The junction temperature (TJ) of the device is
approximately the ambient temperature (TA) plus
the change in temperature. We assume the initial
ambient temperature to be 25°C.
Example:
VIN = 12V
VOUT = 3.3V
TJ = TA + ΔT
IOUT = 6A
TJ ≈ 25°C + 47°C ≈ 72°C
First calculate the output power.
The maximum operating junction temperature
(TJMAX) of the device is 125°C, so the device can
operate at a higher ambient temperature. The
maximum ambient temperature (TAMAX) allowed can
be calculated.
POUT = 3.3V x 6A = 19.8W
Next, determine the input power based on the
efficiency (η) shown in Figure 9.
Efficiency vs. Output Current
T
AMAX = TJMAX – PD x θJA
≈ 125°C – 47°C ≈ 78°C
100
90
80
70
60
50
40
The maximum ambient temperature the device can
reach is 78°C given the input and output conditions.
Note that the efficiency will be slightly lower at
higher temperatures and this calculation is an
estimate.
CONDITIONS
VIN = 12.0V
AVIN = 3.3V
Dual Supply
VOUT = 3.3V
VOUT = 1.8V
VOUT = 1.2V
30
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
OUTPUT CURRENT (A)
Figure 9: Efficiency vs. Output Current
For VIN = 12V, VOUT = 3.3V at 6A, η ≈ 90%
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 19
07514
September 17, 2012
Rev: A
EN2360QI
Engineering Schematic
Figure 10: Engineering Schematic with Engineering Notes
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 20
07514
September 17, 2012
Rev: A
EN2360QI
Layout Recommendation
Recommendation 4: The thermal pad underneath
the component must be connected to the system
ground plane through as many vias as possible.
The drill diameter of the vias should be 0.33mm,
and the vias must have at least 1 oz. copper plating
on the inside wall, making the finished hole size
around 0.20-0.26mm. Do not use thermal reliefs or
spokes to connect the vias to the ground plane.
This connection provides the path for heat
dissipation from the converter.
Recommendation 5: Multiple small vias (the same
size as the thermal vias discussed in
recommendation 4) should be used to connect
ground terminal of the input capacitor and output
capacitors to the system ground plane. It is
preferred to put these vias along the edge of the
GND copper closest to the +V copper. These vias
connect the input/output filter capacitors to the
GND plane, and help reduce parasitic inductances
in the input and output current loops. If vias cannot
be placed under the capacitors, then place them on
both sides of the slit in the top layer PGND copper.
Recommendation 6: AVIN is the power supply for
the small-signal control circuits. It should be
connected to the input voltage at a quiet point. In
Figure 11 this connection is made at the input
capacitor.
Recommendation 7: The layer 1 metal under the
device must not be more than shown in Figure 11.
Refer to the section regarding Exposed Metal on
Bottom of Package. As with any switch-mode
DC/DC converter, try not to run sensitive signal or
control lines underneath the converter package on
other layers.
Recommendation 8: The VOUT sense point should
be just after the last output filter capacitor. Keep the
sense trace short in order to avoid noise coupling
into the node. Contact Enpirion Technical Support
for any remote sensing applications.
Recommendation 9: Keep RA, CA, RB, and RCA
close to the VFB pin (Refer to Figure 11). The VFB
pin is a high-impedance, sensitive node. Keep the
trace to this pin as short as possible. Whenever
possible, connect RB directly to the AGND (pin 52,
53) instead of going through the GND plane.
Figure 11: Top Layer Layout with Critical Components
(Top View). See Figure 10 for corresponding schematic.
This layout only shows the critical components and
top layer traces for minimum footprint in single-
supply mode with ENABLE tied to AVIN. Alternate
circuit configurations & other low-power pins need
to be connected and routed according to customer
application. Please see the Gerber files at
www.enpirion.com for details on all layers.
Recommendation 1: Input and output filter
capacitors should be placed on the same side of
the PCB, and as close to the EN2360QI package
as possible. They should be connected to the
device with very short and wide traces. Do not use
thermal reliefs or spokes when connecting the
capacitor pads to the respective nodes. The +V and
GND traces between the capacitors and the
EN2360QI should be as close to each other as
possible so that the gap between the two nodes is
minimized, even under the capacitors.
Recommendation 2: The PGND connections for
the input and output capacitors on layer 1 need to
have a slit between them in order to provide some
separation between input and output current loops.
Recommendation 3: The system ground plane
should be the first layer immediately below the
surface layer. This ground plane should be
continuous and un-interrupted below the converter
and the input/output capacitors.
Recommendation 10: Follow all the layout
recommendations as close as possible to optimize
performance. Enpirion provides schematic and
layout reviews for all customer designs. Contact
Enpirion Applications Engineering for detailed
support (techsupport@enpirion.com).
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 21
07514
September 17, 2012
Rev: A
EN2360QI
Design Considerations for Lead-Frame Based Modules
Exposed Metal on Bottom of Package
Lead-frames offer many advantages in thermal performance, in reduced electrical lead resistance, and in
overall foot print. However, they do require some special considerations.
In the assembly process lead frame construction requires that, for mechanical support, some of the lead-frame
cantilevers be exposed at the point where wire-bond or internal passives are attached. This results in several
small pads being exposed on the bottom of the package, as shown in Figure 10.
Only the thermal pad and the perimeter pads are to be mechanically or electrically connected to the PC board.
The PCB top layer under the EN2360QI should be clear of any metal (copper pours, traces, or vias) except for
the thermal pad. The “shaded-out” area in Figure 10 represents the area that should be clear of any metal on
the top layer of the PCB. Any layer 1 metal under the shaded-out area runs the risk of undesirable shorted
connections even if it is covered by soldermask.
The solder stencil aperture should be smaller than the PCB ground pad. This will prevent excess solder from
causing bridging between adjacent pins or other exposed metal under the package. Please consult the
Enpirion Manufacturing Application Note for more details and recommendations.
Figure 12: Lead-Frame exposed metal (Bottom View)
Shaded area highlights exposed metal that is not to be mechanically or electrically connected to the PCB.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 22
07514
September 17, 2012
Rev: A
EN2360QI
Recommended PCB Footprint
Figure 13: EN2360QI PCB Footprint (Top View)
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 23
07514
September 17, 2012
Rev: A
EN2360QI
Package and Mechanical
Figure 14: EN2360QI Package Dimensions (Bottom View)
Packing and Marking Information: http://www.enpirion.com/resource-center-packing-and-marking-information.htm
Contact Information
Enpirion, Inc.
Perryville III Corporate Park
53 Frontage Road - Suite 210
Hampton, NJ 08827 USA
Phone: 1.908.894.6000
Fax: 1.908.894.6090
Enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. Information furnished by Enpirion is
believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may
result from its use. Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment
used in hazardous environment without the express written authority from Enpirion
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 24
07514
September 17, 2012
Rev: A
相关型号:
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