DDR12 [EMERSON-NETWORKPOWER]
DC-DC CONVERTERS; DC- DC转换器
| 型号： | DDR12 |
| 厂家： | 
EMERSON NETWORK POWER |
| 描述： | DC-DC CONVERTERS |
| 文件： | 总3页 (文件大小：249K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DDR12 Series
D u a l o u t p u t
DC-DC CONVERTERS Tracking Dual Output
1
NEW Product
• High current dual-output power module for DDR memory
• Single compact module provides 25 A @ 2.5 V for V
ddq
supply and 8 A @ 1.25 V for V termination
tt
• Tracking dual output voltages (1.25 V @ 8 A, 2.5 V @ 25 A)
• Output voltage remote sense (only on V
)
ddq
• Sink capability for logic terminations
• Power good output signal
• Overvoltage protection
• Overcurrent protection
• Remote ON/OFF
• Available RoHS compliant
The dual output DDR12-25D08-AJ is specially designed to meet the power needs of
double data rate memory DIMMS and associated memory control logic. The Vtt
output tracks the Vddq output, while the Vtt output can sink current as required by
logic terminations. This converter offers typical efficiencies greater than 84% when
operated at 50% load or greater. This model features a wide input range as well as
trimmable output voltages. Remote sense on Vddq and remote ON/OFF facilities are
included as standard, and the converter is protected against over-current and over-
voltage conditions.
2 YEAR WARRANTY
All specifications are typical at nominal input, full load at 25 °C unless otherwise stated
SPECIFICATIONS
OUTPUT SPECIFICATIONS - V
INPUT SPECIFICATIONS - Contd.
ddq
Voltage adjustability
2.32-2.75 Vdc
2.5%
Input reflected ripple
(See Note 4)
100 mA (pk-pk)
Output setpoint accuracy Using 1% trim resistors
Remote ON/OFF
Logic compatibility
Open collector ref to -input
>2.0 Vdc
Line regulation
Low line to high line
0.1%
ON
OFF
<0.8 Vdc
Load regulation
Minimum load to full load +0%/-1.0%
Start-up time
(See Note 5)
Power up
<20 ms
<20 ms
Cross regulation
Temperature Co-efficient
0.4%
Remote ON/OFF
0.2 mV/ºC
EMC CHARACTERISTICS
Ripple and noise
(See Note 1)
5 Hz to 20 MHz
4 A/100 µs
50 mV pk-pk
Electrostatic discharge
Conducted immunity
EN61000-4-2, IEC801-2
EN61000-4-2
Transient response
(See Note 2)
3.0% deviation
GENERAL SPECIFICATIONS
Overshoot
Nominal output at turn-on
2.0% max.
Efficiency
V
V
= 2.5 V
tt = 1.25 V
84% @ full load
ddq
Undershoot
150 mV max.
Switching frequency
(Fixed)
V
V
300 kHz typ.
300 kHz typ.
ddq
tt
OUTPUT SPECIFICATIONS - V
tt
Tracking Accuracy
Measured at Converter Pins
12 mV
30 mV pk-pk
Approvals and
standards
(See Note 7)
IEC60950/EN60950
UL/cUL 1950/60950
(=V /2 - V )
ddq tt
Ripple and noise
(See Note 1)
5 Hz to 20 MHz
Material flammability
Weight
UL94V-0
34 g (1.3 oz)
TBD hours
Transient response
(See Note 2)
8 A/1 µs
3.0% deviation
MTBF
Telcordia SR-332
INPUT SPECIFICATIONS
Input voltage range
Input current
ENVIRONMENTAL SPECIFICATIONS
Thermal performance Operating ambient,
Nominal 12 V
10.8-13.2 Vdc
0 °C to +80 °C
temperature
Non-operating
Minimum load
Remote OFF
400 mA
20 mA
-40 °C to +125 °C
Input current (max.)
(See Note 3)
9 A max. @ Io max.
and Vin = 10.8 Vdc
File Name: ddr12.pdf Rev: 04 Sept 2006
DDR12 Series
D u a l o u t p u t
DC-DC CONVERTERS Tracking Dual Output
2
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
NEW Product
OUTPUT
POWER
(MAX.)
OUTPUT
CURRENT
(MIN.)
OUTPUT
CURRENT
(MAX)
INPUT
OUTPUT
VOLTAGE
EFFICIENCY
(TYP.)
LOAD
MODEL
NUMBER (10,11)
OVP
VOLTAGE
REGULATION
69 W
11 W
3.6 Vdc 2.32-2.75 Vdc
1.8 Vdc 1.16-1.375 Vdc
1.5 A
0 A
25 A
8 A
1.0%
10.8-13.2 Vdc
84%
DDR12-25D08-AJ
See Tracking Spec.
Notes
PIN CONNECTIONS
1
2
Measured as per recommended set-up. Cin = 270 µF (20 mΩ ESR max,
Cout = 3 x 560 µF (5 mΩ ESR max).
PIN NO.
J1-1
J1-2
J1-3
J1-4
J1-5
J1-6
J1-7
J2-1
J2-2
J2-3
J2-4
FUNCTION
PIN NO.
J2-5
FUNCTION
Ground
Ground
Ground
Ground
Vddq Sense -
Vddq Sense +
Vddq
Vin = 12 Vdc, Tc = 25 °C, bounded by min/max load specification with
recommended system caps.
Power Good
Output Enable
Ground
3
4
5
6
7
External input fusing is recommended.
Measured with external filter.
Start-up into resistive load.
Meets levels A and B conducted emissions with external components.
This product is only for inclusion by professional installers within other
equipment and must not be operated as a stand alone product.
Large value ceramic capacitor located close to the input pins is
recommended (TDK p/N C4532X7R1E106M).
Use of additional high quality ceramic output capacitors is recommended
in the end system.
J2-6
J2-7
Ground
J2-8
8
9
12 V Input
12 V Input
12 V Input
Vtt Ref
J2-9
J2-10
J2-11
J2-12
J2-13
J2-14
J2-15
10 TSE RoHS 5/6 (non Pb-free) compliant versions may be available on
special request, please contact your local sales representative for details.
11 NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool
at http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
Vddq
Vtt
Vddq
Vtt
Vddq
Ground
Vddq
PROTECTION
Short-circuit
Overvoltage
Overcurrent
V
V
Latching
Latching
ddq
tt
V
V
Latching
Latching
ddq
tt
CAUTION: Hazardous internal voltages and high temperatures.
Ensure that unit is not user accessible.
V
V
Latching
Fold-back
ddq
tt
RECOMMENDED SYSTEM CAPACITANCE
Input capacitance
(See Note 8)
10 µF/3 mΩ ESR max.
Output capacitance
(See Note 9)
V
tt
1680 µF/5 mΩ ESR max.
1680 µF/5 mΩ ESR max.
ddq
V
International Safety Standard Approvals
UL/cUL CAN/CSA 22.2
UL 60950 File No. E139421
TÜV Product Service (EN60950) Certificate No. B 02 12 19870 206
CB report and certificate to IEC60950
File Name: ddr12.pdf Rev: 04 Sept 2006
DDR12 Series
D u a l o u t p u t
DC-DC CONVERTERS Tracking Dual Output
3
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
NEW Product
3.000
(76.20)
0.025
(0.64) TYP.
0.050
(1.30) TYP.
J2
J1
PIN 1
PIN 7
PIN 1
PIN 15
0.025
(0.64) Typ
0.100
(2.54) Typ
0.250
(6.35)
1.100
(27.94)
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places 0.02 ( 0.51)
3 Places 0.010 ( 0.25)
Datasheet © Artesyn Technologies
® 2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. Specifications are subject to change without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein.
Please consult our website for the following items: ꢀ Application Note ꢀ Longform Data Sheet
www.artesyn.com
File Name: ddr12.pdf Rev: 04 Sept 2006
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