DDR12-25D08-AJ [ARTESYN]
Tracking Dual Output DC-DC Converters; 跟踪双输出DC-DC转换器
| 型号： | DDR12-25D08-AJ |
| 厂家： | 
ARTESYN TECHNOLOGIES |
| 描述： | Tracking Dual Output DC-DC Converters |
| 文件： | 总11页 (文件大小：306K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DDR12 Series | Tracking Dual Output
DC-DC Converters
DDR12 SERIES
Dual output
High current dual-output power module for DDR memory
Single compact module provides 25 A @ 2.5 V for V supply and 8 A @ 1.25 V for V
ddq
tt
termination
Tracking dual output voltages (1.25 V @ 8 A, 2.5 V @ 25 A)
Output voltage remote sense
Sink capability for logic terminations
Power good output signal
Overvoltage protection
Overcurrent protection
Remote ON/OFF
Available RoHS compliant
The dual output DDR12-25D08-AJ is
specifically designed to meet the power
needs of double data rate memory DIMMS
and associated memory control logic. The
Vtt output tracks the Vddq output, while the
Vtt output can sink current as required by
logic terminations.This converter offers
typical efficiencies greater than 84% when
operated at 50% load or greater. This
model features a wide input range as well
as trimmable output voltages.
Remote sense on V and remote
ddq
ON/OFF facilities are included as standard,
and the converter is protected against over-
current and over-voltage conditions.
[ 2 YEAR WARRANTY ]
1
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Stresses in excess of the maximum ratings can cause permanent damage to the device. Operation of the device is not implied at these or any
other conditions in excess of those given in the specification. Exposure to absolute maximum ratings can adversely affect device reliability.
Absolute Maximum Ratings
Characteristic
Symbol
Min
Typ
Max
Units
Notes and Conditions
V - V
in(+)
Input voltage - continuous
Input voltage - nominal
Operating temperature
V
V
T
(cont)
(nom)
-0.3
13.2
Vdc
in
in(-)
12
in
0
80
ºC
ºC
Refer to derating guidelines
and Note 1
op
Storage temperature
Output current
T
I
-40
125
storage
(max)
25
8
A
A
ddq
I
(max)
tt
All specifications are typical at V (nom), V
= 2.5 V, V = 1.25 V and full load. Tests were performed at 25 ˚C unless otherwise stated.
ddq tt
in
Input Characteristics
Characteristic
Symbol
Min
Typ
Max
Units
Notes and Conditions
Input voltage - operating
V
l
(oper)
10.8
12
13.2
Vdc
in
Input current - min. load
Input current - Quiescent
400
20
mAdc
mAdc
V
(min) - V (max), enabled
in in
in
l
(off)
Converter disabled
in
Turn On/Off
Characteristic
Symbol
Min
10
Typ
Max
10.4
10.1
Units
Notes and Conditions
Input voltage - turn on
V
(on)
(off)
10.2
Vdc
in
in
Input voltage - turn off
Turn on delay - enabled,
then power applied
V
T
9.7
9.9
5
Vdc
ms
With the enable signal asserted,
this is the time from when the
input voltage reaches the
minimum specified operating
voltage until the POWER GOOD
is asserted high
delay
(power)
Turn on delay - power
applied, then enabled
T
5
ms
V
= V (nom), then enabled.
delay
in in
(enable)
This is the time taken until the
POWER GOOD is asserted
high
Output to POWER GOOD
delay
T
delay
3
2
ms
ms
Output voltage in full regulation
to POWER GOOD asserted high
Rise time
T
rise
2
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Signal Electrical Interface
Characteristic - Signal Name Symbol
Min
Typ
Max
Units
Notes and Conditions
At remote/control ON/OFF pin
Open collector or equivalent
compatible
See Notes 2 and 3
See Application Note 133 for
Remote ON/OFF details
High level input voltage
V
V
2.0
V
Converter guaranteed on when
ih
OUTEN pin is greater than V
(max)
ih
Low level input voltage
Low level input current
0.80
V
Converter guaranteed off
when OUTEN pin is
iI
less than V (max)
il
I (max)
il
1
mA
V = 0.0 V
iI
Reliability and Service Life
Characteristic
Symbol
Min
Typ
Max
Units
Notes and Conditions
Mean time between failure
MTBF
TBD
Hours
Telcordia SR-332
3
www.artesyn.com
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Other Specifications
Characteristic
Symbol
Min
Typ
300
34
Max
Units
kHz
g
Notes and Conditions
Switching frequency
Weight
F
Fixed frequency
sw
Referenced ETSI standards:
ETS 300 019: Environmental conditions and environmental tests for telecommunications equipment
ETS 300 019: Part 1-3 (1997) Classification of environmental conditions stationary use at weather protected locations
ETS 300 019: Part 2-3 (1997) Specification of environmental tests stationary use at weather protected locations
EMC
Electromagnetic Compatibility
Phenomenon
Immunity:
ESD
Port
Standard
Test level
Criteria
Notes and conditions
Enclosure
EN61000-4-2 6 kV contact
8 kV air
As per ETS 300 386-1 table 5
Performance criteria:
NP: Normal Performance: EUT shall withstand applied test and operate within relevant limits as specified without damage.
RP: Reduced Performance: EUT shall withstand applied test. Reduced performance is permitted within specified limits, resumption to
normal performance shall occur at the cessation of the test.
LFS: Loss of Function (self recovery): EUT shall withstand applied test without damage, temporary loss of function permitted during test.
Unit will self recover to normal performance after test.
Referenced ETSI standards:
ETS 300 386-1 table 5 (1997): Public telecommunication network equipment, EMC requirements
ETS 300 132-2 (1996): Power supply interface at the input to telecommunication equipment: Part 2 operated by direct current (dc)
ETR 283 (1997): Transient voltages at interface A on telecommunication direct current (dc) power distributions
Material Ratings
Characteristic - Signal Name Notes and Conditions
Flammability rating
Material type
UL94V-0
FR4 PCB
Model Numbers
Model
Input
Output
Voltage
Output Current
(Max.)
Typical
Load
Number
Voltage
Efficiency
Regulation
2.32-2.75 Vdc
1.16-1.375 Vdc
25 A
8 A
1.0%
DDR12-25D08-AJ
10.8-13.2 Vdc
84%
See Tracking Spec.
4
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Input Characteristics
Characteristic
Symbol
Min
Typ
Max
Units
Adc
Notes and Conditions
Input current - operating
Reflected ripple current
I
7.2
in
I
35
50
mA rms
measured with external filter.
in (ripple)
mA pk-pk See Application Note 133 for
details
µF
Input capacitance - internal
filter
C
420
10
input
Input capacitance - external
filter
C
µF
Use large value ceramic
bypass
Electrical Charact. - V
O/P
ddq
Characteristic
Symbol
Min
Typ
Max
Units
Notes and Conditions
Nominal set-point voltage
Output voltage range
V
2.316
Vdc
Vdc
With no external trim resistor
For details on trimming the
output voltage see
ddq (nom)
V
2.316
2.750
ddq
Application Note 133
Output set-point accuracy
Load regulation
1.5
2.5
%
%
%
Using 1% trim resistors
measured at minimum load
+0/-1
+1/-2
Vary load with line held constant
(Voltage typically drops with load)
Line regulation
0.1
0.4
0.2
0.6
Vary line with load held constant
Cross regulation
Vary load on V with load on
tt
V
held constant
ddq
Temperature co-efficient
Ripple and noise
0.2
50
mV/ºC
mV pk-pk With recommended external
load capacitance and
5 Hz to 20 MHz bandwidth
Load transient response -
peak deviation
3
%
µs
Peak deviation for 75% to 100%
step load, di/dt = 0.04 A/µs
Load transient response -
recovery
200
Settling time to within 1% of
output setpoint voltage for
75% to 100% step load
External load capacitance
C
(V
)
1000
1680
3000
µF
Recommended 3 x 560 µF with
total ESR of 5 mΩ and additional
high-quality ceramic capacitors.
Consult factory for other capacitance
ext ddq
Overshoot
2.0
150
25
%
Nominal output at turn-on
Undershoot
mVdc
Adc
Output current - continuous
Output current - short circuit
I
ddq
1.5
I
0
A rms
Latching short circuit protection
power or enable needs to be
cycled
sc-ddq
5
www.artesyn.com
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Electrical Charact. - V O/P
tt
Characteristic
Symbol
Min
Typ
Max
Units
Notes and Conditions
Tracking accuracy
12
25
mV
Measured at converter pins
(=V
/2 - V )
ddq tt
Ripple and noise
30
mV pk-pk With recommended external
load capacitance and
5 Hz to 20 MHz bandwidth
Load transient response -
peak deviation
3
%
µs
Peak deviation for 75% to 100%
step load, di/dt = 8 A/µs
Load transient response -
recovery
200
Settling time to within 1% of
output setpoint voltage for
75% to 100% step load
External load capacitance
C
I
(V )
ext tt
1000
1680
3000
µF
Recommended 3 x 560 µF with
total ESR of 5 mΩ and additional
high-quality ceramic capacitors.
Consult factory for other capacitance
Output current - continuous
Output current - short circuit
0
8
Adc
tt
I
0
A rms
Latching short circuit protection
power or enable needs to be
cycled
sc-tt
Protection and Control Features
Characteristic
Symbol
Min
Typ
Max
Units
Notes and Conditions
Overcurrent limit inception
I
36
14
Adc
Adc
ddq
I
tt
Efficiency
Characteristic
Efficiency
Symbol
Min
Typ
Max
Units
Notes and Conditions
η
84
%
Full load
6
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
92
90
88
86
84
82
25
20
15
10
5
0 m/s (0 LFM)
Low Line
Nom Line
High Line
0.5 m/s (100 LFM)
1 m/s (200 LFM)
1.5 m/s (300 LFM)
2 m/s (400 LFM)
0
20
40
60
80
100
20
30
40
50
60
70
80
FULL LOAD CURRENT (%)
AMBIENT TEMPERATURE (ºC)
Figure 1: Thermal Derating Curve
Figure 2: Efficiency vs Load and Line
Figure 3: Typical Ripple & Noise
Channel 1: Vddq Output Ripple,
Channel 2: Vtt Output Ripple
Figure 4: Typical Power-up
Channel 1: Vddq Output Channel 2: Vtt Output
Channel 3: Power Good Signal
Figure 5: Transient Response 75-100% Vtt Source,
Rising Edge (Channel 2: Vtt Output Voltage Deviation,
Channel 4: Current load step at 1 A/div)
Figure 6: Transient Response 75-100% Vtt Source,
Falling Edge (Channel 2: Vtt Output Voltage Deviation,
Channel 4: Current load step at 1 A/div)
7
www.artesyn.com
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Figure 7: Transient Response 75-100% Vddq Rising Edge,
(Channel 1: Vddq Output Voltage Deviation,
Channel 4: Current load step at 2 A/div)
Figure 8: Transient Response 75-100% Vddq Falling Edge,
(Channel 1: Vddq Output Voltage Deviation,
Channel 4: Current load step at 2 A/div)
Figure 9: Input Ripple Voltage measurement, Vin = 12 V,
Vddq = 25 A, Vtt = 8 A (Channel 1: Vin Ripple Voltage)
8
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
3.000
(76.20)
0.025
(0.64) TYP.
0.050
(1.30) TYP.
PIN 1
PIN 7
PIN 8
PIN 22
0.025
(0.64) Typ
0.100
(2.54) Typ
0.250
(6.35)
1.100
(27.94)
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places 0.02 ( 0.51)
3 Places 0.010 ( 0.25)
Pin Connections
Pin No.
J1-1
J1-2
J1-3
J1-4
J1-5
J1-6
J1-7
J2-1
J2-2
J2-3
J2-4
Function
Power Good
Output Enable
Ground
Pin No.
J2-5
Function
Ground
Ground
Ground
Ground
Vddq Sense -
Vddq Sense +
Vddq
J2-6
J2-7
Ground
J2-8
12V Input
12V Input
12V Input
Vtt Ref.
Vtt
J2-9
J2-10
J2-11
J2-12
J2-13
J2-14
J2-15
Vddq
Vddq
Vtt
Vddq
Ground
Vddq
Figure 10: Mechanical Drawing and Pinout Table
9
www.artesyn.com
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
Note 1
For maximum reliability temperature at the Thermal Reference
Point, shown in Figure 11, should not exceed 100 ºC.
Thermal Reference Point
Note 2
The control pin is referenced to Vin-
Note 3
The DDR12 is supplied as standard with active High logic.
Control input pulled low: Unit Disabled
Control input left open: Unit Enabled
Note 4
Thermal reference set up: Unit mounted on an edge card test
board 215 mm x 115 mm. Test board mounted vertically. For
test details and recommended set-up see Application Note 133.
Figure 11: Thermal Reference Points
CAUTION: Hazardous internal voltages and high temperatures.
Ensure that unit is accessible only to trained personnel. The user
must provide the recommended fusing in order to comply with
safety approvals.
10
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
DDR12 Series | Tracking Dual Output
DC-DC Converters
NORTH AMERICA
e-mail: sales.us@artesyn.com
¤ 800 769 7274
¤+508 628 5600
EUROPEAN LOCATIONS
e-mail: sales.europe@artesyn.com
IRELAND
¤+353 24 93130
AUSTRIA
¤+43 1 80150
FAR EAST LOCATIONS
e-mail: sales.asia@artesyn.com
HONG KONG
¤+852 2699 2868
Longform Datasheet © Artesyn Technologies® 2005
The information and specifications contained in this datasheet are
believed to be correct at time of publication. However, Artesyn
Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. Specifications are subject to
change without notice. No rights under any patent accompany the
sale of any such product(s) or information contained herein.
11
www.artesyn.com
File Name: lf_ddr12.pdf Rev: 29 Nov 2005
相关型号：
DDR1212DT
DC-DC Regulated Power Supply Module, 2 Output, 3W, Hybrid, DOUBLE WIDTH, PLASTIC, DIP-24
CRANE
©2020 ICPDF网 联系我们和版权申明