DS4000CW-N/WBGA [DALLAS]
Oscillator,;
| 型号： | DS4000CW-N/WBGA |
| 厂家： | 
DALLAS SEMICONDUCTOR |
| 描述： | Oscillator, |
| 文件： | 总15页 (文件大小：171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS4000
www.maxim-ic.com
Digitally Controlled (DC)-TCXO
GENERAL DESCRIPTION
FEATURES
The DS4000 digitally controlled temperature-
compensated crystal oscillator (DC-TCXO)
features a digital temperature sensor, one fixed-
frequency temperature-compensated square-wave
output (F1), one programmable temperature-
compensated square-wave output (F2), and digital
communication for frequency tuning (SDA,
SCL).
ꢀꢁAging ≤1.0ppm per Year
ꢀꢁFrequency Stability ±1.0ppm from -40°C to
+85°C
ꢀꢁFrequency Versus Supply Stability of
±1.0ppm per Volt
−= Base Frequency is Digitally Tunable by
±6.0ppm
−= One Fixed-Frequency Output and One
(n + 1) or 2(n + 1) Division of the Base
Frequency Output
APPLICATIONS
ꢀꢁReference Oscillators in PLL Circuits
ꢀꢁGlobal Positioning Systems
ꢀꢁSATCOM
ꢀꢁTemperature Measurements from -40C° to
+85°C with 10-Bit/+0.25°C Resolution and
±3°C Accuracy
ꢀꢁTelecom
ꢀꢁ2-Wire Serial Interface
ꢀꢁWireless Base Stations
ORDERING INFORMATION
PART
TEMP RANGE PIN-PACKAGE
0°C to +70°C 12 BGA
-40°C to +85°C 12 BGA
0°C to +70°C 12 BGA
-40°C to +85°C 12 BGA
DS4000A0/WBGA
DS4000A0-N/WBGA
DS4000CW/WBGA
DS4000CW-N/WBGA
Ordering information continued at end of data sheet.
PIN CONFIGURATION
TOP VIEW
A B
C D
6
5
4
F2
SCL
SDA
A0
VCC
F1
VOSC
GND
GND
GNDOSC
3
2
1
N.C.
GND
BGA
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
1 of 15
102302
DS4000
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground
Storage Temperature Range
-0.3V to +6.0V
-55°C to +85°C
Soldering Temperature Range
See IPC/JEDEC J-STD-020A (2x max)
These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time can affect reliability.
OPERATING RANGE
RANGE
TEMP RANGE
VCC
Commercial
Industrial
0°C to +70°C
-40°C to +85°C
5V ±5%
5V ±5%
RECOMMENDED DC OPERATING CONDITIONS
(Over the operating range)
PARAMETER
Supply Voltage
SYMBOL
VCC
CONDITIONS
Notes 1, 2
Notes 1, 2
Note 1
MIN
4.75
4.75
2.2
TYP
5.0
MAX
5.25
UNITS
V
V
V
V
Oscillator Supply Voltage
Input Logic High
VOSC
VIH
5.0
5.25
VCC + 0.3
+0.8
Input Logic Low
VIL
Note 1
-0.3
DC ELECTRICAL CHARACTERISTICS
(Over the operating range)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Active Supply Current
ICC
Notes 3, 4
1.5
2
mA
Active Oscillator Supply
Current
IOSC
Notes 3, 4
3.5
5.5
mA
Output Logic High 2.4V
Output Logic Low 0.4V
Input Leakage
IOH
IOL
Note 1
Note 1
-1
mA
mA
µA
µA
ms
4
1
ILI
I/O Leakage
ILO
1
Temperature Conversion Time
tCONVT
Note 3
250
300
Note 1: All voltages are referenced to ground.
Note 2: For ±10% operating range, contact factory.
Note 3: Typical values are at +25°C and nominal supplies.
Note 4: These parameters are measured with the outputs disabled.
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DS4000
AC ELECTRICAL CHARACTERISTICS: TCXO
(Over the operating range)
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
F1
F2
Output Frequency
CMOS (Note 5)
10
20
MHz
Frequency Stability vs.
Temperature
Voltage
Aging
ppm
ppm/V
ppm/Yr
∆F/TA
∆F/V
∆F/Yr
-1.0
+1.0
F1, F2 Rise and Fall Time, 10%
to 90%
tR, tF
4
ns
Max Output Capacitive Load
Duty Cycle
CL
tW / t
φN
10
60
pF
%
40
50
Phase Noise F1 Output, 10kHz
Note 6
-130
dBc/Hz
Note 5: F1 is the base frequency as defined by the package markings. F2 is a programmable frequency output. The output frequency of F2 is
derived from the base frequency, F1, by programming the F2 frequency select register and duty cycle (DC) bit in the TCXO control
register. The minimum output frequency is F1 / (28 + 1) with DC = 0 and F1 / [2 x (28 + 1)] with DC = 1.
Note 6: 10MHz, 5V, +25°C with one of the two outputs enabled.
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DS4000
AC ELECTRICAL CHARACTERISTICS: 2-WIRE SERIAL INTERFACE
(VCC = 4.75 to 5.25V, TA = -40°C to +85°C)
PARAMETER
SYMBOL
CONDITION
Fast mode
MIN
TYP MAX
UNITS
0
0
400
100
SCL Clock Frequency
fSCL
kHz
Standard mode
Fast mode
1.3
4.7
0.6
Bus Free Time Between
a STOP and START
Condition
tBUF
µs
Standard mode
Fast mode (Note 7)
Hold Time (Repeated)
START Condition
tHD:STA
µs
µs
µs
Standard mode (Note 7)
Fast mode
4.0
1.3
Low Period of SCL
Clock
tLOW
Standard mode
4.7
Fast mode
0.6
4.0
0.6
High Period of SCL
Clock
tHIGH
Standard mode
Fast mode
Setup Time for a
Repeated START
Condition
tSU:STA
tHD:DAT
tSU:DAT
µs
µs
ns
Standard mode
4.7
Fast mode (Note 8)
Standard mode (Note 8)
0
0
0.9
0.9
Data Hold Time
Data Setup Time
Fast mode (Note 9)
100
250
Standard mode (Note 9)
Fast mode (Note 9)
Standard mode (Note 9)
Fast mode (Note 10)
Standard mode (Note 10)
Fast mode
20 + 0.1CB
20 + 0.1CB
20 + 0.1CB
20 + 0.1CB
0.6
300
1000
300
Rise Time of Both SDA
and SCL
tR
tF
ns
ns
µs
Fall Time of Both SDA
and SCL
1000
Setup Time for STOP
Condition
tSU:STO
Standard mode
4.0
Capacitive Load for
Each Bus Line
CB
CI
Note 10
400
pF
pF
Input Capacitance
5
Note 7: After this period, the first clock pulse is generated.
Note 8: The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 9: A fast-mode device can be used in a standard mode system, but the requirement tSU:DAT >250ns must then be met. This is automatically
the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL
signal, it must output the next data bit to the SDA line tRMAX + tSU:DAT (1000 + 250 = 1250ns) before the SCL line is released.
Note 10: CB: Total capacitance of one bus line in pF.
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DS4000
Figure 1. Timing Diagram
PIN DESCRIPTIONS
PIN
NAME
FUNCTION
1, 11, 12
GND
N.C.
Ground. DC power is provided to the device on these pins.
No Connection
2
3
GNDOSC
Oscillator Ground. DC power is provided to the oscillator on these pins.
4
5
A0
2-Wire Slave Address Input. This pin is used to configure the slave address.
2-Wire Serial-Data Input/Output. SDA is the input/output pin for the 2-wire
serial interface. The SDA pin is open drain and requires an external pullup
resistor.
2-Wire Serial-Clock Input. SCL is used to synchronize data movement on the
serial interface. The SCL pin is open drain and requires an external pullup
resistor.
DC-TCXO Frequency Output
Power Supply. DC power is provided to the device on these pins.
DC-TCXO Frequency Output
SDA
6
SCL
7
8
9
F2
VCC
F1
Oscillator Power Supply. DC power is provided to the oscillator on these
pins.
10
VOSC
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DS4000
DETAILED DESCRIPTION
The DS4000 digitally controlled temperature-compensated crystal oscillator (DC-TCXO) features a
digital temperature sensor, one fixed-frequency temperature-compensated square-wave output (F1), one
programmable temperature-compensated square-wave output (F2), and digital communication for
frequency tuning (SDA, SCL).
Figure 2. Block Diagram
VOSC
VCC
TEMPERATURE-
COMPENSATED
CRYSTAL
F2
F1
OSCILLATOR
SDA
SCL
A0
2-WIRE
SERIAL
INTERFACE
DIGITAL
TEMPERATURE
SENSOR
DS4000
GNDOSC
GND
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DS4000
Temperature-Compensated Crystal Oscillator
The DS4000 can either function as a standalone TCXO or as a digitally controlled TCXO. When used as
a standalone TCXO, the only requirements needed to function properly are power, ground, and an output.
However, the 2-wire interface must be used to tune (push and pull) the crystal.
The DS4000 is capable of supplying two different outputs, F1 and F2.
1) F1 is the base frequency of the crystal unit inside of the device. The output type is a CMOS square
wave.
2) F2 is a programmable frequency output. The frequency select register can program this output to an
integer division of the base (F1) frequency. The duty cycle (DC) bit determines if the output is an
n + 1 or a 2(n + 1) division of F1.
F2 FREQUENCY SELECT REGISTER (FSR) (5Dh)
BIT 7
D7
BIT 6
D6
BIT 5
D5
BIT 4
D4
BIT 3
D3
BIT 2
D2
BIT 1
D1
BIT 0
D0
F2 = F1 / (FSR value + 1); with DC = 0
F2 = F1 / [2 x (FSR value + 1)]; with DC = 1
TCXO CONTROL REGISTER (60h)
BIT 7
X
BIT 6
X
BIT 5
X
BIT 4
X
BIT 3
F2OE
BIT 2
F1OE
BIT 1
FT
BIT 0
DC
DC, Duty Cycle Bit: If 50% duty cycle is desired, then this bit must be set to logic 1. The default
condition at power-up is logic 0.
FT: This bit must be programmed by the user to a 0.
F1OE, F1 Output Enable Bit: This bit allows the user to disable/enable the F1 output.
F2OE, F2 Output Enable Bit: This bit allows the user to disable/enable the F2 output.
7 of 15
DS4000
Digital Tuning the Base Crystal Frequency
When using the 2-wire interface for tuning the base frequency, the frequency tuning register is used. The
frequency tuning register contains two’s complement data. The data is used to add or subtract an offset
from the crystal loading register. When the tuning register is programmed with a value, the next
temperature-update cycle sums the programmed value with the factory-compensated value. This allows
the user/system to digitally control the base frequency by a microcontroller using the 2-wire protocol.
FREQUENCY TUNING REGISTER (66h)
BIT 7
SIGN
BIT 6
FO6
BIT 5
FO5
BIT 4
FO4
BIT 3
FO3
BIT 2
FO2
BIT 1
FO1
BIT 0
FO0
FOS[6:0], Frequency Offset: These bits are used to tune the base crystal frequency. Each bit represents
approximately 0.05ppm and, therefore, for a value of 07FH, pushes or pulls the base frequency by
approximately 6.35ppm.
SIGN, Sign Bit: This bit is used to determine whether to add or subtract the frequency offset from the
crystal loading.
Table 1. Frequency Tuning Relationship
CALCULATED
FREQUENCY OFFSET
(ppm)
DIGITAL DATA
(Binary)
DIGITAL DATA
(hex)
+6.35
+5.0
+3.3
+1.2
+0.05
0.0
0111 1111
0110 0100
0100 0010
0001 0111
0000 0001
0000 0000
1111 1111
1110 1000
1011 0011
1001 1100
1000 0000
7Fh
64h
42h
17h
01h
00h
FFh
E8h
B3h
9Ch
80h
-0.05
-1.2
-3.3
-5.0
-6.35
8 of 15
DS4000
DIGITAL TEMPERATURE SENSOR
The digital temperature sensor provides 10-bit temperature readings that indicate the temperature of the
device. Temperature readings are communicated from the DS4000 over a 2-wire serial interface. No
additional components are required. The DS4000 has an external address bit that allows a user to choose
the slave address from two possible values.
The factory-calibrated temperature sensor requires no external components. Upon power-up, the DS4000
starts performing temperature conversions with a resolution of 10 bits (+0.25°C resolution). Following an
8-bit command protocol, temperature data can be read over the 2-wire interface. The host can periodically
read the value in the temperature register, which contains the last completed conversion. As conversions
are performed in the background, reading the temperature register does not affect the conversion in
progress.
Reading Temperature
The DS4000 measures temperature through the use of an on-chip temperature-measurement technique
with an operation range from 0°C to +70°C (commercial) or -40°C to +85°C (industrial). The device
performs continuous conversions with the most recent result being stored in the temperature register. The
digital temperature is retrieved from the temperature register using the READ TEMPERATURE
command, as described in detail in the following paragraphs.
Table 2 shows the exact relationship of output data to measured temperature. The data is transmitted
serially over the 2-wire serial interface, MSB first. The MSB of the temperature register contains the
“sign” (S) bit, denoting whether the temperature is positive or negative. For Fahrenheit usage, a lookup
table or conversion routine must be used.
TEMPERATURE/DATA RELATIONSHIP (UNIT = °C)
MSB (64h)
BIT 7
S
BIT 6
26
BIT 5
25
BIT 4
24
BIT 3
23
BIT 2
22
BIT 1
21
BIT 0
20
LSB (65h)
BIT 7
BIT 6
BIT 5
0
BIT 4
0
BIT 3
0
BIT 2
0
BIT 1
0
BIT 0
0
2-1
2-2
Table 2. Temperature/Data Relationship
TEMPERATURE
(°C)
DIGITAL OUTPUT
(Binary)
DIGITALOUTPUT
(hex)
+85
+75
+0.5
0
0101 0101 0000 0000
0100 1011 0000 0000
0000 0000 1000 0000
0000 0000 0000 0000
1111 1111 1000 0000
1110 1100 0000 0000
1101 1000 0000 0000
5500h
4B00h
0080h
0000h
FF80h
EC00h
D800h
-0.5
-20
-40
Note: Internal power dissipation raises the temperature above the ambient. The delta between ambient and the die temperature depends on
power consumption, PC board layout, and airflow.
9 of 15
DS4000
READ TEMPERATURE Command
This command reads the last temperature conversion result from the temperature register in the format
described in the Reading Temperature section. If an application can accept temperature resolutions of
+1.0°C, then the master can read the first data byte and follow with a NACK and STOP. For higher
resolution, both bytes must be read.
Table 3. Command Set
2-WIRE BUS DATA
INSTRUCTION
FUNCTION
PROTOCOL
AFTER ISSUING
PROTOCOL
Read or write 1 data
byte
Frequency Select
Register (Note 1)
TCXO Control
Register (Note 1)
Read Temperature
(Note 2)
Defines F2 output frequency
5Dh
60h
64h
66h
Enables/disables F1 and F2;
sets duty cycle of F2
Read or write 1 data
byte
Reads 10-bit temperature register
Read 1 or 2 data bytes
Frequency Tuning
Digitally adds/subtracts an offset
from oscillator
Read or write 1 data
byte
Register (Note 2)
Note 1: The slave does not increment the internal address pointer between instructions. The address pointer must be reinitialized after each
access.
Note 2. If the user only desires 8-bit thermometer readings, the master can read one data byte, and follow with a NACK and STOP. If higher
resolution is required, both bytes must be read.
10 of 15
DS4000
2-Wire Serial Interface
The DS4000 supports a bidirectional 2-wire serial bus and data transmission protocol. The bus must be
controlled by a master device, which generates the serial clock (SCL), controls the bus access, and
generates the START and STOP conditions. The DS4000 operates as a slave on the
2-wire bus. The DS4000 works in a regular mode (100kHz clock rate) and a fast mode (400kHz clock
rate), which are defined within the bus specifications. Connections to the bus are made by the open-drain
I/O signals SDA and SCL.
The following bus protocol has been defined (Figure 3):
ꢀꢁData transfer can be initiated only when the bus is not busy.
ꢀꢁDuring data transfer, the data signal must remain stable whenever the clock signal is HIGH. Changes
in the data signal while the clock signal is HIGH are interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus Not Busy: Both data and clock signals remain HIGH.
Start Data Transfer: A change in the state of the data signal, from HIGH to LOW, while the clock line
is HIGH, defines the START condition.
Stop Data Transfer: A change in the state of the data signal, from LOW to HIGH, while the clock line is
HIGH, defines the STOP condition.
Data Valid: The state of the data signal represents valid data when, after a START condition, the data
signal is stable for the duration of the HIGH period of the clock signal. The data on the line must be
changed during the LOW period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited and is determined
by the master device. The information is transferred byte-wise and each receiver acknowledges with a
ninth bit.
Acknowledge: Each receiving device, when addressed, is required to generate an acknowledge after
reception of each byte. The master device must generate an extra clock pulse that is associated with this
acknowledge bit.
A device that acknowledges must pull down the serial data (SDA) signal during the acknowledge clock
pulse in such a way that the SDA signal is stable LOW during the HIGH period of the acknowledge-
related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an
end-of-data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of
the slave. In this case, the slave must leave the data signal HIGH to enable the master to generate the
STOP condition.
11 of 15
DS4000
Figure 3. DATA TRANSFER ON 2-WIRE SERIAL BUS
SDA
MSB
SLAVE
ADDRESS
R/W BIT
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
ACKNOWLEDGEMENT
SIGNAL FROM
RECEIVER
SCL
1
2
3-5
6
7
8
9
1
2
3-7
8
9
ACK
ACK
REPEATED IF
START
CONDITION
MORE BYTES ARE
TRANSFERRED
STOP CONDITION
OR REPEATED
START CONDITION
Data Transfer
Figures 4 and 5 detail how data transfer is accomplished on the 2-wire bus.
Depending on the R/ W bit in the transmission protocols as shown, two types of data transfer are possible:
1) Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte. Data is transferred with the most significant bit (MSB) first.
2) Data transfer from a slave transmitter to a master receiver. The master transmits the first byte
(the slave address). The slave then returns an acknowledge bit. Next follows a number of data bytes
transmitted by the slave to the master. The master returns an acknowledge bit after all received bytes
other than the last byte. At the end of the last received byte, a “not acknowledge” is returned. The
master device generates all of the serial clock pulses and the START and STOP conditions. A transfer
is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus is not released.
12 of 15
DS4000
Slave Address
The slave address is the first byte received following the START condition generated by the master
device. The address byte consists of a 7-bit slave address and the R/ W direction bit. The DS4000 slave
address is set to 100010A0, where A0 is externally hardwired to a HIGH or LOW state. This allows design
flexibility to set the slave’s address to one of two possible address locations. The last bit following the
slave address is the direction bit (R/ W ) and defines the operation to be performed by the master, transmit
data (R/ W = 0), or receive data (R/ W = 1). Following the START condition, the DS4000 monitors the
SDA bus by checking the slave address being transmitted. Upon receiving the proper slave address and
R/ W bit, the slave device outputs an acknowledge signal on the SDA line regardless of the operation
mode.
The DS4000 can operate in the following two modes:
1) Slave Receiver Mode: Serial data and clock are received through SDA and SCL. After each byte is
received, an acknowledge bit is transmitted. START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address recognition is performed by the hardware after
reception of the slave address and direction bit (Figure 4).
2) Slave Transmitter Mode: The first byte is received and handled as in the slave receiver mode.
However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is
transmitted on SDA by the DS4000 while the serial clock is input on SCL. START and STOP
conditions are recognized as the beginning and end of a serial transfer (Figure 5).
Figure 4. DATA WRITE: SLAVE RECEIVER MODE
<SLAVE ADDRESS>
<DATA ADDRESS>
<DATA (n)>
R/W
S
100010A0
0
A
XXXXXXXX
A
XXXXXXXX
A
P
S = START
A = ACKNOWLEDGE
P = STOP
Figure 5. DATA READ: SLAVE TRANSMITTER MODE
<SLAVE ADDRESS>
R/W
<DATA (n)>
<DATA (n + 1)>
<DATA (n + 2)>
<DATA (n + X)>
S
100010A0
1
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A
P
S = START
A = ACKNOWLEDGE
P = STOP
A = NOT ACKNOWLEDGE
13 of 15
DS4000
ORDERING INFORMATION
FREQUENCY
DESIGNATOR (MHz)
PART
TEMP RANGE
PIN-PACKAGE
TOP MARK
DS4000A0/WBGA
DS4000A0-N/WBGA
DS4000CW/WBGA
DS4000CW-N/WBGA
DS4000D0/WBGA
DS4000D0-N/WBGA
DS4000EC/WBGA
DS4000EC-N/WBGA
DS4000G0/WBGA
DS4000G0-N/WBGA
DS4000GF/WBGA
DS4000GF-N/WBGA
DS4000GW/WBGA
DS4000GW-N/WBGA
DS4000KI/WBGA
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
12 BGA
DS4000A0
10.00000
10.00000
12.80000
12.80000
13.00000
13.00000
14.31818
14.31818
16.00000
16.00000
16.38400
16.38400
16.80000
16.80000
19.44000
19.44000
DS4000A0-N
DS4000CW
DS4000CW-N
DS4000D0
DS4000D0-N
DS4000EC
DS4000EC-N
DS4000G0
DS4000G0-N
DS4000GF
DS4000GF-N
DS4000GW
DS4000GW-N
DS4000KI
DS4000KI-N/WBGA
DS4000KI-N
14 of 15
DS4000
PACKAGE INFORMATION
Note: The BGA is solder-masked defined.
15 of 15
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