MB9AF114LPMC [CYPRESS]
RISC Microcontroller, 32-Bit, FLASH, CORTEX-M3 CPU, 40MHz, CMOS, PQFP64, 10 X 10 MM, 1.70 MM HEIGHT, 0.50 MM, PLASTIC, LQFP-64;
| 型号： | MB9AF114LPMC |
| 厂家： | 
CYPRESS |
| 描述： | RISC Microcontroller, 32-Bit, FLASH, CORTEX-M3 CPU, 40MHz, CMOS, PQFP64, 10 X 10 MM, 1.70 MM HEIGHT, 0.50 MM, PLASTIC, LQFP-64 微控制器 |
| 文件： | 总112页 (文件大小：1225K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS706-00011-1v0-E
32-bit ARMTM CortexTM-M3 based Microcontroller
MB9A110 Series
MB9AF111L/M/N, MB9AF112L/M/N, MB9AF114L/M/N,
MB9AF115M/N, MB9AF116M/N
ꢀDESCRIPTION
The MB9A110 Series are a highly integrated 32-bit microcontroller that target for high-performance and
cost-sensitive embedded control applications.
The MB9A110 Series are based on the ARM Cortex-M3 Processor and on-chip Flash memory and SRAM,
and peripheral functions, including Motor Control Timers, ADCs and Communication Interfaces (UART,
CSIO, I2C, LIN).
The products which are described in this data sheet are placed into TYPE1 product categories in "FM3
MB9Axxx/MB9Bxxx Series PERIPHERAL MANUAL".
Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries.
Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2011.9
MB9A110 Series
ꢀFEATURES
ꢁ32-bit ARM Cortex-M3 Core
x Processor version: r2p1
x Up to 40MHz Frequency Operation
x Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48
peripheral interrupts and 16 priority levels
x 24-bit System timer (Sys Tick): System timer for OS task management
ꢁOn-chip Memories
[Flash memory]
x Up to 512 Kbyte
x Read cycle: 0wait-cycle
x Security function for code protection
[SRAM]
This Series contain a total of up to 32Kbyte on-chip SRAM memories. This is composed of two
independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus or D-code bus of Cortex-M3
core. SRAM1 is connected to System bus.
x SRAM0: Up to 16 Kbyte.
x SRAM1: Up to 16 Kbyte.
ꢁExternal Bus Interface*
x Supports SRAM, NOR Flash device
x Up to 8 chip selects
x 8/16-bit Data width
x Up to 25-bit Address bit
x Supports Address/Data multiplex
x Supports external RDY input.
* : MB9AF111L, F112L, F114L do not support External Bus Interface
2
DS706-00011-1v0-E
MB9A110 Series
ꢁMulti-function Serial Interface (Max 8channels)
x 4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3)
x Operation mode is selectable from the followings for each channel.
x UART
x CSIO
x LIN
x I2C
[UART]
x Full-duplex double buffer
x Selection with or without parity supported
x Built-in dedicated baud rate generator
x External clock available as a serial clock
x Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)*
x Various error detect functions available (parity errors, framing errors, and overrun errors)
* : MB9AF111L, F112L, F114L do not support Hardware Flow control
[CSIO]
x Full-duplex double buffer
x Built-in dedicated baud rate generator
x Overrun error detect function available
[LIN]
x LIN protocol Rev.2.1 supported
x Full-duplex double buffer
x Master/Slave mode supported
x LIN break field generate (can be changed 13-16bit length)
x LIN break delimiter generate (can be changed 1-4bit length)
x Various error detect functions available (parity errors, framing errors, and overrun errors)
[I2C]
Standard mode (Max 100kbps) / High-speed mode (Max 400Kbps) supported
ꢁDMA Controller (8channels)
DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously.
x 8 independently configured and operated channels
x Transfer can be started by software or request from the built-in peripherals
x Transfer address area: 32bit (4Gbyte)
x Transfer mode: Block transfer/Burst transfer/Demand transfer
x Transfer data type: byte/half-word/word
x Transfer block count: 1 to 16
x Number of transfers: 1 to 65536
ꢁA/D Converter (Max 16channels)
[12-bit A/D Converter]
x Successive Approximation Register type
x Built-in 3unit*
x Conversion time: 1.0μs@5V
x Priority conversion available (priority at 2levels)
x Scanning conversion mode
x Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion:
4steps)
* : MB9AF111L, F112L, F114L built-in 2unit
DS706-00011-1v0-E
3
MB9A110 Series
ꢁBase Timer (Max 8channels)
Operation mode is selectable from the followings for each channel.
x 16-bit PWM timer
x 16-bit PPG timer
x 16/32-bit reload timer
x 16/32-bit PWC timer
ꢁGeneral Purpose I/O Port
This series can use its pins as I/O ports when they are not used for external bus or peripherals. Moreover,
the port relocate function is built in. It can set which I/O port the peripheral function can be allocated.
x Capable of pull-up control per pin
x Capable of reading pin level directly
x Built-in the port relocate function
x Up to 83 fast I/O Ports@100pin Package
x Some pins are 5V tolerant I/O (MB9AF115M/N, MB9AF116M/N only)
Please see "ꢀPIN DESCRIPTION" to confirm the corresponding pins.
ꢁMulti-function Timer (Max 2unit)
The Multi-function timer is composed of the following blocks.
x 16-bit free-run timer × 3ch/unit
x Input capture × 4ch/unit
x Output compare × 6ch/unit
x A/D activating compare × 3ch/unit
x Waveform generator × 3ch/unit
x 16-bit PPG timer × 3ch/unit
The following function can be used to achieve the motor control.
x PWM signal output function
x DC chopper waveform output function
x Dead time function
x Input capture function
x A/D convertor activate function
x DTIF (Motor emergency stop) interrupt function
ꢁQuadrature Position/Revolution Counter (QPRC) (Max 2unit)
The Quadrature Position/Revolution Counter (QPRC) is used to measure the position of the position
encoder. Moreover, it is possible to use up/down counter.
x The detection edge of the three external event input pins AIN, BIN and ZIN is configurable.
x 16-bit position counter
x 16-bit revolution counter
x Two 16-bit compare registers
ꢁDual Timer (Two 32/16bit Down Counter)
The Dual Timer consists of two programmable 32/16-bit down counters.
Operation mode is selectable from the followings for each channel.
x Free-running
x Periodic (=Reload)
x One-shot
4
DS706-00011-1v0-E
MB9A110 Series
ꢁWatch Counter
The Watch counter is used for wake up from power saving mode.
x Interval timer: up to 64s (Max)@ Sub Clock : 32.768kHz
ꢁExternal Interrupt Controller Unit
x Up to 16 external vectors
x Include one non-maskable interrupt (NMI)
ꢁWatch dog Timer (2channels)
A watchdog timer can generate interrupts or a reset when a time-out value is reached.
This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog.
"Hardware" watchdog timer is clocked by low speed CR oscillator. Therefore, "Hardware" watchdog is
active in any power saving mode except STOP.
ꢁCRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator helps a verify data transmission or storage integrity.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
x CCITT CRC16 Generator Polynomial: 0x1021
x IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
ꢁClock and Reset
[Clocks]
Five clock sources (2 ext. osc, 2 CR osc, and main PLL) that are dynamically selectable.
x Main Clock
x Sub Clock
: 4MHz to 48MHz
: 32.768kHz
x High-speed CR Clock : 4MHz
x Low-speed CR Clock : 100kHz
x Main PLL Clock
[Resets]
Reset requests from INITX pins, Power on reset, Software reset, watchdog timers reset, low voltage
detector reset and clock supervisor reset.
ꢁClock Super Visor (CSV)
Clocks generated by CR oscillators are used to supervise abnormality of the external clocks.
x External OSC clock failure (clock stop) is detected, reset is asserted.
x External OSC frequency anomaly is detected, interrupt or reset is asserted.
ꢁLow Voltage Detector (LVD)
This Series include 2-stage monitoring of voltage on the VCC. When the voltage falls below the voltage has
been set, Low Voltage Detector generates an interrupt or reset.
x LVD1: error reporting via interrupt
x LVD2: auto-reset operation
DS706-00011-1v0-E
5
MB9A110 Series
ꢁLow Power Mode
Three power saving modes supported.
x SLEEP
x TIMER
x STOP
ꢁDebug
x Serial Wire JTAG Debug Port (SWJ-DP)
x Embedded Trace Macrocells (ETM) provide comprehensive debug and trace facilities.*
x Trace Port Interface Unit (TPIU) for bridging to a Trace Port Analyzer.*
* : MB9AF111L/M, F112L/M, F114L/M, F115M, F116M support only SWJ-DP.
ꢁPower Supply
x VCC = 2.7V to 5.5V: Correspond to the wide range voltage.
6
DS706-00011-1v0-E
MB9A110 Series
ꢀPRODUCT LINEUP
ꢁMemory size
Product device MB9AF111L/M/N MB9AF112L/M/N MB9AF114L/M/N
On-chip Flash
64Kbyte
128Kbyte
256Kbyte
On-chip SRAM
16Kbyte
16Kbyte
32Kbyte
Product device
On-chip Flash
MB9AF115M/N MB9AF116M/N
384Kbyte
512Kbyte
On-chip SRAM
32Kbyte
32Kbyte
ꢁFunction
MB9AF111M
MB9AF112M
MB9AF114M
MB9AF115M
MB9AF116M
80
MB9AF111N
MB9AF112N
MB9AF114N
MB9AF115N
MB9AF116N
100
MB9AF111L
MB9AF112L
MB9AF114L
Product device
Pin count
CPU
64
Cortex-M3
40MHz
Freq.
Power supply voltage range
DMAC
2.7V to 5.5V
8ch
Addr:21bit (Max)
Data:8 bit
Addr:25bit (Max)
Data:8/16 bit
CS:8 (Max)
External Bus Interface
-
CS:4 (Max)
Support: SRAM,
NOR Flash
Support: SRAM,
NOR Flash
MF Serial Interface
(UART/CSIO/LIN/I2C)
Base Timer
(PWC/Reload timer/PWM/PPG)
A/D
8ch (Max)
8ch (Max)
activation
compare
Input
capture
Free-run
3ch
4ch
3ch
6ch
MF-
1 unit
2 units (Max)
Timer timer
Output
compare
Waveform
generator
PPG
3ch
3ch
QPRC
2ch (Max)
Dual Timer
Watch Counter
CRC Accelerator
Watchdog timer
External Interrupts
I/O ports
1 unit
1 unit
Yes
1ch (SW) + 1ch (HW)
7pins (Max) + NMI × 1 11pins (Max) + NMI × 1 16pins (Max) + NMI × 1
51pins (Max)
9ch (2 units)
66pins (Max)
12ch (3 units)
Yes
83pins (Max)
16ch (3 units)
12 bit A/D converter
CSV (Clock Super Visor)
LVD (Low Voltage Detector)
2ch
Internal
OSC
High-speed
Low-speed
4MHz (± 2%)
100kHz (Typ)
Debug Function
SWJ-DP
SWJ-DP/TPIU/ETM
DS706-00011-1v0-E
7
MB9A110 Series
Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package.
It is necessary to use the port relocate function of the General I/O port according to your function use.
8
DS706-00011-1v0-E
MB9A110 Series
ꢀPACKAGES
MB9AF111M
MB9AF112M
MB9AF114M
MB9AF115M
MB9AF116M
MB9AF111N
MB9AF112N
MB9AF114N
MB9AF115N
MB9AF116N
MB9AF111L
MB9AF112L
MB9AF114L
Product name
Package
LQFP: FPT-64P-M24/M38 (0.5mm pitch)
LQFP: FPT-64P-M23/M39 (0.65mm pitch)
LQFP: FPT-80P-M21/M37 (0.5mm pitch)
LQFP: FPT-100P-M20/M23 (0.5mm pitch)
QFP: FPT-100P-M06 (0.65mm pitch)
BGA: BGA-112P-M04 (0.8mm pitch)
ꢂ
ꢂ
-
-
-
-
-
ꢂ
-
-
-
ꢂ
ꢂ
ꢂ*
-
-
-
-
ꢂ
: Supported
*
: MB9AF115N, MB9AF116N is planning
Note : Refer to "ꢀPACKAGE DIMENSIONS" for detailed information on each package.
DS706-00011-1v0-E
9
MB9A110 Series
PIN ASSIGNMENT
z FPT-100P-M20/M23
(TOP VIEW)
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
10
DS706-00011-1v0-E
MB9A110 Series
z FPT-100P-M06
(TOP VIEW)
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
DS706-00011-1v0-E
11
MB9A110 Series
z FPT-80P-M21/FPT-80P-M37
(TOP VIEW)
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
12
DS706-00011-1v0-E
MB9A110 Series
z FPT-64P-M23/M24/M38/M39
(TOP VIEW)
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
DS706-00011-1v0-E
13
MB9A110 Series
z BGA-112P-M04
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
TMS/
SWDIO
A
B
C
D
E
F
G
H
J
VSS P81
P80
P52
VSS
P55
P32
P36
P3A
P3E
VSS
VCC
P61
P60
VSS
P0E
P0F
P62
P56
P0B
P0C
P0D
P63
P07
P08
P09
P0A
TRSTX VCC
VSS
TDI
TDO/ TCK/
SWO SWCLK
VCC
P50
P53
P30
P34
P37
P3B
VCC
VCC
VSS
VSS
P51
P54
P31
P35
P38
P3C
P3F
VSS
C
VSS
P20
P05
VSS
P06
P21
VSS
P23 AN15
P33 Index
P39
P22 AN14 AN12 AN11
AN13 AN10 AN09 AVRH
AN08 AN07 AN06 AVSS
P3D
VSS
P40
P44
P43
P4C AN05 VSS AN04 AN03 AVCC
P49
P48
P45
P4D AN02 VSS AN01 AN00
K
L
X1A INITX P42
P4B
P4A
P4E
MD1
X0
VSS
X1
VCC
VSS
X0A
VSS
P41
MD0
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
14
DS706-00011-1v0-E
MB9A110 Series
PIN DESCRIPTION
Pin No
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
I/O circuit Pin state
Pin name
type
type
1
79
B1
1
1
VCC
P50
-
INT00_0
AIN0_2
SIN3_1
2
2
80
C1
2
E
H
RTO10_0
(PPG10_0)
-
3
-
MADATA00_1
P51
INT01_0
BIN0_2
SOT3_1
(SDA3_1)
3
81
C2
3
E
H
RTO11_0
(PPG10_0)
MADATA01_1
P52
INT02_0
ZIN0_2
4
-
SCK3_1
(SCL3_1)
4
82
B3
4
E
H
RTO12_0
(PPG12_0)
MADATA02_1
P53
SIN6_0
TIOA1_2
INT07_2
5
6
83
84
D1
D2
5
6
-
-
E
E
H
RTO13_0
(PPG12_0)
MADATA03_1
P54
SOT6_0
(SDA6_0)
I
TIOB1_2
RTO14_0
(PPG14_0)
MADATA04_1
DS706-00011-1v0-E
15
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P55
SCK6_0
(SCL6_0)
7
85
D3
7
-
-
E
I
ADTG_1
RTO15_0
(PPG14_0)
MADATA05_1
P56
INT08_2
DTTI1X_0
MADATA06_1
P30
8
9
86
87
D5
E1
8
9
E
E
H
H
AIN0_0
5
-
TIOB0_1
INT03_2
MADATA07_1
P31
BIN0_0
TIOB1_1
6
-
10
11
88
89
E2
E3
10
11
E
E
H
H
SCK6_1
(SCL6_1)
INT04_2
MADATA08_1
P32
ZIN0_0
TIOB2_1
7
SOT6_1
(SDA6_1)
INT05_2
MADATA09_1
P33
-
INT04_0
8
TIOB3_1
SIN6_1
12
13
90
91
E4
F1
12
E
E
H
ADTG_6
MADATA10_1
P34
-
-
FRCK0_0
TIOB4_1
MADATA11_1
-
I
16
DS706-00011-1v0-E
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P35
IC03_0
14
92
F2
F3
-
-
E
H
TIOB5_1
INT08_1
MADATA12_1
P36
IC02_0
15
93
-
-
E
E
H
H
SIN5_2
INT09_1
MADATA13_1
P37
IC01_0
SOT5_2
(SDA5_2)
16
17
94
95
G1
G2
-
-
-
-
INT10_1
MADATA14_1
P38
IC00_0
SCK5_2
(SCL5_2)
E
H
INT11_1
MADATA15_1
P39
18
19
96
97
F4
13
14
9
E
I
I
DTTI0X_0
ADTG_2
P3A
RTO00_0
(PPG00_0)
G3
10
G
TIOA0_1
P3B
RTO01_0
(PPG00_0)
20
21
98
99
H1
H2
15
16
11
12
G
G
G
I
I
I
TIOA1_1
P3C
RTO02_0
(PPG02_0)
TIOA2_1
P3D
RTO03_0
(PPG02_0)
22
-
100
-
G4
B2
17
-
13
-
TIOA3_1
VSS
-
DS706-00011-1v0-E
17
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P3E
RTO04_0
(PPG04_0)
23
1
H3
J2
18
14
G
I
TIOA4_1
P3F
RTO05_0
(PPG04_0)
24
2
19
15
G
G
I
TIOA5_1
VSS
25
26
3
4
L1
J1
20
-
16
-
-
-
VCC
P40
TIOA0_0
27
5
J4
-
-
H
RTO10_1
(PPG10_1)
INT12_1
P41
TIOA1_0
28
29
30
6
7
8
L5
K5
J5
-
-
-
-
-
-
G
G
G
H
I
RTO11_1
(PPG10_1)
INT13_1
P42
TIOA2_0
RTO12_1
(PPG12_1)
P43
TIOA3_0
I
RTO13_1
(PPG12_1)
ADTG_7
P44
21
-
TIOA4_0
MAD00_1
31
32
9
H5
L6
-
-
G
G
I
I
RTO14_1
(PPG14_1)
P45
22
TIOA5_0
MAD01_1
10
RTO15_1
(PPG14_1)
-
-
-
-
-
-
-
K2
J3
-
-
-
-
-
-
VSS
VSS
VSS
-
-
-
H4
18
DS706-00011-1v0-E
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
33
34
35
11
12
13
L2
L4
K1
23
24
25
17
C
VSS
-
-
-
-
18
VCC
P46
36
14
L3
26
19
D
M
X0A
P47
37
38
15
16
K3
K4
27
28
20
21
D
B
N
C
X1A
INITX
P48
DTTI1X_1
INT14_1
SIN3_2
MAD02_1
P49
39
17
K6
29
-
E
H
22
-
TIOB0_0
AIN0_1
IC10_1
40
18
J6
30
E
I
SOT3_2
(SDA3_2)
MAD03_1
P4A
23
-
TIOB1_0
BIN0_1
IC11_1
41
42
43
19
20
21
L7
K7
H6
31
32
33
E
E
I
I
I
SCK3_2
(SCL3_2)
MAD04_1
P4B
24
-
TIOB2_0
ZIN0_1
IC12_1
MAD05_1
P4C
TIOB3_0
25
-
SCK7_1
(SCL7_1)
E / I*
AIN1_2
IC13_1
MAD06_1
DS706-00011-1v0-E
19
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P4D
TIOB4_0
26
SOT7_1
(SDA7_1)
44
45
22
23
J7
34
E / I*
I
BIN1_2
FRCK1_1
MAD07_1
P4E
-
TIOB5_0
INT06_2
SIN7_1
ZIN1_2
MAD08_1
MD1
27
K8
35
E / I*
I
-
46
47
48
24
25
26
K9
L8
L9
36
37
38
28
29
30
C
J
P
D
A
PE0
MD0
X0
A
PE2
X1
49
27
L10
39
31
A
F
F
B
K
L
PE3
50
51
28
29
L11
K11
40
41
32
33
VSS
-
-
VCC
P10
52
53
30
31
J11
J10
42
43
34
AN00
P11
AN01
SIN1_1
INT02_1
FRCK0_2
MAD09_1
P12
35
-
AN02
36
SOT1_1
(SDA1_1)
54
32
J8
44
F
K
IC00_2
MAD10_1
VSS
-
-
-
-
-
-
-
K10
J9
-
-
-
-
VSS
20
DS706-00011-1v0-E
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P13
AN03
37
SCK1_1
(SCL1_1)
55
56
57
33
34
35
H10
45
46
47
F
K
IC01_2
MAD11_1
P14
-
AN04
38
INT03_1
IC02_2
SIN0_1
MAD12_1
P15
H9
F
F
L
-
39
AN05
IC03_2
H7
K
SOT0_1
(SDA0_1)
-
-
MAD13_1
P16
AN06
58
59
36
37
G10
G9
48
49
F
F
K
L
SCK0_1
(SCL0_1)
MAD14_1
P17
AN07
40
SIN2_2
INT04_1
MAD15_1
AVCC
AVRH
AVSS
-
60
61
62
38
39
40
H11
F11
G11
50
51
52
41
42
43
-
-
-
P18
AN08
44
-
63
41
G8
53
F
F
K
K
SOT2_2
(SDA2_2)
MAD16_1
P19
AN09
45
64
-
42
-
F10
H8
54
-
SCK2_2
(SCL2_2)
-
-
MAD17_1
VSS
-
DS706-00011-1v0-E
21
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P1A
AN10
SIN4_1
INT05_1
IC00_1
MAD18_1
P1B
65
66
67
43
44
45
F9
55
56
-
-
-
-
F
L
AN11
SOT4_1
(SDA4_1)
E11
E10
F
F
K
K
IC01_1
MAD19_1
P1C
AN12
SCK4_1
(SCL4_1)
IC02_1
MAD20_1
P1D
AN13
68
69
70
46
47
48
F8
E9
-
-
-
-
-
-
F
F
F
K
K
K
CTS4_1
IC03_1
MAD21_1
P1E
AN14
RTS4_1
DTTI0X_1
MAD22_1
P1F
AN15
D11
ADTG_5
FRCK0_1
MAD23_1
VSS
-
-
-
-
B10
C9
-
-
-
-
-
-
VSS
22
DS706-00011-1v0-E
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P23
SCK0_0
(SCL0_0)
57
-
46
-
71
49
D10
E
I
TIOA7_1
RTO00_1
(PPG00_1)
P22
SOT0_0
(SDA0_0)
47
72
73
74
50
51
52
E8
58
59
60
E
E
E
I
TIOB7_1
ZIN1_1
P21
-
48
-
SIN0_0
INT06_1
BIN1_1
P20
C11
C10
H
H
INT05_0
CROUT_0
AIN1_1
MAD24_1
VSS
-
75
76
53
54
A11
A10
-
-
-
-
-
-
VCC
P00
49
-
77
78
79
80
81
55
56
57
58
59
A9
B9
61
62
63
64
65
E
E
E
E
E
E
E
E
E
E
TRSTX
MCSX7_1
P01
50
TCK
SWCLK
P02
51
-
B11
A8
B8
TDI
MCSX6_1
P03
52
53
TMS
SWDIO
P04
TDO
SWO
P05
TRACED0
TIOA5_2
SIN4_2
INT00_1
MCSX5_1
VSS
82
-
60
-
C8
D8
-
-
-
-
E
F
-
DS706-00011-1v0-E
23
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P06
TRACED1
TIOB5_2
83
84
61
62
D9
A7
-
-
E
F
SOT4_2
(SDA4_2)
INT01_1
MCSX4_1
P07
66
-
ADTG_0
MCLKOUT_1
TRACED2
-
E
G
SCK4_2
(SCL4_2)
P08
TRACED3
TIOA0_2
CTS4_2
MCSX3_1
P09
85
86
87
63
64
65
B7
C7
D7
-
-
-
-
E
E
G
G
H
TRACECLK
TIOB0_2
RTS4_2
MCSX2_1
P0A
54
-
SIN4_0
67
E / I*
INT00_2
FRCK1_0
MCSX1_1
P0B
SOT4_0
(SDA4_0)
55
-
88
89
66
67
A6
B6
68
69
E / I*
I
I
TIOB6_1
IC10_0
MCSX0_1
P0C
SCK4_0
(SCL4_0)
56
E / I*
TIOA6_1
IC11_0
MALE_1
VSS
-
-
-
-
-
D4
C3
-
-
-
-
-
-
VSS
24
DS706-00011-1v0-E
MB9A110 Series
Pin No
I/O circuit Pin state
Pin name
type
type
LQFP-100 QFP-100 BGA-112 LQFP-80 LQFP-64
P0D
RTS4_0
TIOA3_2
IC12_0
MDQM0_1
P0E
90
68
C6
A5
70
-
E
I
CTS4_0
TIOB3_2
IC13_0
MDQM1_1
P0F
91
69
71
-
E
I
92
93
70
71
B5
D6
72
73
57
-
E
E
J
NMIX
CROUT_1
P63
H
INT03_0
MWEX_1
P62
SCK5_0
(SCL5_0)
58
-
94
95
96
72
73
74
C5
B4
C4
74
75
76
E
E
I
I
ADTG_3
MOEX_1
P61
SOT5_0
(SDA5_0)
59
TIOB2_2
P60
SIN5_0
TIOA2_2
INT15_1
MRDY_1
VCC
60
E / I*
H
-
97
98
75
76
77
78
A4
A3
A2
A1
77
78
79
80
61
62
63
64
-
-
P80
H
H
O
O
99
P81
100
VSS
* : 5V tolerant I/O on MB9AF115M/N, MB9AF116M/N
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
DS706-00011-1v0-E
25
MB9A110 Series
SIGNAL DESCRIPTION
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
66
7
64
-
ADC
ADTG_0
ADTG_1
ADTG_2
ADTG_3
ADTG_4
ADTG_5
ADTG_6
ADTG_7
ADTG_8
AN00
84
62
85
96
72
-
A7
D3
F4
7
-
18
94
-
13
74
-
9
C5
-
58
-
A/D converter external trigger input
pin
70
12
30
-
48
90
8
D11
E4
J5
-
-
12
-
8
-
-
-
-
-
52
53
54
55
56
57
58
59
63
64
65
66
67
68
69
70
27
19
85
40
9
30
31
32
33
34
35
36
37
41
42
43
44
45
46
47
48
5
J11
J10
J8
42
43
44
45
46
47
48
49
53
54
55
56
-
34
35
36
37
38
39
-
AN01
AN02
AN03
H10
H9
H7
G10
G9
G8
F10
F9
AN04
AN05
AN06
AN07
40
44
45
-
A/D converter analog input pin
ANxx describes ADC ch.xx.
AN08
AN09
AN10
AN11
E11
E10
F8
-
AN12
-
AN13
-
-
AN14
E9
D11
J4
-
-
AN15
-
-
Base Timer
0
TIOA0_0
TIOA0_1
TIOA0_2
TIOB0_0
TIOB0_1
TIOB0_2
TIOA1_0
TIOA1_1
TIOA1_2
TIOB1_0
TIOB1_1
TIOB1_2
TIOA2_0
TIOA2_1
TIOA2_2
TIOB2_0
TIOB2_1
TIOB2_2
-
-
Base timer ch.0 TIOA pin
Base timer ch.0 TIOB pin
Base timer ch.1 TIOA pin
Base timer ch.1 TIOB pin
Base timer ch.2 TIOA pin
Base timer ch.2 TIOB pin
97
63
18
87
64
6
G3
B7
J6
14
-
10
-
30
9
22
5
E1
C7
L5
H1
D1
L7
E2
D2
K5
H2
C4
K7
E3
B4
86
28
20
5
-
-
Base Timer
1
-
-
98
83
19
88
84
7
15
5
11
-
41
10
6
31
10
6
23
6
-
Base Timer
2
29
21
96
42
11
95
-
-
99
74
20
89
73
16
76
32
11
75
12
60
24
7
59
26
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Base Timer
3
TIOA3_0
TIOA3_1
TIOA3_2
TIOB3_0
TIOB3_1
TIOB3_2
TIOA4_0
TIOA4_1
TIOA4_2
TIOB4_0
TIOB4_1
TIOB4_2
TIOA5_0
TIOA5_1
TIOA5_2
TIOB5_0
TIOB5_1
TIOB5_2
TIOA6_1
TIOB6_1
TIOA7_0
TIOA7_1
TIOA7_2
TIOB7_0
TIOB7_1
TIOB7_2
30
22
90
43
12
91
31
23
-
8
100
68
21
90
69
9
J5
G4
C6
H6
E4
A5
H5
H3
-
-
-
Base timer ch.3 TIOA pin
17
70
33
12
71
21
18
-
13
-
25
8
Base timer ch.3 TIOB pin
Base timer ch.4 TIOA pin
Base timer ch.4 TIOB pin
Base timer ch.5 TIOA pin
Base timer ch.5 TIOB pin
-
Base Timer
4
-
1
14
-
-
44
13
-
22
91
-
J7
34
-
26
-
F1
-
-
-
Base Timer
5
32
24
82
45
14
83
89
88
-
10
2
L6
J2
22
19
-
-
15
-
60
23
92
61
67
66
-
C8
K8
F2
D9
B6
A6
-
35
-
27
-
-
-
Base Timer
6
Base timer ch.6 TIOA pin
Base timer ch.6 TIOB pin
69
68
-
56
55
-
Base Timer
7
Base timer ch.7 TIOA pin
Base timer ch.7 TIOB pin
71
-
49
-
D10
-
57
-
46
-
-
-
-
-
-
72
-
50
-
E8
-
58
-
47
-
DS706-00011-1v0-E
27
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Debugger
SWCLK
SWDIO
Serial wire debug interface clock input
Serial wire debug interface data input /
output
78
56
B9
62
50
80
58
A8
64
52
SWO
TCK
TDI
Serial wire viewer output
J-TAG test clock input
81
78
79
81
80
86
82
83
84
85
77
31
32
39
40
41
42
43
44
45
53
54
55
56
57
58
59
63
64
65
66
67
68
69
70
74
59
56
57
59
58
64
60
61
62
63
55
9
B8
B9
B11
B8
A8
C7
C8
D9
A7
B7
A9
H5
L6
65
62
63
65
64
-
53
50
51
53
52
-
J-TAG test data input
TDO
TMS
J-TAG debug data output
J-TAG test mode state input/output
TRACECLK Trace CLK output of ETM
TRACED0
-
-
TRACED1
-
-
Trace data output of ETM
TRACED2
-
-
TRACED3
-
-
TRSTX
J-TAG test reset Input
61
21
22
29
30
31
32
33
34
35
43
44
45
46
47
48
49
53
54
55
56
-
49
-
External
Bus
MAD00_1
MAD01_1
MAD02_1
MAD03_1
MAD04_1
MAD05_1
MAD06_1
MAD07_1
MAD08_1
MAD09_1
MAD10_1
MAD11_1
MAD12_1
MAD13_1
MAD14_1
MAD15_1
MAD16_1
MAD17_1
MAD18_1
MAD19_1
MAD20_1
MAD21_1
MAD22_1
MAD23_1
MAD24_1
10
17
18
19
20
21
22
23
31
32
33
34
35
36
37
41
42
43
44
45
46
47
48
52
-
K6
J6
-
-
L7
-
K7
H6
J7
-
-
-
K8
J10
J8
-
-
-
H10
H9
H7
G10
G9
G8
F10
F9
-
External bus interface address bus
-
-
-
-
-
-
-
E11
E10
F8
-
-
-
-
E9
-
-
D11
C10
-
-
60
-
28
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
68
67
-
64
-
External
Bus
MCSX0_1
MCSX1_1
MCSX2_1
MCSX3_1
MCSX4_1
MCSX5_1
MCSX6_1
MCSX7_1
MDQM0_1
MDQM1_1
88
87
86
85
83
82
79
77
90
91
66
65
64
63
61
60
57
55
68
69
A6
D7
C7
B7
D9
C8
B11
A9
C6
A5
-
-
-
-
External bus interface chip select
output pin
-
-
-
-
63
61
70
71
-
-
-
External bus interface byte mask signal
output
-
External bus interface read enable
signal for SRAM
External bus interface write enable
signal for SRAM
MOEX_1
MWEX_1
94
93
72
71
C5
D6
74
73
-
-
2
3
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
C1
C2
B3
D1
D2
D3
D5
E1
E2
E3
E4
F1
F2
F3
G1
G2
2
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MADATA00_1
MADATA01_1
MADATA02_1
MADATA03_1
MADATA04_1
MADATA05_1
MADATA06_1
MADATA07_1
MADATA08_1
MADATA09_1
MADATA10_1
MADATA11_1
MADATA12_1
MADATA13_1
MADATA14_1
MADATA15_1
4
4
5
5
6
6
7
7
8
8
9
9
External bus interface data bus
10
11
12
13
14
15
16
17
10
11
12
-
-
-
-
-
External bus interface Address Latch
enable output signal for multiplex
External bus interface external RDY
input signal
External bus interface external clock
output
89
96
84
67
74
62
B6
C4
A7
69
76
66
-
-
-
MALE_1
MRDY_1
MCLKOUT_1
DS706-00011-1v0-E
29
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
External
Interrupt
INT00_0
INT00_1
INT00_2
INT01_0
INT01_1
INT02_0
INT02_1
INT03_0
INT03_1
INT03_2
INT04_0
INT04_1
INT04_2
INT05_0
INT05_1
INT05_2
INT06_1
INT06_2
2
80
60
65
81
61
82
31
71
34
87
90
37
88
52
43
89
51
23
C1
C8
D7
C2
D9
B3
J10
D6
H9
E1
2
2
External interrupt request 00
input pin
82
87
3
-
-
67
3
54
3
External interrupt request 01
input pin
83
4
-
-
4
4
External interrupt request 02
input pin
53
93
56
9
43
73
46
9
35
-
External interrupt request 03
input pin
38
5
12
59
10
74
65
11
73
45
E4
12
49
10
60
55
11
59
35
8
External interrupt request 04
input pin
G9
E2
40
6
C10
F9
-
External interrupt request 05
input pin
-
E3
7
C11
K8
48
27
External interrupt request 06
input pin
External interrupt request 07
input pin
INT07_2
5
83
D1
5
-
INT08_1
INT08_2
14
8
92
86
F2
-
-
-
External interrupt request 08
input pin
D5
8
External interrupt request 09
input pin
External interrupt request 10
input pin
External interrupt request 11
input pin
External interrupt request 12
input pin
External interrupt request 13
input pin
External interrupt request 14
input pin
INT09_1
INT10_1
INT11_1
INT12_1
INT13_1
INT14_1
15
16
17
27
28
39
93
94
95
5
F3
G1
G2
J4
-
-
-
-
-
-
-
-
-
-
6
L5
K6
-
17
29
External interrupt request 15
input pin
Non-Maskable Interrupt input
INT15_1
NMIX
96
92
74
70
C4
B5
76
72
60
57
30
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
61
62
63
64
65
-
-
66
-
64
49
50
51
52
53
-
-
-
-
-
GPIO
P00
P01
P02
P03
P04
P05
P06
P07
P08
P09
P0A
P0B
P0C
P0D
P0E
P0F
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P1A
P1B
P1C
P1D
P1E
P1F
P20
P21
P22
P23
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
52
53
54
55
56
57
58
59
63
64
65
66
67
68
69
70
74
73
72
71
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
30
31
32
33
34
35
36
37
41
42
43
44
45
46
47
48
52
51
50
49
A9
B9
B11
A8
B8
C8
D9
A7
B7
General-purpose I/O port 0
C7
-
D7
A6
B6
C6
A5
B5
J11
J10
J8
H10
H9
H7
G10
G9
G8
F10
F9
67
68
69
70
71
72
42
43
44
45
46
47
48
49
53
54
55
56
-
54
55
56
-
-
57
34
35
36
37
38
39
-
40
44
45
-
-
-
-
-
-
-
48
47
46
General-purpose I/O port 1
E11
E10
F8
-
-
-
60
59
58
57
E9
D11
C10
C11
E8
General-purpose I/O port 2
D10
DS706-00011-1v0-E
31
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
9
10
11
12
-
-
-
-
-
13
14
15
16
17
18
19
-
64
5
6
7
8
-
-
-
-
GPIO
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P3A
P3B
P3C
P3D
P3E
P3F
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P4A
P4B
P4C
P4D
P4E
P50
P51
P52
P53
P54
P55
P56
P60
P61
P62
P63
P80
P81
PE0
PE2
PE3
9
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
E1
E2
E3
E4
F1
F2
F3
G1
G2
F4
G3
H1
H2
G4
H3
J2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
27
28
29
30
31
32
36
37
39
40
41
42
43
44
45
2
General-purpose I/O port 3
-
9
10
11
12
13
14
15
-
-
-
-
-
2
5
6
7
8
9
J4
L5
K5
J5
H5
L6
L3
K3
K6
J6
L7
K7
H6
J7
K8
C1
C2
B3
D1
D2
D3
D5
C4
B4
C5
D6
A3
A2
K9
L9
L10
-
-
-
21
22
26
27
29
30
31
32
33
34
35
2
3
4
5
6
7
8
76
75
74
73
78
79
36
38
39
10
14
15
17
18
19
20
21
22
23
80
81
82
83
84
85
86
74
73
72
71
76
77
24
26
27
-
19
20
-
22
23
24
25
26
27
2
3
4
-
-
-
-
60
59
58
-
62
63
28
30
31
General-purpose I/O port 4
3
4
5
6
7
8
96
95
94
93
98
99
46
48
49
General-purpose I/O port 5
General-purpose I/O port 6
General-purpose I/O port 8
General-purpose I/O port E
32
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
59
46
64
48
-
Multi
Function
Serial
0
SIN0_0
SIN0_1
73
51
C11
Multifunction serial interface ch.0
input pin
56
34
H9
Multifunction serial interface ch.0
output pin
SOT0_0
(SDA0_0)
72
57
71
50
35
49
E8
H7
58
47
57
47
This pin operates as SOT0 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SDA0 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.0
clock I/O pin
SOT0_1
(SDA0_1)
-
SCK0_0
(SCL0_0)
D10
46
This pin operates as SCK0 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL0 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.1
input pin
SCK0_1
(SCL0_1)
58
53
36
31
G10
J10
48
43
-
Multi
Function
Serial
1
SIN1_1
35
Multifunction serial interface ch.1
output pin
SOT1_1
This pin operates as SOT1 when it is
54
55
32
33
J8
44
45
36
37
(SDA1_1) used in a UART/CSIO (operation
modes 0 to 2) and as SDA1 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.1
clock I/O pin
SCK1_1
(SCL1_1)
This pin operates as SCK1 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL1 when it is
used in an I2C (operation mode 4).
H10
DS706-00011-1v0-E
33
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Multi
Function
Serial
2
Multifunction serial interface ch.2
input pin
Multifunction serial interface ch.2
output pin
SIN2_2
59
37
G9
49
40
SOT2_2
This pin operates as SOT2 when it is
63
41
G8
53
54
44
45
(SDA2_2) used in a UART/CSIO (operation
modes 0 to 2) and as SDA2 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.2
clock I/O pin
SCK2_2
(SCL2_2)
This pin operates as SCK2 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL2 when it is
used in an I2C (operation mode 4).
64
42
F10
Multi
Function
Serial
3
SIN3_1
SIN3_2
2
80
17
C1
K6
2
2
-
Multifunction serial interface ch.3
input pin
39
29
Multifunction serial interface ch.3
output pin
SOT3_1
(SDA3_1)
3
40
4
81
18
82
19
C2
J6
3
30
4
3
-
This pin operates as SOT3 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SDA3 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.3
clock I/O pin
This pin operates as SCK3 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL3 when it is
used in an I2C (operation mode 4).
SOT3_2
(SDA3_2)
SCK3_1
(SCL3_1)
B3
L7
4
-
SCK3_2
(SCL3_2)
41
31
34
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
67
55
-
64
54
-
Multi
Function
Serial
4
SIN4_0
SIN4_1
SIN4_2
87
65
82
65
43
60
D7
F9
C8
Multifunction serial interface ch.4
input pin
-
SOT4_0
(SDA4_0)
Multifunction serial interface ch.4
output pin
88
66
83
89
67
84
66
44
61
67
45
62
A6
E11
D9
68
56
-
55
-
This pin operates as SOT4 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SDA4 when it is
used in an I2C (operation mode 4).
SOT4_1
(SDA4_1)
SOT4_2
(SDA4_2)
-
SCK4_0
(SCL4_0)
Multifunction serial interface ch.4
clock I/O pin
This pin operates as SCK4 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL4 when it is
used in an I2C (operation mode 4).
B6
69
-
56
-
SCK4_1
(SCL4_1)
E10
A7
SCK4_2
(SCL4_2)
-
-
RTS4_0
RTS4_1
RTS4_2
CTS4_0
CTS4_1
CTS4_2
SIN5_0
SIN5_2
90
69
86
91
68
85
96
15
68
47
64
69
46
63
74
93
C6
E9
C7
A5
F8
B7
C4
F3
70
-
-
-
Multifunction serial interface ch.4
RTS output pin
-
-
71
-
-
Multifunction serial interface ch.4
CTS input pin
-
-
-
Multi
Function
Serial
5
76
-
60
-
Multifunction serial interface ch.5
input pin
Multifunction serial interface ch.5
output pin
SOT5_0
(SDA5_0)
95
16
94
17
73
94
72
95
B4
G1
C5
G2
75
59
This pin operates as SOT5 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SDA5 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.5
clock I/O pin
This pin operates as SCK5 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL5 when it is
used in an I2C (operation mode 4).
SOT5_2
(SDA5_2)
-
-
SCK5_0
(SCL5_0)
74
-
58
-
SCK5_2
(SCL5_2)
DS706-00011-1v0-E
35
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Multi
Function
Serial
6
SIN6_0
SIN6_1
5
83
D1
5
-
Multifunction serial interface ch.6
input pin
12
90
E4
12
8
Multifunction serial interface ch.6
output pin
SOT6_0
(SDA6_0)
6
11
7
84
89
85
D2
E3
D3
6
11
7
-
7
-
This pin operates as SOT6 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SDA6 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.6
clock I/O pin
SOT6_1
(SDA6_1)
SCK6_0
(SCL6_0)
This pin operates as SCK6 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL6 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.7
input pin
SCK6_1
(SCL6_1)
10
45
88
23
E2
K8
10
35
6
Multi
Function
Serial
7
SIN7_1
27
Multifunction serial interface ch.7
output pin
SOT7_1
This pin operates as SOT7 when it is
44
43
22
21
J7
34
33
26
25
(SDA7_1) used in a UART/CSIO (operation
modes 0 to 2) and as SDA7 when it is
used in an I2C (operation mode 4).
Multifunction serial interface ch.7
clock I/O pin
SCK7_1
(SCL7_1)
This pin operates as SCK7 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL7 when it is
used in an I2C (operation mode 4).
H6
36
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Multi
Function
Timer
0
Input signal controlling wave form
generator outputs RTO00 to RTO05 of
multi-function timer 0
DTTI0X_0
DTTI0X_1
18
96
F4
13
9
69
47
E9
-
-
FRCK0_0
FRCK0_1
FRCK0_2
IC00_0
IC00_1
IC00_2
IC01_0
IC01_1
IC01_2
IC02_0
IC02_1
IC02_2
IC03_0
IC03_1
IC03_2
13
70
53
17
65
54
16
66
55
15
67
56
14
68
57
91
48
31
95
43
32
94
44
33
93
45
34
92
46
35
F1
D11
J10
G2
F9
-
-
-
-
16-bit free-run timer ch.0 external
clock input pin
43
-
35
-
55
44
-
-
J8
36
-
G1
E11
H10
F3
56
45
-
-
16-bit input capture ch.0 input pin of
multi-function timer 0
ICxx describes channel number.
37
-
E10
H9
F2
-
-
46
-
38
-
F8
-
-
H7
47
39
RTO00_0
(PPG00_0)
Wave form generator output of
multi-function timer 0
This pin operates as PPG00 when it is
used in PPG 0 output modes.
19
71
97
49
G3
14
-
10
-
RTO00_1
(PPG00_1)
D10
Wave form generator output of
multi-function timer 0
(PPG00_0) This pin operates as PPG00 when it is
used in PPG 0 output modes.
Wave form generator output of
multi-function timer 0
(PPG02_0) This pin operates as PPG02 when it is
used in PPG 0 output modes.
Wave form generator output of
multi-function timer 0
(PPG02_0) This pin operates as PPG02 when it is
used in PPG 0 output modes.
Wave form generator output of
multi-function timer 0
(PPG04_0) This pin operates as PPG04 when it is
used in PPG 0 output modes.
RTO01_0
20
21
22
23
24
98
99
100
1
H1
H2
G4
H3
J2
15
16
17
18
19
11
12
13
14
15
RTO02_0
RTO03_0
RTO04_0
Wave form generator output of
multi-function timer 0
(PPG04_0) This pin operates as PPG04 when it is
used in PPG 0 output modes.
RTO05_0
2
DS706-00011-1v0-E
37
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Multi
Function
Timer
1
Input signal controlling wave form
generator outputs RTO10 to RTO15 of
multi-function timer 1
DTTI1X_0
DTTI1X_1
8
86
D5
8
-
39
17
K6
29
-
FRCK1_0
FRCK1_1
IC10_0
IC10_1
IC11_0
IC11_1
IC12_0
IC12_1
IC13_0
IC13_1
87
44
88
40
89
41
90
42
91
43
65
22
66
18
67
19
68
20
69
21
D7
J7
67
34
68
30
69
31
70
32
71
33
-
-
-
-
-
-
-
-
-
-
16-bit free-run timer ch.1 external
clock input pin
A6
J6
B6
L7
C6
K7
A5
H6
16-bit input capture ch.0 input pin of
multi-function timer 1
ICxx describes channel number.
RTO10_0
(PPG10_0)
Wave form generator output of
multi-function timer 1
This pin operates as PPG10 when it is
used in PPG 1 output modes.
2
27
3
80
5
C1
J4
2
-
-
-
-
-
-
-
-
-
-
-
-
-
RTO10_1
(PPG10_1)
RTO11_0
(PPG10_0)
Wave form generator output of
multi-function timer 1
This pin operates as PPG10 when it is
used in PPG 1 output modes.
81
6
C2
L5
B3
K5
D1
J5
3
-
RTO11_1
(PPG10_1)
28
4
RTO12_0
(PPG12_0)
Wave form generator output of
multi-function timer 1
This pin operates as PPG12 when it is
used in PPG 1 output modes.
82
7
4
-
RTO12_1
(PPG12_1)
29
5
RTO13_0
(PPG12_0)
Wave form generator output of
multi-function timer 1
This pin operates as PPG12 when it is
used in PPG 1 output modes.
83
8
5
-
RTO13_1
(PPG12_1)
30
6
RTO14_0
(PPG14_0)
Wave form generator output of
multi-function timer 1
This pin operates as PPG14 when it is
used in PPG 1 output modes.
84
9
D2
H5
D3
L6
6
21
7
22
RTO14_1
(PPG14_1)
31
7
RTO15_0
(PPG14_0)
Wave form generator output of
multi-function timer 1
This pin operates as PPG14 when it is
used in PPG 1 output modes.
85
10
RTO15_1
(PPG14_1)
32
38
DS706-00011-1v0-E
MB9A110 Series
Pin No
Module
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
Quadrature
Position/
Revolution
Counter
0
AIN0_0
AIN0_1
AIN0_2
BIN0_0
BIN0_1
BIN0_2
ZIN0_0
ZIN0_1
ZIN0_2
AIN1_1
AIN1_2
BIN1_1
BIN1_2
ZIN1_1
ZIN1_2
9
87
18
80
88
19
81
89
20
82
52
21
51
22
50
23
E1
9
5
QPRC ch.0 AIN input pin
40
2
J6
30
2
22
2
C1
E2
L7
C2
E3
K7
B3
C10
H6
C11
J7
10
41
3
10
31
3
6
QPRC ch.0 BIN input pin
QPRC ch.0 ZIN input pin
23
3
11
42
4
11
32
4
7
24
4
Quadrature
Position/
Revolution
Counter
1
74
43
73
44
72
45
60
33
59
34
58
35
-
QPRC ch.1 AIN input pin
QPRC ch.1 BIN input pin
QPRC ch.1 ZIN input pin
25
-
26
-
E8
K8
27
DS706-00011-1v0-E
39
MB9A110 Series
Pin No
Module
RESET
Mode
Pin name
Function
LQFP- QFP- BGA- LQFP-LQFP-
100 100 112
80
64
External Reset Input. A reset is valid
when INITX=L
Mode 0 pin
During normal operation, MD0=L
must be input. During serial
programming to flash memory,
MD0=H must be input.
Mode 1 pin
INITX
38
16
K4
L8
28
21
MD0
47
25
37
29
MD1
During serial programming to flash
memory, MD1=L must be input.
Power Pin
Power Pin
Power pin
Power pin
Power pin
Power pin
GND Pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
GND pin
Main clock (oscillation) input pin
Sub clock (oscillation) input pin
Main clock (oscillation) I/O pin
Sub clock (oscillation) I/O pin
46
24
K9
36
28
POWER
GND
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
X0
1
26
35
51
76
97
-
25
-
-
79
4
B1
J1
1
-
25
41
-
77
-
20
-
-
-
24
40
-
-
-
-
-
-
-
-
-
1
-
18
33
-
61
-
16
-
-
-
-
32
-
-
-
-
-
-
-
-
-
13
29
54
75
-
3
-
-
-
12
28
-
-
-
-
-
53
-
-
K1
K11
A10
A4
B2
L1
K2
J3
H4
L4
L11
K10
J9
H8
B10
C9
A11
D8
D4
C3
-
34
50
-
-
-
-
-
75
-
-
-
-
100
48
36
49
37
74
78
26
14
27
15
52
A1
L9
L3
L10
K3
C10
80
38
26
39
27
60
64
30
19
31
20
-
CLOCK
X0A
X1
X1A
CROUT_0
Internal CR-osc clock output port
CROUT_1
AVCC
92
60
70
38
B5
H11
72
50
57
41
ADC
POWER
A/D converter analog power pin
A/D converter analog reference
voltage input pin
AVRH
61
39
F11
51
42
ADC
GND
C pin
AVSS
C
A/D converter GND pin
62
33
40
11
G11
L2
52
23
43
17
Power stabilization capacity pin
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
40
DS706-00011-1v0-E
MB9A110 Series
I/O CIRCUIT TYPE
Type
Circuit
Remarks
A
x It is possible to select the
main oscillation / GPIO
function
When the main oscillation is
selected.
P-ch
N-ch
Digital output
Digital output
x Oscillation feedback resistor
: Approximately 1MΩ
x With Standby mode control
P-ch
X1
When the GPIO is selected.
x CMOS level output.
x CMOS level hysteresis input
x With pull-up resistor control
x With standby mode control
x Pull-up resistor
R
Pull-up resistor control
Digital input
: Approximately 50kΩ
x IOH = -4mA, IOL = 4mA
Standby mode control
Clock input
Standby mode control
Digital input
Standby mode control
R
P-ch
P-ch
N-ch
Digital output
Digital output
X0
Pull-up resistor control
B
x CMOS level hysteresis input
x Pull-up resistor
: Approximately 50kΩ
Pull-up resistor
CMOS level
hysteresis input
DS706-00011-1v0-E
41
MB9A110 Series
Type
Circuit
Remarks
C
x Open drain output
x CMOS level hysteresis input
Digital Input
Control Pin
D
x It is possible to select the sub
oscillation / GPIO function
When the sub oscillation is
selected.
x Oscillation feedback resistor
: Approximately 5MΩ
x With Standby mode control
P-ch
N-ch
Digital output
P-ch
X1A
When the GPIO is selected.
x CMOS level output.
Digital output
x CMOS level hysteresis input
x With pull-up resistor control
x With standby mode control
x Pull-up resistor
R
Pull-up resistor control
Digital input
: Approximately 50kΩ
Standby mode control
x IOH = -4mA, IOL = 4mA
Clock input
Standby mode control
Digital input
Standby mode control
R
P-ch
P-ch
N-ch
Digital output
Digital output
X0A
Pull-up resistor control
42
DS706-00011-1v0-E
MB9A110 Series
Type
Circuit
Remarks
E
x CMOS level output
x CMOS level hysteresis input
x With pull-up resistor control
x With standby mode control
x Pull-up resistor
: Approximately 50kΩ
x IOH = -4mA, IOL = 4mA
P-ch
P-ch
N-ch
Digital output
Digital output
Pull-up resistor control
Digital input
Standby mode control
F
x CMOS level output
x CMOS level hysteresis input
x With input control
x Analog input
x With pull-up resistor control
x With standby mode control
x Pull-up resistor
: Approximately 50kΩ
x IOH = -4mA, IOL = 4mA
P-ch
N-ch
P-ch
Digital output
Digital output
Pull-up resistor control
Digital input
Standby mode control
Analog input
Input control
DS706-00011-1v0-E
43
MB9A110 Series
Type
Circuit
Remarks
G
x CMOS level output
x CMOS level hysteresis input
x With pull-up resistor control
x With standby mode control
x Pull-up resistor
: Approximately 50kΩ
x IOH = -12mA, IOL = 12mA
P-ch
P-ch
N-ch
Digital output
Digital output
Pull-up resistor control
Digital input
Standby mode control
H
x CMOS level output
x CMOS level hysteresis input
x With standby mode control
x IOH = -20.5mA, IOL = 18.5mA
P-ch
Digital output
Digital output
N-ch
Digital input
Standby mode control
44
DS706-00011-1v0-E
MB9A110 Series
Type
Circuit
Remarks
I
x CMOS level output
x CMOS level hysteresis input
x 5V tolerant
x With standby mode control
x IOH = -4mA, IOL = 4mA
P-ch
N-ch
Pull-up resistor
Digital output
Digital input
Standby mode control
J
CMOS level hysteresis input
Mode Input
DS706-00011-1v0-E
45
MB9A110 Series
HANDLING PRECAUTIONS
Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly
affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This
page describes precautions that must be observed to minimize the chance of failure and to obtain higher
reliability from your FUJITSU SEMICONDUCTOR semiconductor devices.
1. Precautions for Product Design
This section describes precautions when designing electronic equipment using semiconductor devices.
x Absolute Maximum Ratings
Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature,
etc.) in excess of certain established limits, called absolute maximum ratings. Do not exceed these ratings.
x Recommended Operating Conditions
Recommended operating conditions are normal operating ranges for the semiconductor device. All the
device's electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside these
ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data
sheet. Users considering application outside the listed conditions are advised to contact their sales
representative beforehand.
x Processing and Protection of Pins
These precautions must be followed when handling the pins which connect semiconductor devices to power
supply and input/output functions.
(1) Preventing Over-Voltage and Over-Current Conditions
Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause
deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to
prevent such overvoltage or over-current conditions at the design stage.
(2) Protection of Output Pins
Shorting of output pins to supply pins or other output pins, or connection to large capacitance can
cause large current flows. Such conditions if present for extended periods of time can damage the
device.
Therefore, avoid this type of connection.
(3) Handling of Unused Input Pins
Unconnected input pins with very high impedance levels can adversely affect stability of operation.
Such pins should be connected through an appropriate resistance to a power supply pin or ground pin.
x Latch-up
Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When
subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may
be formed, causing large current levels in excess of several hundred mA to flow continuously at the power
supply pin. This condition is called latch-up.
CAUTION: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but
can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the
following:
(1) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should
include attention to abnormal noise, surge levels, etc.
(2) Be sure that abnormal current flows do not occur during the power-on sequence.
Code: DS00-00004-1Ea
DS706-00011-1v0-E
46
MB9A110 Series
x Observance of Safety Regulations and Standards
Most countries in the world have established standards and regulations regarding safety, protection from
electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards
in the design of products.
x Fail-Safe Design
Any semiconductor devices have inherently a certain rate of failure. You must protect against injury,
damage or loss from such failures by incorporating safety design measures into your facility and equipment
such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating
conditions.
x Precautions Related to Usage of Devices
FUJITSU SEMICONDUCTOR semiconductor devices are intended for use in standard applications
(computers, office automation and other office equipment, industrial, communications, and measurement
equipment, personal or household devices, etc.).
CAUTION: Customers considering the use of our products in special applications where failure or
abnormal operation may directly affect human lives or cause physical injury or property damage, or where
extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea
floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult
with sales representatives before such use. The company will not be responsible for damages arising from
such use without prior approval.
2. Precautions for Package Mounting
Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance
during soldering, you should only mount under FUJITSU SEMICONDUCTOR's recommended conditions.
For detailed information about mount conditions, contact your sales representative.
x Lead Insertion Type
Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct
soldering on the board, or mounting by using a socket.
Direct mounting onto boards normally involves processes for inserting leads into through-holes on the
board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the
soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for
storage temperature. Mounting processes should conform to FUJITSU SEMICONDUCTOR recommended
mounting conditions.
If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can
lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment
of socket contacts and IC leads be verified before mounting.
x Surface Mount Type
Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are
more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in
increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges.
You must use appropriate mounting techniques. FUJITSU SEMICONDUCTOR recommends the solder
reflow method, and has established a ranking of mounting conditions for each product. Users are advised to
mount packages in accordance with FUJITSU SEMICONDUCTOR ranking of recommended conditions.
DS706-00011-1v0-E
47
MB9A110 Series
x Lead-Free Packaging
CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic
soldering, junction strength may be reduced under some conditions of use.
x Storage of Semiconductor Devices
Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions
will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed
moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent,
do the following:
(1) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product.
Store products in locations where temperature changes are slight.
(2) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at
temperatures between 5°C and 30°C.
When you open Dry Package that recommends humidity 40% to 70% relative humidity.
(3) When necessary, FUJITSU SEMICONDUCTOR packages semiconductor devices in highly
moisture-resistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in
their aluminum laminate bags for storage.
(4) Avoid storing packages where they are exposed to corrosive gases or high levels of dust.
x Baking
Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU
SEMICONDUCTOR recommended conditions for baking.
Condition: 125°C/24 h
x Static Electricity
Because semiconductor devices are particularly susceptible to damage by static electricity, you must take
the following precautions:
(1) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus
for ion generation may be needed to remove electricity.
(2) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment.
(3) Eliminate static body electricity by the use of rings or bracelets connected to ground through high
resistance (on the level of 1 MΩ).
Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to
minimize shock loads is recommended.
(4) Ground all fixtures and instruments, or protect with anti-static measures.
(5) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board
assemblies.
48
DS706-00011-1v0-E
MB9A110 Series
3. Precautions for Use Environment
Reliability of semiconductor devices depends on ambient temperature and other conditions as described
above.
For reliable performance, do the following:
(1) Humidity
Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high
humidity levels are anticipated, consider anti-humidity processing.
(2) Discharge of Static Electricity
When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal
operation. In such cases, use anti-static measures or processing to prevent discharges.
(3) Corrosive Gases, Dust, or Oil
Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will
adversely affect the device. If you use devices in such conditions, consider ways to prevent such
exposure or to protect the devices.
(4) Radiation, Including Cosmic Radiation
Most devices are not designed for environments involving exposure to radiation or cosmic radiation.
Users should provide shielding as appropriate.
(5) Smoke, Flame
CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible
substances. If devices begin to smoke or burn, there is danger of the release of toxic gases.
Customers considering the use of FUJITSU SEMICONDUCTOR products in other special
environmental conditions should consult with sales representatives.
Please check the latest handling precautions at the following URL.
http://edevice.fujitsu.com/fj/handling-e.pdf
DS706-00011-1v0-E
49
MB9A110 Series
HANDLING DEVICES
z Power supply pins
In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected
within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be
connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels,
to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the
total output current rating.
Moreover, connect the current supply source with the VCC and VSS pins of this device at low impedance.
It is also advisable that a ceramic capacitor of approximately 0.1 µF be connected as a bypass capacitor
between VCC and VSS near this device.
z Crystal oscillator circuit
Noise near the X0/X1 and X0A/X1A pins may cause the device to malfunction. Design the printed circuit
board so that X0/X1, X0A/X1A pins, the crystal oscillator (or ceramic oscillator), and the bypass capacitor
to ground are located as close to the device as possible.
It is strongly recommended that the PC board artwork be designed such that the X0/X1 and X0A/X1A pins
are surrounded by ground plane as this is expected to produce stable operation.
z Using an external clock
When using an external clock, the clock signal should be input to the X0,X0A pin only and the X1,X1A pin
should be kept open.
• Example of Using an External Clock
Device
X0(X0A)
Open
X1(X1A)
z Handling when using Multi function serial pin as I2C pin
If it is using multi function serial pin as I2C pins, P-ch transistor of digital output is always disable.
However, I2C pins need to keep the electrical characteristic like other pins and not to connect to external I2C
bus system with power OFF.
50
DS706-00011-1v0-E
MB9A110 Series
z C Pin
As this series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 µF to
the C pin for use by the regulator.
C
Device
4.7μF
VSS
GND
z Mode pins (MD0)
Connect the MD pin (MD0) directly to VCC or VSS pins. Design the printed circuit board such that the
pull-up/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins
is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for
switching the pin level and rewriting the Flash memory data. It is because of preventing the device
erroneously switching to test mode due to noise.
z Notes on power-on
Turn power on/off in the following order or at the same time.
If not using the A/D converter, connect AVCC =VCC and AVSS = VSS.
Turning on : VCC → AVCC → AVRH
Turning off : AVRH → AVCC → VCC
z Serial Communication
There is a possibility to receive wrong data due to the noise or other causes on the serial communication.
Therefore, design a printed circuit board so as to avoid noise.
Consider the case of receiving wrong data due to noise, perform error detection such as by applying a
checksum of data at the end. If an error is detected, retransmit the data.
z Differences in features among the products with different memory sizes and
between Flash products and MASK products
The electric characteristics including power consumption, ESD, latch-up, noise characteristics, and
oscillation characteristics among the products with different memory sizes and between Flash products and
MASK products are different because chip layout and memory structures are different.
If you are switching to use a different product of the same series, please make sure to evaluate the electric
characteristics.
DS706-00011-1v0-E
51
MB9A110 Series
BLOCK DIAGRAM
MB9 AF111 L/ M / N , F112 L/ M / N, F114 L/ M / N , F115 M / N, F116 M / N
TRST X,TCK
TDI,TMS
SRAM0
8/ 16
Kbyte
1
SWJ-DP
ETM*
TDO
TRACED [3:0],
TRACECLK
ROM
Table
1
TPIU
*
On-Chip
Flash
64/ 128/ 256/ 384/ 512
Kbyte
Cortex -M3 Core
@40MHz(Max.)
Flash I/F
Security
I
D
NVIC
Sys
SRAM1
8/ 16
Dual -Timer
Kbyte
WatchDog Timer
(Software
)
Clock Reset
Generator
INITX
WatchDog Timer
(Hardware
)
DMAC
8ch
CSV
RST
CLK
X0
Main
Osc
PLL
X1
Sub.
Osc
CR
4MHz
CR
100kHz
X0A
X1A
MAD[24:0]
AVCC
AVSS,AVRH
,
2
MADATA[15:0]
12bit A / D Converter
Unit 0
External Bus IF *
MCSX [7:0],
MOEX,MWEX ,
MALE
AN [15:0]
MRDY
Unit 1
MCLKOUT
MDQM [1:0]
ADTG[8:0]
2
Unit 2
*
Power On
Reset
TIOA [7:0]
TIOB [ 7: 0]
Base Timer
16-bit 8ch /
32-bit 4ch
LVD
LVD Ctrl
Regulator
C
IRQ- Monitor
AIN [1:0]
BIN [1:0]
ZIN[1:0]
QPRC
2ch
CRC
Accelerator
A/ D Activation
Compare
3ch
Watch Counter
External Interrupt
Controller
16-pin + NMI
INT[15:0]
NMI X
IC0[3:0]
IC1[3:0]
16-bit Input Capture
4ch
16-bit Free -Run
FRCK [1:0]
Timer
3ch
MD[1:0]
MODE -Ctrl
GPIO
16-bit Output
Compare
6ch
Waveform
Generator
3ch
P0[F:0],
P1[F:0],
・
PIN-Function -Ctrl
DTTI [1:0]X
・
Px[x:0],
RTO 0[5:0]
RTO 1[5:0]
SCK [7:0]
SIN[7:0]
SOT[7:0]
CTS4
Multi Serial IF
8ch
16-bit PPG
3ch
(with FIFO ch .4 to 7)
& HW flow control (ch .4)*2
RTS4
Multi Function Timer x
2
*1: For the MB9AF111L/M, F112L/M, MB9AF114L/M, MB9AF315M and MB9AF316M, ETM is not
available.
*2: For the MB9AF111L, F112L and MB9AF114L, External Bus Interface and 12-bit A/D Converter (unit 2)
are not available. And Multi-function Serial Interface does not support hardware flow control in these
products.
52
DS706-00011-1v0-E
MB9A110 Series
Product device MB9AF111L/M/N MB9AF112L/M/N MB9AF114L/M/N
On-Chip Flash
SRAM0
SRAM1
64Kbyte
8Kbyte
8Kbyte
128Kbyte
8Kbyte
8Kbyte
256Kbyte
16Kbyte
16Kbyte
Product device
MB9AF115M/N MB9AF116M/N
On-Chip Flash
SRAM0
SRAM1
384Kbyte
16Kbyte
16Kbyte
512Kbyte
16Kbyte
16Kbyte
DS706-00011-1v0-E
53
MB9A110 Series
MEMORY MAP
z MB9A110 Series Memory Map (1)
Peripherals Area
Reserved
0x41FF_FFFF
0x4006_4000
0xFFFF_FFFF
Reserved
Reserved
Reserved
Reserved
DMAC
0x4006_3000
0x4006_2000
0xE010_0000
0xE000_0000
Cortex-M3 Private
Peripherals
0x4006_1000
0x4006_0000
Reserved
0x4005_0000
Reserved
EXT-bus I/F
Reserved
0x4004_0000
0x4003_F000
External Device Area
0x4003_B000
Watch Counter
CRC
0x4003_A000
0x4003_9000
0x4003_8000
0x4003_7000
0x4003_6000
0x4003_5000
0x4003_4000
0x4003_3000
0x4003_2000
0x4003_1000
0x4003_0000
0x4002_F000
0x4002_E000
0x6000_0000
MFS
Reserved
Reserved
Reserved
LVD
0x4400_0000
0x4200_0000
0x4000_0000
32Mbyte
Bit band alias
Reserved
GPIO
Peripherals
Reserved
Reserved
Int-Req. Read
EXTI
Reserved
CR Trim
0x2400_0000
0x2200_0000
32Mbyte
Bit band alias
Reserved
0x4002_8000
A/DC
QPRC
Reserved
0x4002_7000
0x4002_6000
0x4002_5000
0x4002_4000
Base Timer
PPG
0x2008_0000
0x2000_0000
0x1FF8_0000
SRAM1
SRAM0
Reserved
0x4002_2000
0x4002_1000
Reserved
Please refer to
MB9A110 Series
Memory Map (2)”
for the memory
MFT unit 1
MFT unit 0
0x0010_2000
0x0010_0000
“
Security / CR Trim
0x4002_0000
Reserved
0x4001_6000
0x4001_5000
size details.
Dual Timer
Reserved
Flash
0x4001_3000
0x0000_0000
SW WDT
HW WDT
0x4001_2000
0x4001_1000
Clock /Reset
0x4001_0000
Reserved
Flash I/F
0x4000_1000
0x4000_0000
54
DS706-00011-1v0-E
MB9A110 Series
z MB9A110 Series Memory Map (2)
0x2008_0000
0x2008_0000
0x2008_0000
Reserved
Reserved
Reserved
0x2000_4000
0x2000_0000
0x1FFF_C000
0x2000_4000
0x2000_0000
0x1FFF_C000
0x2000_4000
SRAM
16Kbyte
1
SRAM1
16Kbyte
SRAM1
16Kbyte
0x2000_0000
SRAM0
16Kbyte
SRAM0
16Kbyte
SRAM0
16Kbyte
0x1FFF_C000
Reserved
Reserved
Reserved
0x0010_2000
0x0010_1000
0x0010_0000
0x0010_2000
0x0010_1000
0x0010_0000
0x0010_2000
CR trimming
0x0010_1000
Security
CR trimming
Security
CR trimming
Security
0x0010_0000
Reserved
Reserved
0x0008_0000
Reserved
0x0006_0000
Flash 512Kbyte
0x0004_0000
Flash 384Kbyte
Flash 256Kbyte
0x0000_0000
0x0000_0000
0x0000_0000
MB9AF116/M/N
MB9AF115M/N
MB9AF114L/M/N
DS706-00011-1v0-E
55
MB9A110 Series
z MB9A110 Series Memory Map (3)
0x2008_0000
0x2008_0000
Reserved
Reserved
0x2000_2000
SRAM1
0x2000_2000
0x2000_0000
0x1FFF_E000
SRAM1
8Kbyte
8Kbyte
0x2000_0000
SRAM0
SRAM0
8Kbyte
8Kbyte
0x1FFF_E000
Reserved
Reserved
0x0010_2000
CR trimming
0x0010_1000
Security
0x0010_2000
0x0010_1000
0x0010_0000
CR trimming
Security
0x0010_0000
Reserved
Reserved
0x0002_0000
Flash 256Kbyte
0x0001_0000
0x0000_0000
Flash 64Kbyte
0x0000_0000
MB9AF112L/M/N
MB9AF111L/M/N
56
DS706-00011-1v0-E
MB9A110 Series
z Peripheral Address Map
Start address
End address
Bus
Peripherals
0x4000_0000H
0x4000_1000H
0x4001_0000H
0x4001_1000H
0x4001_2000H
0x4001_3000H
0x4001_5000H
0x4001_6000H
0x4002_0000H
0x4002_1000H
0x4002_2000H
0x4002_4000H
0x4002_5000H
0x4002_6000H
0x4002_7000H
0x4002_8000H
0x4002_E000H
0x4002_F000H
0x4003_0000H
0x4003_1000H
0x4003_2000H
0x4003_3000H
0x4003_4000H
0x4003_5000H
0x4003_6000H
0x4003_7000H
0x4003_8000H
0x4003_9000H
0x4003_A000H
0x4003_B000H
0x4003_F000H
0x4004_0000H
0x4005_0000H
0x4006_0000H
0x4006_1000H
0x4006_2000H
0x4006_3000H
0x4006_4000H
0x4000_0FFFH
0x4000_FFFFH
0x4001_0FFFH
0x4001_1FFFH
0x4001_2FFFH
0x4001_4FFFH
0x4001_5FFFH
0x4001_FFFFH
0x4002_0FFFH
0x4002_1FFFH
0x4002_3FFFH
0x4002_4FFFH
0x4002_5FFFH
0x4002_6FFFH
0x4002_7FFFH
0x4002_DFFFH
0x4002_EFFFH
0x4002_FFFFH
0x4003_0FFFH
0x4003_1FFFH
0x4003_2FFFH
0x4003_3FFFH
0x4003_4FFFH
0x4003_5FFFH
0x4003_6FFFH
0x4003_7FFFH
0x4003_8FFFH
0x4003_9FFFH
0x4003_AFFFH
0x4003_EFFFH
0x4003_FFFFH
0x4004_FFFFH
0x4005_FFFFH
0x4006_0FFFH
0x4006_1FFFH
0x4006_2FFFH
0x4006_3FFFH
0x41FF_FFFFH
Flash I/F register
Reserved
AHB
Clock/Reset Control
Hardware Watchdog timer
Software Watchdog timer
Reserved
APB0
Dual-Timer
Reserved
Multi-function timer unit0
Multi-function timer unit1
Reserved
PPG
Base Timer
APB1
Quadrature Position/Revolution Counter
A/D Converter
Reserved
Internal CR trimming
Reserved
External Interrupt Controller
Interrupt Request Batch-Read Function
Reserved
GPIO
Reserved
Low Voltage Detector
Reserved
APB2
Reserved
Multi-function serial Interface
CRC
Watch Counter
Reserved
External Memory interface
Reserved
Reserved
DMAC register
Reserved
AHB
Reserved
Reserved
Reserved
DS706-00011-1v0-E
57
MB9A110 Series
PIN STATUS IN EACH CPU STATE
The terms used for pin status have the following meanings.
x INITX=0
This is the period when the INITX pin is the "L" level.
x INITX=1
This is the period when the INITX pin is the "H" level.
x SPL=0
This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is
set to "0".
x SPL=1
This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is
set to "1".
x Input enabled
Indicates that the input function can be used.
x Internal input fixed at "0"
This is the status that the input function cannot be used. Internal input is fixed at "L".
x Hi-Z
Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state.
x Setting disabled
Indicates that the setting is disabled.
x Maintain previous state
Maintains the state that was immediately prior to entering the current mode.
If a built-in peripheral function is operating, the output follows the peripheral function.
If the pin is being used as a port, that output is maintained.
x Analog input is enabled
Indicates that the analog input is enabled.
x Trace output
Indicates that the trace function can be used.
58
DS706-00011-1v0-E
MB9A110 Series
z LIST OF PIN STATUS
Power-on reset
Device
internal reset sleep mode
Run mode or
INITX input
state
Timer mode or sleep mode
or low voltage
state
detection state
Function group Power supply
state
state
Power supply
stable
Pin status
type
Power supply stable
Power supply stable
INITX=1
unstable
-
-
INITX=0
-
INITX=1
-
INITX=1
-
SPL=0
Maintain
previous
state
SPL=1
Output
Hi-Z/
Internal
input fixed
at "0"
A
GPIO selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Main crystal
oscillator input
pin
Input enabled
Input
enabled
Input
enabled
Input
enabled
Input
enabled
Input
enabled
B
GPIO selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous
state
Output
Hi-Z/
Internal
input fixed
at "0"
Main crystal
oscillator output
pin
Hi-Z/
Internal input
fixed at "0"/
or Input
Hi-Z/
Internal
input fixed
at "0"
Hi-Z/
Internal
input fixed
at "0"
Maintain
previous
state
Maintain
previous
state/ Hi-Z
Maintain
previous
state/ Hi-Z
at oscillation at oscillation
stop*1/
Internal
input fixed
at "0"
stop*1/
Internal
input fixed
at "0"
enable
C
INITX input pin
Mode input pin
Pull-up/ Input
enabled
Pull-up/
Input
enabled
Input
enabled
Pull-up/
Input
enabled
Setting
disabled
Pull-up/
Input
enabled
Input
enabled
Pull-up/
Input
enabled
Setting
disabled
Pull-up/
Input
enabled
Input
enabled
Maintain
previous
state
Pull-up/
Input
enabled
Input
enabled
Maintain
previous
state
Pull-up/
Input
enabled
Input
enabled
Maintain
previous
state
D
E
Input enabled
Hi-Z
JTAG
selected
GPIO
selected
Setting
disabled
Output
Hi-Z/
Internal
input fixed
at "0"
F
Trace selected
External interrupt
enabled selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous
state
Trace output
Maintain
previous
state
GPIO
selected, or other
than above
Hi-Z
Hi-Z/
Input
enabled
Hi-Z/
Input
enabled
Hi-Z/
Internal
input fixed
at "0"
resource selected
DS706-00011-1v0-E
59
MB9A110 Series
Power-on reset
or low voltage
detection state
Function group Power supply
Device
internal reset sleep mode
Run mode or
INITX input
state
Timer mode or sleep mode
state
state
state
Power supply
stable
Pin status
type
Power supply stable
Power supply stable
INITX=1
unstable
-
-
INITX=0
-
INITX=1
-
INITX=1
-
SPL=0
Maintain
previous
state
SPL=1
G
Trace selected
Setting
disabled
Hi-Z
Setting
disabled
Hi-Z/
Input
enabled
Setting
disabled
Hi-Z/
Input
enabled
Maintain
previous
state
Trace output
GPIO selected,
or other than
above resource
selected
Hi-Z/
Internal
input fixed
at "0"
H
External interrupt
enabled selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous
state
Maintain
previous
state
GPIO selected,
or other than
above resource
selected
Hi-Z
Hi-Z
Hi-Z/
Input
enabled
Hi-Z/
Input
enabled
Hi-Z/
Internal
input fixed
at "0"
I
GPIO selected,
resource selected
Hi-Z/
Input
enabled
Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output
Hi-Z/
Internal
input fixed
at "0"
J
NMIX selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous
state
Maintain
previous
state
GPIO selected,
or other than
above resource
selected
Hi-Z
Hi-Z/
Input
enabled
Hi-Z/
Input
enabled
Hi-Z/
Internal
input fixed
at "0"
60
DS706-00011-1v0-E
MB9A110 Series
Power-on reset
or low voltage
detection state
Function group Power supply
Device
internal reset sleep mode
Run mode or
INITX input
state
Timer mode or sleep mode
state
state
state
Power supply
stable
Pin status
type
Power supply stable
Power supply stable
INITX=1
unstable
-
-
INITX=0
-
INITX=1
-
INITX=1
-
SPL=0
SPL=1
K
Analog input
selected
Hi-Z
Hi-Z/
Internal
input fixed
at "0"/
Hi-Z/
Internal
input fixed
at "0"/
Hi-Z/
Internal
input fixed
at "0"/
Hi-Z/
Hi-Z/
Internal
input fixed
at "0"/
Internal
input fixed
at "0"/
Analog
input
Analog
input
Analog
input
Analog
input
Analog
input
enabled
Setting
disabled
enabled
Setting
disabled
enabled
Maintain
previous
state
enabled
Maintain
previous
state
enabled
Hi-Z/
Internal
input fixed
at "0"
GPIO selected,
or other than
above resource
selected
Setting
disabled
L
External interrupt
enabled selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous
state
Maintain
previous
state
Analog input
selected
Hi-Z
Hi-Z/
Internal
input fixed
at "0"/
Hi-Z/
Internal
input fixed
at "0"/
Hi-Z/
Hi-Z/
Hi-Z/
Internal
input fixed
at "0"/
Internal
input fixed
at "0"/
Internal
input fixed
at "0"/
Analog
input
Analog
input
Analog
input
Analog
input
Analog
input
enabled
Setting
disabled
enabled
Setting
disabled
enabled
Maintain
previous
state
enabled
Maintain
previous
state
enabled
Hi-Z/
Internal
input fixed
at "0"
GPIO selected,
or other than
above resource
selected
Setting
disabled
M
GPIO selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous
state
Output
Hi-Z/
Internal
input fixed
at "0"
Input
enabled
Input
enabled
Input
enabled
Input
enabled
Sub crystal
oscillator input
pin
Input
enabled
Input
enabled
DS706-00011-1v0-E
61
MB9A110 Series
Power-on reset
or low voltage
detection state
Device
internal reset or sleep
Run mode
INITX input
state
Timer mode or sleep mode
state
state
mode state
Power
supply
stable
INITX=1
-
Pin status
type
Function group Power supply
unstable
Power supply stable
Power supply stable
INITX=1
-
-
INITX=0
-
INITX=1
-
SPL=0
SPL=1
N
GPIO selected
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous state
Output
Hi-Z/
Internal input
fixed at "0"
Maintain
previous
state/ Hi-Z at
oscillation
stop*2/
Sub crystal
oscillator output
pin
Hi-Z/
Internal input
fixed at "0"/
or Input
Hi-Z/
Internal
input fixed
at "0"
Hi-Z/
Internal
input fixed
at "0"
Maintain
previous
state
Maintain
previous
state/ Hi-Z at
oscillation
stop*2/
enable
Internal input Internal input
fixed at "0"
Maintain
previous state Hi-Z/ Internal
input fixed at
fixed at "0"
Output
O
P
GPIO pin
Hi-Z
Hi-Z/
Input
enabled
Hi-Z/
Input
enabled
Maintain
previous
state
"0"
Mode input pin
GPIO selected
Input enabled
Input
enabled
Input
enabled
Input
enabled
Input enabled Input enabled
Setting
disabled
Setting
disabled
Setting
disabled
Maintain
previous
state
Maintain
previous state
Output
Hi-Z/Input
enabled
*1 : Oscillation is stopped at sub timer mode, low speed CR timer mode, and stop mode.
*2 : Oscillation is stopped at stop mode.
62
DS706-00011-1v0-E
MB9A110 Series
ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Rating
Parameter
Symbol
Unit
Remarks
Min
Max
Vss + 6.5
Vss + 6.5
Vss + 6.5
Vcc + 0.5
(≤ 6.5V)
Vss + 6.5
AVcc + 0.5
(≤ 6.5V)
Vcc + 0.5
(≤ 6.5V)
10
Power supply voltage*1, *2
Vcc
AVcc
AVRH
Vss - 0.5
Vss - 0.5
Vss - 0.5
V
V
V
Analog power supply voltage*1, *3
Analog reference voltage*1, *3
Vss - 0.5
Vss - 0.5
Vss - 0.5
V
V
V
Input voltage*1
VI
5V tolerant
Analog pin input voltage*1
Output voltage*1
VIA
VO
Vss - 0.5
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mW
°C
4mA type
12mA type
4mA type
12mA type
"L" level maximum output current*4
"L" level average output current*5
IOL
-
-
20
4
12
100
50
- 10
- 20
- 4
- 12
- 100
- 50
300
IOLAV
"L" level total maximum output current
"L" level total average output current*6
∑IOL
∑IOLAV
-
-
4mA type
12mA type
4mA type
12mA type
"H" level maximum output current*4
IOH
-
-
"H" level average output current*5
IOHAV
"H" level total maximum output current
"H" level total average output current*6
Power consumption
∑IOH
∑IOHAV
PD
-
-
-
Storage temperature
TSTG
- 55
+ 150
*1 : These parameters are based on the condition that Vss = AVss = 0.0V.
*2 : Vcc must not drop below Vss - 0.5V.
*3 : Be careful not to exceed Vcc + 0.5 V, for example, when the power is turned on.
*4 : The maximum output current is the peak value for a single pin.
*5 : The average output is the average current for a single pin over a period of 100 ms.
*6 : The total average output current is the average current for all pins over a period of 100 ms.
<WARNING>
Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature,
etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS706-00011-1v0-E
63
MB9A110 Series
2. Recommended Operating Conditions
(Vss = AVss = 0.0V)
Value
Max
Parameter
Symbol Conditions
Unit
Remarks
Min
2.7
2.7
Power supply voltage
Analog power supply voltage
Analog reference voltage
FPT-100P-M20
Vcc
AVcc
AVRH
-
-
-
5.5
5.5
V
V
V
AVcc = Vcc
AVss
AVcc
FPT-100P-M23
FPT-80P-M21
FPT-80P-M37
FPT-64P-M24
FPT-64P-M38
FPT-64P-M23
FPT-64P-M39
BGA-112P-M04
FPT-100P-M06
Ta
-
- 40
+ 105
°C
°C
Operating
temperature
When
mounted on
four-layer
PCB
- 40
- 40
- 40
+ 105
+ 105
+ 85
Ta
When
°C Icc ≤ 35mA
mounted on
double-sided
single-layer
PCB
°C Icc > 35mA
<WARNING>
The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device's electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure. No warranty is made
with respect to uses, operating conditions, or combinations not represented on the data sheet. Users
considering application outside the listed conditions are advised to contact their representatives beforehand.
64
DS706-00011-1v0-E
MB9A110 Series
z DC Characteristics
1. Current rating
(Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, Ta = - 40°C to + 105°C)
Pin
name
Value
Typ Max
Parameter Symbol
Conditions
Unit
Remarks
Min
CPU : 40MHz,
Peripheral : 40MHz,
Flash 0Wait
FRWTR.RWT = 00
FSYNDN.SD = 000
*1
CPU : 40MHz,
Peripheral : 40MHz,
Flash 3Wait
FRWTR.RWT = 00
FSYNDN.SD = 011
*1
-
32
21
41
28
mA
Normal operation
(PLL)
Vcc=5.5V
-
mA
CPU/ Peripheral : 4MHz
*1, *2
mA Flash 0Wait
FRWTR.RWT = 00
Normal operation
(built-in
high-speed CR)
Vcc=5.5V
Icc
-
-
3.9
7.7
3.2
FSYNDN.SD = 000
CPU/ Peripheral : 32kHz
Flash 0Wait
Normal operation
(sub oscillation)
Vcc=5.5V
0.15
mA FRWTR.RWT = 00
FSYNDN.SD = 000
*1
Power
supply
current
Vcc
CPU/ Peripheral :
100kHz
Flash 0Wait
FRWTR.RWT = 00
FSYNDN.SD = 000
*1
Normal operation
(built-in
low-speed CR)
Vcc=5.5V
-
0.2
3.3
mA
SLEEP operation
(PLL)
Vcc=5.5V
SLEEP operation
(built-in
high-speed CR)
Vcc=5.5V
SLEEP operation
(sub oscillation)
Vcc=5.5V
SLEEP operation
(built in
low-speed CR)
Vcc=5.5V
Peripheral : 40MHz
-
-
-
-
10
1.2
0.1
0.1
15
4.4
3.1
3.1
mA
*1
Peripheral : 4MHz
*1, *2
mA
Iccs
Peripheral : 32kHz
mA
*1
Peripheral : 100kHz
mA
*1
DS706-00011-1v0-E
65
MB9A110 Series
Pin
Parameter Symbol
name
Value
Min Typ Max
Conditions
Unit
Remarks
Ta = + 25°C,
-
-
-
-
35
-
200
μA When LVD is off
STOP mode
Vcc=5.5V
*1
ICCH
Ta = + 105°C,
mA When LVD is off
*1
Ta = + 25°C,
μA When LVD is off
*1
Ta = + 105°C,
mA When LVD is off
*1
3
Power
supply
current
60
-
230
3.1
TIMER mode
(sub oscillation)
Vcc=5.5V
Vcc
ICCT
Low voltage
detection
circuit (LVD)
power supply
current
At operation
Vcc=5.5V
for occurrence of
interrupt
ICCLVD
-
4
7
μA
*1: When all ports are fixed.
*2: When setting it to 4MHz by trimming.
66
DS706-00011-1v0-E
MB9A110 Series
2. Pin Characteristics
(Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, Ta = - 40°C to + 105°C)
Value
Min Typ Max
Parameter Symbol Pin name Conditions
Unit
Remarks
CMOS
"H" level
hysteresis
Vcc×
0.8
Vcc+
0.3
input
-
-
-
-
-
V
V
V
input pin,
MD0,1
5V tolerant
I/O
voltage
(hysteresis
input)
VIHS
Vcc×
0.8
Vss+
5.5
"L" level input
voltage
(hysteresis
input)
CMOS
hysteresis
input pin,
MD0,1
Vss-
0.3
Vcc×
0.2
VILS
-
Vcc ≥ 4.5 V
I
OH = - 4mA
Vcc-
0.5
4mA type
12mA type
P80,P81
-
-
-
-
-
Vcc
Vcc
Vcc
0.4
V
V
V
V
V
V
Vcc < 4.5 V
IOH = - 2mA
Vcc ≥ 4.5 V
"H" level
output voltage
I
OH = - 12mA
Vcc < 4.5 V
IOH = - 8mA
Vcc ≥ 4.5 V
Vcc-
0.5
VOH
I
OH = - 20.5mA Vcc-
Vcc < 4.5 V
IOH = - 13.0mA
Vcc ≥ 4.5 V
0.4
I
OL = 4mA
4mA type
12mA type
Vss
Vcc < 4.5 V
IOL = 2mA
Vcc ≥ 4.5 V
"L" level
output voltage
I
OL = 12mA
VOL
Vss
0.4
Vcc < 4.5 V
IOL = 8mA
Vcc ≥ 4.5 V
OL = 18.5mA
Vcc < 4.5 V
I
P80,P81
-
Vss
- 5
-
-
0.4
5
IOL = 10.5mA
Input leak
current
Pull-up
resistance
value
IIL
-
μA
kΩ
Vcc ≥ 4.5 V
25
80
50
80
100
200
RPU Pull-up pin
Other than
Vcc < 4.5 V
Input
capacitance
Vcc, Vss,
AVcc, AVss,
CIN
-
-
5
15
pF
AVRH
DS706-00011-1v0-E
67
MB9A110 Series
z AC Characteristics
(1) Main Clock Input Characteristics
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Pin
name
Parameter
Input frequency
Input clock cycle
Symbol
Conditions
Unit
Remarks
Min
Max
48
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
PWH/tCYLH
PWL/tCYLH
4
4
4
When crystal oscillator
is connected
When using external
clock
When using external
clock
When using external
clock
When using external
clock
MHz
MHz
ns
20
48
20
250
250
FCH
4
X0
X1
20.83
50
tCYLH
-
Input clock pulse
width
Input clock rise
time and fall time
45
-
55
5
%
tCF
tCR
-
-
-
-
-
-
-
-
-
ns
Base clock
FCC
FCP0
-
-
-
-
-
-
-
-
-
40
40
40
40
-
MHz
MHz
MHz
MHz
ns
(HCLK/FCLK)
APB0 bus clock
(PCLK0)
APB1 bus clock
(PCLK1)
APB2 bus clock
(PCLK2)
Base clock
(HCLK/FCLK)
APB0 bus clock
(PCLK0)
APB1 bus clock
(PCLK1)
Internal operating
clock
frequency
-
FCP1
-
FCP2
-
tCYCC
tCYCP0
tCYCP1
tCYCP2
25
25
25
25
Internal operating
clock
cycle time
-
ns
-
ns
APB2 bus clock
(PCLK2)
-
ns
tCYLH
0.8×Vcc
0.8×Vcc
0.2×Vcc
0.8×Vcc
0.2×Vcc
X0
PW H
PWL
tCF
tCR
Note: Please see the block diagram to refer the APB bus which peripherals connected.
Please see "Chapter: Clock" in "FM3 MB9Axxx / MB9Bxxx Series PERIPHERAL MANUAL" to refer
the detail of internal operating clock.
68
DS706-00011-1v0-E
MB9A110 Series
(2) Sub Clock Input Characteristics
Pin
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Typ
Parameter
Input frequency
Input clock cycle
Symbol
Conditions
Unit
Remarks
name
Min
Max
When crystal
-
-
32.768
-
kHz oscillator is
connected
FCL
When using
external clock
When using
external clock
When using
external clock
X0A
X1A
-
-
32
10
45
-
-
-
100
31.25
55
kHz
tCYLL
-
μs
Input clock pulse
width
PWH/tCYLL
PWL/tCYLL
%
tCYLL
0.8×Vcc
0.8×Vcc
0.2×Vcc
0.8×Vcc
0.2×Vcc
X0A
PW H
PWL
(3) Built-in CR Oscillation Characteristics
ꢀBuilt-in high-speed CR
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Typ Max
Parameter
Symbol
Conditions
Unit
Remarks
Min
Ta = + 25°C
3.96
4
4.04
When trimming*
Ta =
0°C to + 70°C
Ta =
- 40°C to + 105°C
Ta =
3.84
3.8
3
4
4
4
4.16
4.2
5
Clock frequency
FCRH
MHz
When not trimming
- 40°C to + 105°C
*: In the case of using the values in CR trimming area of Flashmemory at shipment for frequency trimming.
ꢀBuilt-in low-speed CR
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Typ Max
Parameter
Symbol
Conditions
Unit
Remarks
Min
Clock frequency
FCRL
-
50
100
150
kHz
DS706-00011-1v0-E
69
MB9A110 Series
(4-1) Operating Conditions of Main PLL (In the case of using main clock for input clock of PLL)
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
Unit
Remarks
Min Typ Max
PLL oscillation stabilization wait time
(LOCK UP time)*
tLOCK 100
-
-
μs
PLL input clock frequency
PLL multiple rate
PLL macro oscillation clock frequency
fPLLI
-
fPLLO
4
13
200
-
-
-
16
MHz
75 multiple
300 MHz
*: Time from when the PLL starts operating until the oscillation stabilizes.
(4-2) Operating Conditions of Main PLL (In the case of using built-in high speed CR)
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
Unit
Remarks
Min Typ Max
PLL oscillation stabilization wait time
(LOCK UP time)*
tLOCK 100
-
-
μs
PLL input clock frequency
PLL multiple rate
PLL macro oscillation clock frequency
fPLLI
-
fPLLO
3.8
50
190
4
-
-
4.2
MHz
71 multiple
300 MHz
*: Time from when the PLL starts operating until the oscillation stabilizes.
Note: It needs to input to PLL by built-in CR trimming frequency.
(5) Reset Input Characteristics
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Pin
name
Parameter
Symbol
Conditions
Unit Remarks
Min
Max
Reset input time
tINITX
INITX
-
500
-
ns
(6) Power-on Reset Timing
Parameter
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Pin
name
Symbol
Unit
Remarks
Min
Max
Power supply rising time
Tr
0
1
-
-
ms
ms
Vcc
Power supply shut down time
Toff
Tr
Toff
2.7V
Vcc
0.2V
0.2V
0.2V
70
DS706-00011-1v0-E
MB9A110 Series
(7) External Bus Timing
ꢀExternal bus clock output Characteristics
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
tCYCLE
-
Pin name
Conditions
Unit
Min
Max
Vcc ≥ 4.5 V
Vcc < 4.5 V
Vcc ≥ 4.5 V
Vcc < 4.5 V
-
-
25
40
32
-
MHz
MHz
ns
Output frequency
MCLKOUT
Minimum clock cycle
time
31.25
-
ns
Note: External bus clock output is divided clock of HCLK. Please see "Chapter: External Bus Interface" in
"FM3 MB9Axxx / MB9Bxxx Series PERIPHERAL MANUAL" to refer the detail of setting.
tCYCLE
0.8×Vcc
0.8×Vcc
0.2×Vcc
0.8×Vcc
0.2×Vcc
MCLKOUT
PWH
PWL
ꢀExternal bus signal input/output Characteristics
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Parameter
Symbol Conditions
Value
Unit
Remarks
VIH
0.8 × VCC
0.2 × VCC
0.8 × VCC
0.2 × VCC
V
V
V
V
Signal input characteristics
VIL
VOH
VOL
-
Signal output characteristics
Input
Signal
VIH
VIL
VIH
VIL
Output
Signal
VOH
VOL
VOH
VOL
DS706-00011-1v0-E
71
MB9A110 Series
ꢀSeparate Bus Access Asynchronous SRAM Mode
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
tOEW
Pin name
Conditions
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Min
Max
MOEX
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
MOEX
MCLK×n-3
-
Min pulse width
MCSX ↓ → Address
output delay time
MOEX ↑ →
Address hold time
MCSX ↓ →
MOEX ↓ delay time
MOEX ↑ →
MCSX ↑ time
MCSX[7:0]
MAD[24:0]
MOEX
-9
-12
9
12
tCSL – AV
tOEH - AX
tCSL - OEL
tOEH - OSH
tCSL - RDQML
tDS - OE
MCLK×m+9
MCLK×m+12
MCLK×m-9 MCLK×m+9
0
MAD[24:0]
MOEX
MCSX[7:0]
Vcc < 4.5V MCLK×m-12 MCLK×m+12
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
MCLK×m+9
MCLK×m+12
MCLK×m-9 MCLK×m+9
0
MCSX ↓ →
MOEX
MDQM[1:0]
MOEX
MADATA[15:0]
MOEX
MADATA[15:0]
MDQM ↓ delay time
Data set up →
MOEX ↑ time
MOEX ↑ →
Data hold time
MWEX
Min pulse width
MWEX ↑ → Address
output delay time
MCSX ↓ →
MWEX ↓ delay time
MWEX ↑→
MCSX ↑ delay time
MCSX ↓ →
MDQM ↓ delay time
MWEX ↓ →
Data output time
MWEX ↑ →
Vcc < 4.5V MCLK×m-12 MCLK×m+12
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
20
38
-
-
tDH - OE
0
-
-
tWEW
MWEX
MCLK×n-3
0
MWEX
MAD[24:0]
MCLK×m+9
MCLK×m+12
tWEH - AX
tCSL - WEL
tWEH - CSH
tCSL-WDQML
tWEL - DV
tWEH - DX
MCLK×n-9 MCLK×n+9
MWEX
MCSX[7:0]
Vcc < 4.5V MCLK×n-12 MCLK×n+12
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
MCLK×m+9
MCLK×m+12
MCLK×n-9 MCLK×n+9
0
MCSX
MDQM[1:0]
Vcc < 4.5V MCLK×n-12 MCLK×n+12
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
- 9
-12
9
12
MWEX
MADATA[15:0]
MCLK×m+9
MCLK×m+12
0
Data hold time
Note: When the external load capacitance = 30pF (m = 0 to 15, n = 1 to 16).
72
DS706-00011-1v0-E
MB9A110 Series
tCYCLE
MCLK
tOEH-CSH
tWEH-CSH
MCSX[7:0]
MAD[24:0]
MOEX
tWEH-AX
tCSL-AV
tOEH-AX
tCSL-AV
Address
Address
tCSL-OEL
tOEW
tCSL-WDQML
tCSL-RDQML
MDQM[1:0]
MWEX
tCSL-WEL
tWEW
t DS-OE
tDH-OE
tWEL-DV
tWEH-DX
RD
WD
MADATA[15:0]
DS706-00011-1v0-E
73
MB9A110 Series
ꢀSeparate Bus Access Synchronous SRAM Mode
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
tAV
Pin name
Conditions
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Min
Max
9
12
9
12
9
12
9
MCLK
MAD[24:0]
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Address delay time
1
tCSL
1
1
1
1
MCLK
MCSX[7:0]
MCSX delay time
MOEX delay time
tCSH
tREL
MCLK
MOEX
12
9
12
tREH
tDS
Data set up →
MCLK ↑ time
MCLK ↑ →
MCLK
MADATA[15:0]
MCLK
19
37
-
-
tDH
0
1
1
1
1
Data hold time
MADATA[15:0]
9
12
9
12
9
12
9
12
18
24
tWEL
tWEH
tDQML
tDQMH
tOD
MCLK
MWEX
MWEX delay time
MDQM[1:0]
delay time
MCLK
MDQM[1:0]
MCLK ↑ →
Data output time
MCLK
MADATA[15:0]
2
2
Note: When the external load capacitance = 30pF.
tCYCLE
MCLK
tCSL
tCSH
MCSX[7:0]
tAV
tAV
Address
Address
MAD[24:0]
tREL
tREH
MOEX
tDQML
tDQMH
tDQML
tDQMH
tWEH
tOD
MDQM[1:0]
MWEX
tWEL
tDS
tDH
tOD
RD
WD
MADATA[15:0]
74
DS706-00011-1v0-E
MB9A110 Series
ꢀMultiplexed Bus Access Asynchronous SRAM Mode
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
Pin name
Conditions
Unit
Min
Max
10
Multiplexed
Address delay time
Vcc ≥ 4.5V
tALE-CHMADV
0
ns
Vcc < 4.5V
20
MALE
MADATA[15:0]
Multiplexed
Address hold time
Vcc ≥ 4.5V
MCLK×n+0 MCLK×n+10
MCLK×n+0 MCLK×n+20
tCHMADH
ns
Vcc < 4.5V
Note: When the external load capacitance = 30pF (m = 0 to 15, n = 1 to 16).
tCYCLE
MCLK
MCSX[7:0]
MALE
Address
Address
MAD[24:0]
MOEX
MDQM[1:0]
MWEX
Address
RD
Address
tCHMADH
WD
MADATA[15:0]
tALE-
CHMADV
tALE-
CHMADV
DS706-00011-1v0-E
75
MB9A110 Series
ꢀMultiplexed Bus Access Synchronous SRAM Mode
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Max
Parameter
Symbol
tCHAL
Pin name
Conditions
Unit Remarks
Min
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
9
12
9
ns
ns
ns
ns
1
MCLK
ALE
MALE delay time
tCHAH
1
1
12
MCLK ↑ →
Multiplexed
Address delay time
MCLK ↑ →
Multiplexed
Data output time
Vcc ≥ 4.5V
tCHMADV
tOD
ns
ns
MCLK
MADATA[15:0]
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
tCHMADX
1
tOD
Note: When the external load capacitance = 30pF.
tCYCLE
MCLK
MCSX[7:0]
tCHAH
tCHAL
MALE
MAD[24:0]
MOEX
Address
Address
MDQM[1:0]
MWEX
Address
RD
Address
WD
MADATA[15:0]
tCHMADV
tCHMADV
tCHMADX
76
DS706-00011-1v0-E
MB9A110 Series
ꢀExternal Ready Input Timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol Pin name Conditions
Unit Remarks
Min
19
Max
MCLK ↑
MRDY input
setup time
Vcc ≥ 4.5V
MCLK
MRDY
tRDYI
-
ns
Vcc < 4.5V
37
When RDY input
MCLK
Over 2cycle
Original
MOEX
MWEX
tRDYI
MRDY
When RDY release
. . . . . .
MCLK
2cycle
Extended
MOEX
MWEX
t
RDY I
MRDY
DS706-00011-1v0-E
77
MB9A110 Series
(8) Base Timer Input Timing
ꢀTimer input timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
Pin name Conditions
Unit Remarks
Min
Max
TIOAn/TIOBn
(when using as
ECK,TIN)
tTIWH
tTIWL
Input pulse width
-
2tCYCP
-
ns
t
TIWL
t
TIWH
ECK
TIN
VIHS
VIHS
VILS
VILS
ꢀTrigger input timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol Pin name Conditions
Unit Remarks
Min
Max
TIOAn/TIOBn
tTRGH
tTRGL
Input pulse width
(when using as
TGIN)
-
2tCYCP
-
ns
t
TRGL
t
TRGH
V
IHS
V
IHS
VILS
VILS
TGIN
78
DS706-00011-1v0-E
MB9A110 Series
(9) UART Timing
ꢀSynchronous serial (SPI = 0, SCINV = 0)
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Pin
name
tSCYC SCKx
Vcc < 4.5V
Vcc ≥ 4.5V
Parameter
Serial clock cycle time
SCK ↓ → SOT delay time
Symbol
Conditions
Unit
ns
Min
Max
Min
Max
4tcycp
-
4tcycp
-
SCKx
SOTx
SCKx
SINx
SCKx
SINx
tSLOVI
-30
50
0
+30
- 20
30
0
+ 20
ns
Internal shift
clock
operation
SIN → SCK ↑ setup time
SCK ↑ → SIN hold time
Serial clock "L" pulse width
Serial clock "H" pulse width
SCK ↓ → SOT delay time
SIN → SCK ↑ setup time
SCK ↑ → SIN hold time
tIVSHI
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
tSHIXI
2tcycp -
10
2tcycp -
10
tSLSH SCKx
tSHSL SCKx
-
-
tcycp +
10
tcycp +
10
-
-
SCKx
tSLOVE
-
50
-
-
30
-
External shift
clock
operation
SOTx
SCKx
SINx
SCKx
SINx
tIVSHE
10
20
10
20
tSHIXE
-
-
SCK fall time
SCK rise time
tF
tR
SCKx
SCKx
-
-
5
5
-
-
5
5
ns
ns
Notes: ꢀThe above characteristics apply to CLK synchronous mode.
ꢀtCYCP indicates the APB bus clock cycle time. Please see the block diagram to refer the APB bus
number which UART is connected.
ꢀThese characteristics only guarantee the same relocate port number.
For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed.
ꢀWhen the external load capacitance = 30pF.
DS706-00011-1v0-E
79
MB9A110 Series
t S C Y C
V O H
S C K
V O L
t S L O V I
V O H
V O L
S O T
tIV S H I
t S H IX I
V IH
V I H
S I N
V I L
V IL
M S b it = 0
t S H S
L
t S L S
H
V
I H
V
I H
S C K
V I L
V I L
t R
t F
t S
L O V E
V
V
O
O
H
L
S O
T
t I V S
H
E
t S H I X E
V
I H
I L
V
V
I H
I L
S I N
V
M
S
b it = 1
80
DS706-00011-1v0-E
MB9A110 Series
ꢀSynchronous serial(SPI = 0, SCINV = 1)
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Pin
name
tSCYC SCKx
Vcc < 4.5V
Vcc ≥ 4.5V
Parameter
Serial clock cycle time
SCK ↑ → SOT delay time
Symbol
Conditions
Unit
ns
Min
Max
Min
Max
4tcycp
-
4tcycp
-
SCKx
SOTx Internal shift
SCKx
SINx
SCKx
SINx
tSHOVI
-30
50
0
+30
- 20
30
0
+ 20
ns
clock
operation
SIN → SCK ↓ setup time
SCK ↓ → SIN hold time
Serial clock "L" pulse width
Serial clock "H" pulse width
SCK ↑ → SOT delay time
SIN → SCK ↓ setup time
SCK ↓ → SIN hold time
tIVSLI
tSLIXI
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
2tcycp
- 10
2tcycp -
10
tSLSH SCKx
tSHSL SCKx
-
-
tcycp +
10
tcycp +
10
-
-
SCKx
tSHOVE
-
50
-
-
30
-
External shift
clock
operation
SOTx
SCKx
SINx
SCKx
SINx
tIVSLE
10
20
10
20
tSLIXE
-
-
SCK fall time
SCK rise time
tF
tR
SCKx
SCKx
-
-
5
5
-
-
5
5
ns
ns
Notes: ꢀThe above characteristics apply to CLK synchronous mode.
ꢀtCYCP indicates the APB bus clock cycle time. Please see the block diagram to refer the APB bus
number which UART is connected.
ꢀThese characteristics only guarantee the same relocate port number.
For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed.
ꢀWhen the external load capacitance = 30pF.
DS706-00011-1v0-E
81
MB9A110 Series
t S C Y C
V O H
S C K
V O L
tS H O V I
V O H
S O T
V O L
t IV S L I
t S L I X I
V IH
V I H
S I N
V IL
V I L
M S b i t= 0
t S H S L
tS L S H
V IH
V I H
tF
S C K
V IL
V I L
V IL
t R
t S H O V E
V O H
S O T
tI V S L E
tS L IX E
S I N
M S b it = 1
82
DS706-00011-1v0-E
MB9A110 Series
ꢀSynchronous serial(SPI = 1, SCINV = 0)
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Pin
name
tSCYC SCKx
Vcc < 4.5V
Vcc ≥ 4.5V
Parameter
Symbol
Conditions
Unit
ns
Min
Max
Min
Max
Serial clock cycle time
SCK ↑ → SOT delay time
4tcycp
-
4tcycp
-
SCKx
SOTx
SCKx
SINx
SCKx
SINx
SCKx
SOTx
tSHOVI
-30
50
0
+30
- 20
30
0
+ 20
ns
Internal shift
clock
operation
SIN → SCK ↓ setup time
SCK ↓ → SIN hold time
SOT → SCK ↓ delay time
tIVSLI
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
tSLIXI
2tcycp -
30
2tcycp -
30
tSOVLI
-
-
2tcycp -
10
2tcycp -
10
Serial clock "L" pulse width tSLSH SCKx
-
-
tcycp +
10
tcycp +
10
Serial clock "H" pulse width tSHSL SCKx
SCKx
-
-
SCK ↑ → SOT delay time
SIN → SCK ↓ setup time
SCK ↓ → SIN hold time
tSHOVE
tIVSLE
tSLIXE
-
50
-
-
30
-
External shift
clock
operation
SOTx
SCKx
SINx
SCKx
SINx
10
20
10
20
-
-
SCK fall time
SCK rise time
tF
tR
SCKx
SCKx
-
-
5
5
-
-
5
5
ns
ns
Notes: ꢀThe above characteristics apply to CLK synchronous mode.
ꢀtCYCP indicates the APB bus clock cycle time. Please see the block diagram to refer the APB bus
number which UART is connected.
ꢀThese characteristics only guarantees the same relocate port number.
For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed.
ꢀWhen the external load capacitance = 30pF.
DS706-00011-1v0-E
83
MB9A110 Series
tSCYC
VO H
SCK
VO L
V OL
tSHOVI
tSO VLI
VO H
VO H
VO L
SOT
VO L
tIV SLI
tSLIX I
V IH
V IL
V IH
SIN
VIL
M S bit=0
tS HSL
tS LSH
VIH
VIL
V IH
VIH
SCK
VIL
VIL
tF
*
tSHO VE
tR
VOH
VO L
VOH
VOL
SOT
SIN
tSLIXE
tIVSLE
VIH
VIL
V IH
VIL
*: Changes when writing to TDR r egister
M S b it=1
84
DS706-00011-1v0-E
MB9A110 Series
ꢀSynchronous serial(SPI = 1, SCINV = 1)
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Pin
name
Vcc < 4.5V
Vcc ≥ 4.5V
Parameter
Symbol
Conditions
Unit
Min
Max
Min
Max
Serial clock cycle time
tSCYC SCKx
4tcycp
-
4tcycp
-
ns
SCKx
tSLOVI
SCK ↓ → SOT delay time
-30
+30
- 20
+ 20
ns
SOTx
Internal shift
clock
operation
SCKx
tIVSHI
SIN → SCK ↑ setup time
SCK ↑→ SIN hold time
SOT → SCK ↑ delay time
50
0
-
-
30
0
-
-
ns
ns
ns
ns
ns
ns
ns
ns
SINx
SCKx
SINx
tSHIXI
SCKx
SOTx
2tcycp -
30
2tcycp -
10
tcycp +
10
2tcycp -
30
2tcycp -
10
tcycp +
10
tSOVHI
-
-
Serial clock "L" pulse width tSLSH SCKx
-
-
Serial clock "H" pulse width tSHSL SCKx
SCKx
-
-
SCK ↓ → SOT delay time
SIN → SCK ↑ setup time
SCK ↑ → SIN hold time
tSLOVE
tIVSHE
tSHIXE
-
50
-
-
30
-
External shift
clock
operation
SOTx
SCKx
SINx
SCKx
SINx
10
20
10
20
-
-
SCK fall time
SCK rise time
tF
tR
SCKx
SCKx
-
-
5
5
-
-
5
5
ns
ns
Notes: ꢀThe above characteristics apply to CLK synchronous mode.
ꢀtCYCP indicates the APB bus clock cycle time. Please see the block diagram to refer the APB bus
number which UART is connected.
ꢀThese characteristics only guarantee the same relocate port number.
For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed.
ꢀWhen the external load capacitance = 30pF.
DS706-00011-1v0-E
85
MB9A110 Series
tSCYC
VOH
VOH
SCK
VOL
tSLOVI
tSOVHI
VOH
VOH
VOL
SOT
VOL
tIVSHI
VIH
VIL
tSHIXI
VIH
VIL
SIN
MS bit = 0
tR
tF
tSHSL
tSLSH
VIH
VIH
SCK
VIL
tSLOVE
tSHIXE
VOH
VOH
VOL
SOT
VOL
tIVSHE
VIH
VIL
VIH
VIL
SIN
MS bit = 1
ꢀExternal clock (EXT = 1) : asynchronous only
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Parameter
Symbol Conditions
Min
Max
Unit Remarks
Serial clock "L" pulse width
Serial clock "H" pulse width
SCK fall time
tSLSH
tSHSL
CL = 30pF
tF
tcycp + 10
tcycp + 10
-
-
5
5
ns
ns
ns
ns
-
-
SCK rise time
tR
tR
tF
tSHSL
tSLSH
SCK
VIH
VIL
VIH
VIH
VIL
VIL
86
DS706-00011-1v0-E
MB9A110 Series
(10) External input timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Min
Parameter Symbol Pin name Conditions
Unit
Remarks
Max
A/D converter
trigger input
Free-run timer input
clock
Input capture
Wave form
ADTG
1
-
2tCYCP
*
-
ns
FRCKx
tINH
tINL
Input pulse width
ICxx
1
DTTIxX
-
-
2tCYCP
*
-
ns
generator
INT00 to INT15,
NMIX
2tCYCP + 100*1
-
-
ns External interrupt
NMI
ns
500*2
*1: tCYCP indicates the APB bus clock cycle time except stop when in stop mode. Please see the block diagram to
refer the APB bus number which Multi function timer is connected.
*2: When in stop mode, in timer mode.
tINH
tINL
VIHS
VIHS
VILS
VILS
DS706-00011-1v0-E
87
MB9A110 Series
(11) Quadrature Position/Revolution Counter timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol
Conditions
Unit
Min
Max
AIN pin "H" width
AIN pin "L" width
BIN pin "H" width
BIN pin "L" width
BIN rise time from
AIN pin "H" level
AIN fall time from
BIN pin "H" level
BIN fall time from
AIN pin "L" level
AIN rise time from
BIN pin "L" level
AIN rise time from
BIN pin "H" level
BIN fall time from
AIN pin "H" level
AIN fall time from
BIN pin "L" level
tAHL
tALL
tBHL
tBLL
-
-
-
-
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
QCR:CGSC="0"
QCR:CGSC="0"
tAUBU
tBUAD
tADBD
tBDAU
tBUAU
tAUBD
tBDAD
tADBU
2tCYCP
*
-
ns
BIN rise time from
AIN pin "L" level
ZIN pin "H" width
ZIN pin "L" width
AIN/BIN rise and fall time
from determined ZIN level
Determined ZIN level from
AIN/BIN rise and fall time
tZHL
tZLL
tZABE
tABEZ
QCR:CGSC="1"
QCR:CGSC="1"
* : tCYCP indicates the APB bus clock cycle time except stop when in stop mode. Please see the block diagram to
refer the APB bus number which QPRC is connected.
tAHL
tALL
AIN
tBUAD
tAUBU
tADBD
tBDAU
BIN
tBHL
tBLL
88
DS706-00011-1v0-E
MB9A110 Series
tBHL
tBLL
BIN
tBUAU
tBDAD
tADBU
tAUBD
AIN
tAHL
tALL
tZHL
ZIN
tZLL
ZIN
tABEZ
tZABE
AIN/BIN
DS706-00011-1v0-E
89
MB9A110 Series
(12) I2C timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Typical mode
High-speed
mode
Parameter
Symbol Conditions
Unit
kHz
μs
Min
0
Max
100
Min
0
Max
400
SCL clock frequency
(Repeated) START condition
hold time
fSCL
tHDSTA
4.0
-
0.6
-
SDA ↓ → SCL ↓
SCL clock "L" width
SCL clock "H" width
(Repeated) START setup time
SCL ↑ → SDA ↓
Data hold time
SCL ↓ → SDA ↓ ↑
Data setup time
SDA ↓ ↑ → SCL ↑
STOP condition setup time
SCL ↑ → SDA ↑
tLOW
tHIGH
4.7
4.0
-
-
1.3
0.6
-
-
μs
μs
tSUSTA
tHDDAT
tSUDAT
tSUSTO
4.7
0
-
0.6
0
-
μs
μs
ns
μs
CL = 30pF,
R = (Vp/IOL) *1
3.45*2
0.9*3
250
4.0
-
-
100
0.6
-
-
Bus free time between
"STOP condition" and
"START condition"
Noise filter
tBUF
tSP
4.7
-
-
1.3
-
-
μs
4
4
-
2 tCYCP
*
2 tCYCP
*
ns
*1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp
indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current.
*2 : The maximum tHDDAT must satisfy that it doesn't extend at least "L" period (tLOW) of device's SCL
signal.
*3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device
satisfies the requirement of "tSUDAT ≥ 250 ns".
*4 : tCYCP is the APB bus clock cycle time. Please see the block diagram to refer the APB bus number which I2C
is connected. To use I2C, set the APB bus clock at 8 MHz or more.
SD
A
tSUSTA
tSUDAT
tBUF
tLOW
SCL
tHDSTA
tHDDAT tHIGH
tHDSTA
tSP
tSUSTO
90
DS706-00011-1v0-E
MB9A110 Series
(13) ETM timing
Parameter
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Symbol
Pin name
Conditions
Vcc ≥ 4.5V
Vcc < 4.5V
Unit
Remarks
Min Max
2
9
TRACECLK
TRACED3 - 0
Data hold
tETMH
ns
2
15
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
-
-
40 MHz
32 MHz
TRACECLK
frequency
1/tTRACE
TRACECLK
25
-
-
ns
ns
TRACECLK
Clock cycle time
tTRACE
31.25
Note: When the external load capacitance = 30pF.
tC YC
H CL K
tTR A C E
V OH
V OH
V OL
TR AC E CL K
tET MH
tET MH
VO H
VO L
V OH
T RA C E D3 -0
V OL
DS706-00011-1v0-E
91
MB9A110 Series
(14) JTAG timing
(Vcc = 2.7V to 5.5V, Vss = 0V, Ta = - 40°C to + 105°C)
Value
Parameter
Symbol Pin name Conditions
Unit
ns
Remarks
Min
Max
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
Vcc < 4.5V
Vcc ≥ 4.5V
TMS, TDI setup
time
TCK
TMS, TDI
tJTAGS
15
-
TCK
TMS, TDI
TMS, TDI hold time tJTAGH
15
-
-
ns
25
45
TCK
TDO
TDO delay time
tJTAGD
ns
Vcc < 4.5V
-
Note: When the external load capacitance = 30pF.
VO H
T C K
V O L
tJTA G S
tJTA G H
V O H
V O L
V O H
V O L
T M S /T M I
tJTA G D
V O H
V O L
T D O
92
DS706-00011-1v0-E
MB9A110 Series
z 12bit A/D Converter
1. Electrical characteristics for the A/D converter (Provisional value)
(Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V, Ta = - 40°C to + 105°C)
Pin
name
Value
Typ
-
-
Parameter
Unit
Remarks
Min
-
- 4.5
Max
12
+ 4.5
Resolution
-
-
bit
LSB
Linearity error
Differential linearity
error
-
-2.5
- 20
- 20
-
-
-
+ 2.5
+ 20
+ 20
LSB
mV
mV
AVRH = 2.7V to 5.5V
AN0 to
AN15
AN0 to
AN15
-
Zero transition voltage
Full transition voltage
Conversion time
Sampling time
1.0*1
*2
-
-
-
-
-
-
μs AVcc ≥ 4.5V
AVcc ≥ 4.5V
AVcc < 4.5V
Ts
ns
ns
μs
*2
Compare clock cycle*3
Tcck
50
-
10000
State transition time to
operation permission
Power supply current
(analog + digital)
Reference power supply
current
Tstt
1.0
-
-
-
-
0.57
0.06
0.72
20
mA A/D 1unit operation
μA When A/D stops
AVCC
A/D 1unit operation
AVRH=5.5V
-
-
-
1.1
0.06
-
1.96
4
mA
AVRH
(between AVRH to
AVSS)
μA When A/D stops
Analog input capacity
Analog input resistance
Cin
Rin
12.9
pF
2
3.8
4
AVcc ≥ 4.5V
kΩ
-
-
-
-
-
-
AVcc < 4.5V
Interchannel disparity
Analog port input
current
-
LSB
AN0 to
AN15
AN0 to
AN15
AVRH
5
μA
Analog input voltage
Reference voltage
AVSS
AVSS
-
-
AVRH
AVCC
V
V
*1: Conversion time is the value of sampling time (Ts) + compare time (Tc).
The condition of the minimum conversion time is when HCLK=40MHz, the value of sampling time: 300ns,
the value of sampling time: 700ns (AVcc ≥ 4.5V)
Ensure that it satisfies the value of sampling time (Ts) and compare clock cycle (Tcck).
For setting of sampling time and compare clock cycle, see "Chapter: 12-bit A/D Converter" in "FM3
MB9Axxx / MB9Bxxx Series PERIPHERAL MANUAL".
A/D Converter register is set at APB bus clock timing. Sampling and compare clock is set at Base clock
(HCLK).
*2: A necessary sampling time changes by external impedance.
Ensure that it set the sampling time to satisfy (Equation 1)
*3: Compare time (Tc) is the value of (Equation 2)
DS706-00011-1v0-E
93
MB9A110 Series
AN0 to AN15
Analog input pin
Comparator
Rext
Rin
Analog signal
source
Cin
(Equation 1) Ts ≥ ( Rin + Rext ) × Cin × 9
Ts : Sampling time
Rin : input resistance of A/D = 2kΩ
4.5 ≤ AVCC ≤ 5.5
input resistance of A/D = 3.8kΩ 2.7 ≤ AVCC < 4.5
Cin : input capacity of A/D = 12.9pF 2.7 ≤ AVCC ≤ 5.5
Rext : Output impedance of external circuit
(Equation 2) Tc = Tcck × 14
Tc : Compare time
Tcck : Compare clock cycle
94
DS706-00011-1v0-E
MB9A110 Series
ꢀDefinition of 12-bit A/D Converter Terms
ꢀ Resolution
ꢀ Linearity error
: Analog variation that is recognized by an A/D converter.
: Deviation of the line between the zero-transition point
(0b000000000000←→0b000000000001) and the full-scale transition point
(0b111111111110←→0b111111111111) from the actual conversion
characteristics.
ꢀ Differential linearity error : Deviation from the ideal value of the input voltage that is required to change
the output code by 1 LSB.
Linearity error
Differential linearity error
0xFFF
Actual conversion
Actual conversion
characteristics
characteristics
0xFFE
0xFFD
0x(N+1)
0xN
{1 LSB(N-1) + VOT
}
VFST
Ideal characteristics
(Actually-
measured
value)
VNT
0x004
(Actually-measured
value)
V(N+1)T
(Actually-measured
value)
0x(N-1)
0x(N-2)
0x003
0x002
Actual conversion
characteristics
VNT
(Actually-measured
value)
Ideal characteristics
0x001
(Actually-measured value)
Analog input
VOT
Actual conversion characteristics
AVss
AVRH
AVss
AVRH
Analog input
V
NT - {1LSB × (N - 1) + VOT}
Linearity error of digital output N =
[LSB]
1LSB
V
(N + 1) T - VNT
1LSB
Differential linearity error of digital output N =
- 1 [LSB]
V
FST - VOT
4094
1LSB =
N
: A/D converter digital output value.
VOT : Voltage at which the digital output changes from 0x000 to 0x001.
VFST : Voltage at which the digital output changes from 0xFFE to 0xFFF.
VNT : Voltage at which the digital output changes from 0x(N − 1) to 0xN.
DS706-00011-1v0-E
95
MB9A110 Series
z Low voltage detection characteristics
1. Low voltage detection reset
(Ta = - 40°C to + 105°C)
Value
Min Typ Max
Parameter
Symbol Conditions
Unit
Remarks
Detected voltage
Released voltage
VDL
VDH
-
-
2.25
2.30
2.45
2.50
2.65
2.70
V
V
When voltage drops
When voltage rises
2. Interrupt of low voltage detection
(Ta = - 40°C to + 105°C)
Value
Min Typ Max
Parameter
Symbol Conditions
Unit
Remarks
Detected voltage
Released voltage
Detected voltage
Released voltage
Detected voltage
Released voltage
Detected voltage
Released voltage
Detected voltage
Released voltage
Detected voltage
Released voltage
Detected voltage
Released voltage
Detected voltage
Released voltage
VDL
2.58
2.67
2.76
2.85
2.94
3.04
3.31
3.40
3.40
3.50
3.68
3.77
3.77
3.86
3.86
3.96
2.8
2.9
3.0
3.1
3.2
3.3
3.6
3.7
3.7
3.8
4.0
4.1
4.1
4.2
4.2
4.3
3.02
3.13
3.24
3.34
3.45
3.56
3.88
3.99
3.99
4.10
4.32
4.42
4.42
4.53
4.53
4.64
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
When voltage drops
When voltage rises
When voltage drops
When voltage rises
When voltage drops
When voltage rises
When voltage drops
When voltage rises
When voltage drops
When voltage rises
When voltage drops
When voltage rises
When voltage drops
When voltage rises
When voltage drops
When voltage rises
SVHI = 0000
VDH
VDL
SVHI = 0001
VDH
VDL
SVHI = 0010
VDH
VDL
SVHI = 0011
VDH
VDL
SVHI = 0100
VDH
VDL
SVHI = 0111
VDH
VDL
SVHI = 1000
VDH
VDL
SVHI = 1001
VDH
LVD stabilization
wait time
2240 ×
tcycp *
TLVDW
-
-
-
μs
* : tCYCP indicates the APB2 clock cycle time.
96
DS706-00011-1v0-E
MB9A110 Series
z Flash Memory Write/Erase Characteristics
(Vcc = 2.7V to 5.5V, Ta = - 40°C to + 105°C)
Value
Typ
0.7
Parameter
Value
Remarks
Min
Max
3.3
1.1
Sector
erase time
Large Sector
Small Sector
Includes write time prior to
internal erase
-
s
0.3
Half word (16 bit)
write time
Not including system-level
overhead time.
Includes write time prior to
internal erase
-
-
12
384
μs
Chip
64K/128K/256KByte
384K/512KByte
5.2
8
23.6
38.4
s
s
erase time
Erase/write cycles and data hold time (targeted value)
Erase/write cycles
(cycle)
Data hold time
Remarks
(year)
1,000
10,000
100,000
20 *
10 *
5 *
*: This value comes from the quality and reliability test (using Arrhenius equation to translate high temperature
stress test result into normalized value at + 85°C) .
DS706-00011-1v0-E
97
MB9A110 Series
ORDERING INFORMATION
Part number
Package
MB9AF111LPMC1
MB9AF112LPMC1
MB9AF114LPMC1
MB9AF111LPMC
MB9AF112LPMC
MB9AF114LPMC
MB9AF111MPMC
MB9AF112MPMC
MB9AF114MPMC
MB9AF115MPMC
MB9AF116MPMC
MB9AF111NPMC
MB9AF112NPMC
MB9AF114NPMC
MB9AF115NPMC
MB9AF116NPMC
MB9AF111NPF
Plastic LQFP(0.5mm pitch), 64-pin
x
(FPT-64P-M24/M38)
Plastic LQFP(0.65mm pitch), 64-pin
x
(FPT-64P-M23/M39)
Plastic LQFP(0.5mm pitch), 80-pin
x
(FPT-80P-M21/M37)
Plastic LQFP(0.5mm pitch), 100-pin
x
(FPT-100P-M20*/M23)
MB9AF112NPF
Plastic QFP(0.65mm pitch), 100-pin
x
MB9AF114NPF
(FPT-100P-M06)
MB9AF115NPF
MB9AF116NPF
MB9AF111NBGL
MB9AF112NBGL
Plastic PFBGA(0.8mm pitch), 112-pin
x
(BGA-112P-M04)
MB9AF114NBGL
* : ES only
98
DS706-00011-1v0-E
MB9A110 Series
PACKAGE DIMENSIONS
100-pin plastic LQFP
Lead pitch
0.50 mm
14.0 mm × 14.0 mm
Gullwing
Package width ×
package length
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.70 mm Max
0.65 g
Code
(Reference)
P-LFQFP100-14×14-0.50
(FPT-100P-M20)
100-pin plastic LQFP
(FPT-100P-M20)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
16.00±0.20(.630±.008)SQ
*
14.00±0.10(.551±.004)SQ
75
51
76
50
0.08(.003)
Details of "A" part
1.50+–00..1200 .059+–..000048
(Mounting height)
INDEX
0.10±0.10
(.004±.004)
(Stand off)
100
26
0°~8°
"A"
0.50±0.20
(.020±.008)
0.25(.010)
1
25
0.60±0.15
(.024±.006)
0.50(.020)
0.20±0.05
(.008±.002)
0.145±0.055
(.006±.002)
M
0.08(.003)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
C
2005 -2010 FUJITSU SEMICONDUCTOR LIMITED F100031S-c-3-5
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
DS706-00011-1v0-E
99
MB9A110 Series
100-pin plastic LQFP
Lead pitch
0.50 mm
14.00 mm × 14.00 mm
Gullwing
Package width ×
package length
Lead shape
Lead bend
direction
Normal bend
Plastic mold
1.70 mm MAX
0.65 g
Sealing method
Mounting height
Weight
(FPT-100P-M23)
100-pin plastic LQFP
(FPT-100P-M23)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
16.00±0.20(.630±.008)SQ
*14.00±0.10(.551±.004)SQ
75
51
76
50
0.08(.003)
Details of "A" part
+0.20
1.50
-0.10
+.008
.059
-.004
(
)
(Mounting height)
INDEX
0°~8°
0.10±0.10
(.004±.004)
(Stand off)
100
26
0.50±0.20
(.020±.008)
"A"
0.25(.010)
0.60±0.15
1
25
(.024±.006)
0.50(.020)
0.22±0.05
(.009±.002)
0.145±0.055
(.006±.002)
M
0.08(.003)
Dimensions in mm (inches).
Note: The values in parenthesesare reference values.
C
2009-2010 FUJITSU SEMICONDUCTOR LIMITED F100034S-c-3-4
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
100
DS706-00011-1v0-E
MB9A110 Series
100-pin plastic QFP
Lead pitch
0.65 mm
14.00 × 20.00 mm
Gullwing
Package width ×
package length
Lead shape
Sealing method
Mounting height
Plastic mold
3.35 mm MAX
P-QFP100-14×20-0.65
Code
(Reference)
(FPT-100P-M06)
100-pin plastic QFP
(FPT-100P-M06)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
23.90±0.40(.941±.016)
*
20.00±0.20(.787±.008)
80
51
81
50
0.10(.004)
17.90±0.40
(.705±.016)
*14.00±0.20
(.551±.008)
INDEX
Details of "A" part
100
31
0.25(.010)
3.00+–00..3250
.118+–.00148
(Mounting height)
0~8°
1
30
0.65(.026)
0.32±0.05
(.013±.002)
0.17±0.06
(.007±.002)
M
0.13(.005)
0.25±0.20
(.010±.008)
(Stand off)
0.80±0.20
(.031±.008)
0.88±0.15
"A"
(.035±.006)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2002-2010 FUJITSU SEMICONDUCTOR LIMITED F100008S-c-5-7
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
DS706-00011-1v0-E
101
MB9A110 Series
80-pin plastic LQFP
Lead pitch
0.50 mm
12 mm × 12 mm
Gullwing
Package width ×
package length
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.70 mm Max
0.47 g
Code
(Reference)
P-LFQFP80-12×12-0.50
(FPT-80P-M21)
80-pin plastic LQFP
(FPT-80P-M21)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
14.00±0.20(.551±.008)SQ
*
12.00±0.10(.472±.004)SQ
0.145±0.055
(.006±.002)
60
41
61
40
0.08(.003)
Details of "A" part
1.50–+00..2100
(Mounting height)
.059–+..000048
0.10±0.05
(.004±.002)
(Stand off)
INDEX
0°~8°
80
21
"A"
0.25(.010)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
1
0 2
LEAD No.
0.50(.020)
0.20±0.05
(.008±.002)
M
0.08(.003)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
C
2006-2010 FUJITSU SEMICONDUCTOR LIMITED F80035S-c-2-4
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
102
DS706-00011-1v0-E
MB9A110 Series
80-pin plastic LQFP
Lead pitch
0.50 mm
12.00 mm × 12.00 mm
Gullwing
Package width ×
package length
Lead shape
Lead bend
direction
Normal bend
Plastic mold
1.70 mm MAX
0.47 g
Sealing method
Mounting height
Weight
(FPT-80P-M37)
80-pin plastic LQFP
(FPT-80P-M37)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
14.00± 0.20(.551±. 008)SQ
*12.00± 0.10(.472±. 004)SQ
0.145± 0.055
(.006±. 002)
60
41
Details of "A" part
61
40
1.50–+00..1200
(Mounting height)
.059+–..000048
0.25(.010)
0~8°
0.08(.003)
0.50± 0.20
(.020±. 008)
0.60± 0.15
0.10± 0.05
(.004±. 002)
(Stand off)
(.024±. 006)
INDEX
80
21
"A"
1
20
0.50(.020)
0.22± 0.05
M
0.08(.003)
(.009±. 002)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2009-2010 FUJITSU SEMICONDUCTOR LIMITED F80037S-c-1-2
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
DS706-00011-1v0-E
103
MB9A110 Series
64-pin plastic LQFP
Lead pitch
0.50 mm
10.0 × 10.0 mm
Gullwing
Package width ×
package length
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.70 mm MAX
0.32 g
Code
(Reference)
(FPT-64P-M24)
P-LFQFP64-10×10-0.50
64-pin plastic LQFP
(FPT-64P-M24)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
12.00±0.20(.472±.008)SQ
*10.00±0.10(.394±.004)SQ
0.145±0.055
(.006±.002)
48
33
49
32
Details of "A" part
0.08(.003)
1.50+–00..210
(Mounting height)
.059+–.0084
INDEX
0.10±0.10
(.004±.004)
(Stand off)
0°~8°
64
17
"A"
0.25(.010)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
1
16
LEAD No.
0.50(.020)
0.20±0.05
(.008±.002)
M
0.08(.003)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
C
2005-2010 FUJITSU SEMICONDUCTOR LIMITED F64036S-c-1-3
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
104
DS706-00011-1v0-E
MB9A110 Series
64-pin plastic LQFP
Lead pitch
0.50 mm
10.00 mm × 10.00 mm
Gullwing
Package width ×
package length
Lead shape
Lead bend
direction
Normal bend
Plastic mold
1.70 mm MAX
0.32 g
Sealing method
Mounting height
Weight
(FPT-64P-M38)
64-pin plastic LQFP
(FPT-64P-M38)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
12.00±0.20(.472±.008)SQ
*10.00±0.10(.394±.004)SQ
0.145 ± 0.055
(.006 ±. 002)
48
33
Details of "A" part
49
32
1.50–+00..1200
0.08(.003)
(Mounting height)
.059+–..000048
0.25(.010)
0~8°
INDEX
0.50 ± 0.20
(.020 ±. 008)
0.60 ± 0.15
0.10 ± 0.10
(.004 ±. 004)
(Stand off)
64
17
(.024 ±. 006)
"A"
1
16
0.50(.020)
0.22±0.05
(.009±.002)
M
0.08(.003)
Dimensions in mm (inches).
Note: The values in parenthesesare reference values.
C
2010 FUJITSU SEMICONDUCTOR LIMITED F64038S-c-1-2
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
DS706-00011-1v0-E
105
MB9A110 Series
64-pin plastic LQFP
Lead pitch
0.65 mm
12.0 × 12.0 mm
Gullwing
Package width ×
package length
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.70 mm MAX
0.47 g
Code
(Reference)
P-LQFP64-12×12-0.65
(FPT-64P-M23)
64-pin plastic LQFP
(FPT-64P-M23)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
14.00±0.20(.551±.008)SQ
*12.00±0.10(.472±.004)SQ
0.145±0.055
(.006±.002)
48
33
49
32
0.10(.004)
Details of "A" part
1.50+–00..1200
(Mounting height)
.059–+..000048
0.25(.010)
INDEX
0~8°
64
17
0.50±0.20
(.020±.008)
0.60±0.15
0.10±0.10
(.004±.004)
(Stand off)
"A"
1
16
(.024±.006)
0.65(.026)
0.32±0.05
(.013±.002)
M
0.13(.005)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
C
2003-2010 FUJITSU SEMICONDUCTOR LIMITED F64034S-c-1-4
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
106
DS706-00011-1v0-E
MB9A110 Series
64-pin plastic LQFP
Lead pitch
0.65 mm
12.00 mm × 12.00 mm
Gullwing
Package width ×
package length
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.70 mm MAX
0.47 g
(FPT-64P-M39)
64-pin plastic LQFP
(FPT-64P-M39)
Note 1) Pins width and pins thickness include plating thickness.
14.00±0.20(.551±.008)SQ
12.00±0.10(.472±.004)SQ
48
33
Details of "A" part
49
32
1.50–+00..1200
.059–+..000048
0~8˚
0.10(.004)
0.10±0.10
(.004±.004)
INDEX
0.50±0.20
(.020±.008)
0.25(.010)BSC
64
17
0.60±0.15
(.024±.006)
1
16
"A"
0.65(.026)
0.32±0.05
(.013±.002)
M
0.13(.005)
C
Dimensions in mm (inches).
Note: The values in parenthesesare reference values.
2010-2011 FUJITSU SEMICONDUCTOR LIMITED HMbF64-39Sc-2-2
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
DS706-00011-1v0-E
107
MB9A110 Series
112-ball plastic PFBGA
Ball pitch
0.80 mm
10.00 × 10.00 mm
Soldering ball
Plastic mold
Ø0.45 mm
Package width ×
package length
Lead shape
Sealing method
Ball size
Mounting height
Weight
1.45 mm Max.
0.22 g
(BGA-112P-M04)
112-ball plastic PFBGA
(BGA-112P-M04)
10.00±0.10(.394±.004)
0.20(.008) S
B
0.80(.031)
REF
B
11
10
9
0.80(.031)
REF
8
A
7
10.00±0.10
(.394±.004)
6
5
4
3
2
1
L
K
J
H
G
F
E D
C
B
A
(INDEX AREA)
1.25±0.20
(.049±.008)
(Seated height)
INDEX
0.35±0.10
(.014±.004)
(Stand off)
0.20(.008) S
A
112-ø0.45±010
(112-ø0.18±.004)
M
ø0.08(.003) S A B
S
0.10(.004) S
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2003-2010 FUJITSU SEMICONDUCTOR LIMITED B112004S-c-2-3
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
108
DS706-00011-1v0-E
MB9A110 Series
MAJOR CHANGES IN THIS EDITION
A change on a page is indicated by a vertical line drawn on the left side of that page.
Page
Section
Change Results
ELECTRICAL CHARACTERISTICS
z DC Characteristics
1. Current rating
Power supply current value was changed.
(with "TBD" was changed to the fixed value.)
65, 66
2. Pin Characteristics
Pull-up resistance "RPU" value was changed.
(with "TBD" was changed to the fixed value.)
67
Built-in high-speed CR "FCRH" value was changed.
(with "TBD" was changed to the fixed value.)
z AC Characteristics
69
70
(3) Built-in CR Oscillation Characteristics
(4-1/4-2) Operating Conditions of Main PLL
The description of title was changed.
State transition time to operation permission "Tstt"
value was changed.
z 12bit A/D Converter
(Min Value 2.5µs → 1.0µs)
93
97
Power supply current "AVCC, AVRH" value was
changed.
(with "TBD" was changed to the fixed value.)
Sector/Chip erase time was changed.
z Flash Memory Write/Erase Characteristics
DS706-00011-1v0-E
109
MB9A110 Series
110
DS706-00011-1v0-E
MB9A110 Series
DS706-00011-1v0-E
111
MB9A110 Series
FUJITSU SEMICONDUCTOR LIMITED
Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,
Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
North and South America
Asia Pacific
FUJITSU SEMICONDUCTOR AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
FUJITSU SEMICONDUCTOR ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://sg.fujitsu.com/semiconductor/
Tel: +1-408-737-5600
Fax: +1-408-737-5999
http://us.fujitsu.com/micro/
Europe
FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD.
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Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fss/
FUJITSU SEMICONDUCTOR EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/semiconductor/
Korea
FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fsp/
FUJITSU SEMICONDUCTOR KOREA LTD.
902 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fsk/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely
for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU
SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When
you develop equipment incorporating the device based on such information, you must assume any responsibility arising
out of such use of the information.
FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as
license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of
FUJITSU SEMICONDUCTOR or any third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of
any third-party's intellectual property right or other right by using such information. FUJITSU SEMICONDUCTOR
assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would
result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use,
including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not
designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless
extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury,
severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use
requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or
damages arising in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such
failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and
prevention of over-current levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the
regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department
相关型号：
MB9AF115MPMC
RISC Microcontroller, 32-Bit, FLASH, CORTEX-M3 CPU, 40MHz, CMOS, PQFP80, 12 X 12 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-80
CYPRESS
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