CYM74P431PM-66C [CYPRESS]
Cache SRAM Module, 64KX64, 8.5ns, CMOS;
| 型号： | CYM74P431PM-66C |
| 厂家： | 
CYPRESS |
| 描述： | Cache SRAM Module, 64KX64, 8.5ns, CMOS 时钟 静态存储器 内存集成电路 |
| 文件： | 总8页 (文件大小：214K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1CY M74 S43 0/31
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
Intel® 82340FX PCIset Level II
Cache Module Family
CYM74B430 is an asynchronous 256-Kbyte cache module that
provides a low-cost, high-performance solution with industry stan-
dard 32Kx8 5V SRAMs and 3.3V level translators. The
CYM74B430 is organized as 32K by 64-bits with an 8Kx8 tag that
supports 3-2-2-2 read and 4-2-2-2 write cycles at CPU bus speeds
up to 66 MHz.
Features
•
Pin-compatible secondary cache module family that ad-
heres to the Intel COAST 1.1 specification
•
Asynchronous (CYM74B430), synchronous pipelined
(CYM74P430, CYM74P431), or synchronous
(CYM74S430, CYM74S431) configurations with pres-
ence and configuration detect pins
The synchronousmodules are available with low cost synchro-
nous pipelined RAMs, or high performance synchronous burst
RAMs. The synchronous pipelined modules are based on a
16Kx64 RAM. The CYM74P430 is a 256-KB module while the
CYM74P431 is a 512-KB module.
•
Ideal for Intel® P54C-based systems with the 82430FX
(Triton) chipset
•
•
Operates at 50, 60, and 66 MHz
The CYM74S430 and CYM74S431 are high performance syn-
chronous burst cache modules that provide 256 KB and 512 KB of
cache respectively. The modules support 3-1-1-1 performance at
66 MHz. Multiple ground pins and on-board decoupling capac-
itors ensure high performance with maximum noise immunity.
Uses cost-effective CMOS asynchronous SRAMs or
high-performance synchronous SRAMs
•
160-position Burndy DIMM CELP2X80SC3Z48 connec-
tor•3.3V compatible inputs/data outputs
All components on the cache modules are surface mounted on
a multi-layer epoxy laminate (FR-4) substrate. The contact
pins are plated with 150 micro-inches of nickel covered by 10
micro-inches of gold flash.
Functional Description
This family of secondary cache modules is designed for Intel
P54C systems with the 82430FX (Triton) chipset.
LogicBlockDiagram- CYM74B430
8Kx8
WE
PD
GND NC
PD
PD
GND
PD
1
PD
4
3
2
0
GND NC
TWE
D
A
TIO[7:0]
CS
CE
OE
GND
5 V
ADDRESSLATCH
LA[17:5]
A[17:5]
D[7:0]
D[15:8]
D[23:16]
D[31:24]
CALE
LE
32K x 8
FCT373C
D
D
D
A
D
CAA[4:3]
A
A
A
CE
OE
CE
OE
CE
OE
CE
OE
CWE
CWE
CWE
3
0
CWE
1
2
COE
CWE[3:0]
D[39:32]
D[47:40]
D[55:48]
D[63:56]
32K x 8
D
D
D
D
CAB[4:3]
A
A
A
A
CE
OE
CE
OE
CE
OE
CE
OE
CWE
4
CWE
CWE
CWE
7
5
6
74B430–1
CWE[7:4]
Intel is a registered trademark of Intel Corporation.
Cypress Semiconductor Corporation 3901 North First Street
•
•
San Jose
•
CA 95134
•
408-943-2600
December 1994 – Revised October 1995
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
Block Diagram: 5V to 3.3V Level Conversion (CYM74B430)
5.0 Volts
V
CC
100 ohms
64 Bit Bus Switch
(uses7CYBUS3384)
5V SRAM
4.3V zener
5% tolerance
3.3V compliant I/O
D
A
B
74B430–2
GND
BE
LogicBlockDiagram- CYM74P430,CYM74P431
PD
PD
PD
PD
PD
0
4
3
2
1
8Kx8(CYM74P430)
32Kx8(CYM74P431)
CYM74P430 TBD
CYM74P431 TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TAGWE
WE
D
TIO[7:0]
A −A
18
A
13:0
5
A −A
18 5
CYM74P431ONLY
D –D
63 0
CLK1
CLK0
CK
CK
CK
CK
D
D
D
D
A -A
1
A
A
A
A
3
0
14
8
CWE −CWE
BE −BE
BE −BE
BE −BE
BE −BE
7
0
7
0
7
0
7
0
7
ADSP
ADSC
ADV
ADSP
ADSC
ADV
ADSP
ADSC
ADV
ADSP
ADSC
ADV
ADSP
ADSC
ADV
CCS
CS
CS
CS
CS
0
0
0
0
COE
OE
OE
OE
OE
GWE
GWE
GWE
GWE
GWE
BWE
BWE
BWE
BWE
BWE
CS
1
CS
CS
CS
1
CS
CS
1
CS
CS
1
CS
4
V
GND
V
CC
GND
GND
4
4
4
CC
CS
2
CS
2
CS
CS
GND
2
CC
CS
CS
2
CS
3
V
CC
V
3
3
3
16Kx64
16Kx64
16Kx64
16Kx64
A
17
CYM74P430(GND)
CYM74P431(A
)
18
74B430–3
2
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
[1]
Logic Block Diagram - CYM74S430/CYM74S431
PD
PD
1
PD
PD
0
PD
2
3
4
NC
NC
GND
NC
GND
GND
GND NC
CYM74S430
CYM74S431
GND
GND
8Kx8(CYM74S430)
32Kx8(CYM74S431)
TWE
TIO[7:0]
D[63:0]
WE D
A[18:5]
GND
GND
CE
OE
5 V
D
D
D
D
D[31:16]
D[15:0]
D[47:32]
D[63:48]
A[18:3]
ADSP
A
A
A
A
ADSP
ADSP
ADSP
ADSP
ADSC
ADV
ADSC
ADV
ADSC
ADV
ADSC
ADV
ADSC
ADV
CE
CE
CE
CE
32Kx18(CYM74S430)
64Kx18(CYM74S431)
3.3V
OE
OE
OE
OE
WE4/5
WE2/3
WE6/7
WE0/1
CLK0
CLK1
CCS
74B430–4
COE
CWE[7:0]
Note:
1. A18 is not used by CYM74S430. DP pins are pulled high through
10KΩ.
3
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
Selection Guide
Asynchronous Cache Modules
Part Number
Cache Size
74B430-50
74B430-60
74B430-66
256 KB
50
System Clock (MHz)
Data tAA
60
66
20 ns
30 ns
17 ns
20 ns
15 ns
15 ns
Tag tAA
Synchronous Pipelined Cache Modules
Part Number
74P430-50
74P430-60
74P430-66
74P431-50
512 KB
74P431-60
74P431-66
Cache Size
256 KB
50
System Clock
(MHz)
60
66
50
60
66
Data tCDV
Tag tAA
13.5 ns
30 ns
10 ns
20 ns
8.5 ns
15 ns
13.5 ns
30 ns
10 ns
20 ns
8.5 ns
15 ns
Synchronous Burst Cache Modules
Part Number
74S430-50
74S430-60
74S430-66
74S431-50
512 KB
74S431-60
74S431-66
Cache Size
256 KB
50
System Clock
(MHz)
60
66
50
60
66
Data tCDV
Tag tAA
13.5 ns
30 ns
10 ns
20 ns
8.5 ns
15 ns
13.5 ns
30 ns
10 ns
20 ns
8.5 ns
15 ns
4
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
PinConfiguration
Dual Read–Out SIMM (DIMM)
Top View
GND
TIO1
TIO7
TIO5
GND
TIO0
TIO2
TIO6
TIO4
RSVD
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
1
2
3
4
5
6
7
8
9
TIO3
RSVD
VCC
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
RSVD
TWE
CAA3 (CYM74B430) / ADSC (CYM74P43X,CYM74S43X)
(CYM74P43X,CYM74S43x)ADV / (CYM74B430)CAA4
GND
COE
CWE5
CWE7
CWE1
VCC
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
CWE4
CWE6
CWE0
CWE2
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
CWE3
CAB4 (CYM74B430) / CCS (CYM74P43X,CYM74S43X)
(GWE) (CYM74P43X
(BWE) (CYM74P43X)
GND
A3
A7
A5
A11
A16
(CYM74P43X,CYM74S43x)NC / (CYM74B430) CAB3
(CYM74P43X,CYM74S43x)NC / (CYM74B430) CALE
97
98
99
GND
RSVD
A4
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
A6
A8
A10
VCC
A17
GND
A9
A14
A15
RSVD
PD0
PD2
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
NC (74B430, 74S430) / GND (74P430) / A18 (74P431, 74S431)
GND
A12
A13
NC (CYM74B430)/ ADSP (CYM74P43X,CYM74S43X)
(CYM74B430)
CS
/ NC (CYM74P43X,CYM74S43X)
NC (ECS2)
PD1
PD3
PD4
GND
GND
(CYM74P43X,CYM74S43x)CLK0 / (CYM74B430)NC
NC (CYM74B430, CYM74P430)/ CLK1 (CYM74P431,CYM74S43X)
GND
GND
D63
VCC
D61
D59
D57
117
118
119
120
121
122
D62
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
D60
D58
D56
GND
D55
D53
D51
D49
GND
D47
D45
D43
VCC
D41
D39
D37
GND
D35
D33
D31
VCC
D29
D27
D25
GND
D23
D21
D19
VCC
D17
D15
D13
GND
D11
GND
D54
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
D52
D50
D48
GND
D46
D44
D42
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
D40
D38
D36
GND
D34
D32
D30
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
D28
D26
D24
GND
D22
D20
D18
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
D16
D14
D12
GND
D10
D8
D9
D7
D6
VCC
NC (CYM74B430) / VCCQ (CYM74P43X,CYM74S43X)
156
157
158
159
160
76
77
78
79
80
D5
D3
D1
D4
D2
D0
74B430–5
GND
GND
5
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
Pin Definitions
Common Signals
Description
V
5V Supply
CC
GND
Ground
A[18:3]
COE
Addresses from processor
Output Enable
CWE[7:0]
Byte Write Enables
Presence Detect output pins
Data lines from processor
Tag data bits
PD -PD
0
4
D[63:0]
TIO[7:0]
TWE
Tag Write Enable signal
Signal not connected on module
Reserved
NC
RSVD
CYM74B430 Only Signals
Description
Description
CAA[4:3]
CAB[4:3]
CALE
Lower two address bits for bank 0
Lower two address bits for bank 1
Latch Enable
CS
Chip Select
CYM74P43X, CYM74S43X Signals
V
3.3V Supply
CCQ
ADSP
ADSC
ADV
Processor Address Strobe
Cache Controller Address Strobe
Burst Address Advance
Chip Select
CCS
CLK[1:0]
Clock signals, CLK1 not used on CYM74P430
Presence Detect Pins
PD
PD
PD
PD
PD
0
4
3
2
1
Asynchronous - CYM74B430
GND
TBD
TBD
GND
GND
NC
TBD
TBD
NC
GND
TBD
TBD
GND
NC
GND
TBD
TBD
NC
NC
Synchronous Pipelined - CYM74P430
Synchronous Pipelined - CYM74P431
Synchronous Burst - CYM74S430
Synchronous Burst - CYM74S431
TBD
TBD
GND
GND
GND
NC
6
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
Maximum Ratings
Operating Range
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Ambient
Tempera-
ture
Storage Temperature ................................. –55°C to +125°C
Range
V
V
CCQ
CC
Ambient Temperature
with Power Applied ........................................ –0°C to +70°C
Commercial
(CYM74B430)
0°C to
+70°C
5V ± 5%
N/A
3.3V Supply Voltage to Ground Potential.... –0.5V to +5.25V
5V Supply Voltage to Ground Potential....... –0.5V to +5.25V
Commercial
(CYM74P43X,
CYM74S43X)
0°C to
+70°C
5V ± 5%
5V ± 5%
3.3V+ 10%
– 5%
DC Voltage Applied to Outputs
in High Z State .............................................. –0.5V to +4.6V
DC Input Voltage........................................... –0.5V to +4.6V
Output Current into Outputs (LOW) .............................20 mA
Electrical Characteristics Over the Operating Range
Parameter
Description
Input HIGH Voltage
Input LOW Voltage
Input LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Test Condition
Min.
Max.
+ 0.3
CC
Unit
V
2.2
V
V
V
IH
V
V
V
V
CYM74B430
CYM74P43X, CYM74S43X
–0.5
–0.3
2.4
0.8
IL
0.8
V
IL
V
V
V
V
V
V
V
=Min. I = −4 mA
V
OH
CC
CC
CC
CC
CC
CC
CC
OH
=Min. I = 8 mA
0.4
V
OL
OL
I
I
I
I
I
V
V
V
V
V
Operating Supply Current
Operating Supply Current
Operating Supply Current
Operating Supply Current
Operating Supply Current
=Max., I
=Max., I
=Max., I
=Max., I
=Max., I
=0 mA, f=f
=0 mA, f=f
=0 mA, f=f
=0 mA, f=f
=0 mA, f=f
=1/t
=1/t
=1/t
=1/t
=1/t
1600
TBD
TBD
1200
1400
mA
mA
mA
mA
mA
CC (74B430)
CC (74P430)
CC (74P431)
CC (74S430)
CC (74S431)
CC
CC
CC
CC
CC
OUT
OUT
OUT
OUT
OUT
MAX
MAX
MAX
MAX
MAX
RC
RC
RC
RC
RC
Ordering Information
Speed
(MHz)
Package
Name
Operating
Range
Ordering Code
Package Type
Description
50
CYM74B430PM-50C
CYM74P430PM-50C
CYM74P431PM-50C
CYM74S430PM-50C
CYM74S431PM-50C
CYM74B430PM-60C
CYM74P430PM-60C
CYM74P431PM-60C
CYM74S430PM-60C
CYM74S431PM-60C
CYM74B430PM-66C
CYM74P430PM-66C
CYM74P431PM-66C
CYM74S430PM-66C
CYM74S431PM-66C
PM34
TBD
160-Pin Dual-Readout SIMM
160-Pin Dual-Readout SIMM
160-Pin Dual-Readout SIMM
Async 256 KB
Commercial
Commercial
Commercial
Sync pipelined 256 KB
Sync pipelined 512 KB
Sync Burst 256 KB
Sync Burst 512 KB
Async 256 KB
TBD
PM28
PM28
PM34
TBD
60
66
Sync pipelined 256 KB
Sync pipelined 512 KB
Sync Burst 256 KB
Sync Burst 512 KB
Async 256 KB
TBD
PM28
PM28
PM34
TBD
Sync pipelined 256 KB
Sync pipelined 512 KB
Sync Burst 256 KB
Sync Burst 512 KB
TBD
PM28
PM28
Document #: 38-M-00074-A
7
CYM74B430
CYM74P430/31
CYM74S430/31
PRELIMINARY
Package Diagrams
160–Pin Dual ReadoutSIMM PM28
160–Pin Dual Readout SIMM PM34
© Cypress Semiconductor Corporation, 1995. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of anycircuitry other than circuitry embodied in a CypressSemiconductor product. Nor does it conveyor imply any license under patent or other rights. CypressSemiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
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