CYM74P435BPM-50C [CYPRESS]
Cache SRAM Module, 128KX32, 13.5ns, CMOS;
| 型号： | CYM74P435BPM-50C |
| 厂家： | 
CYPRESS |
| 描述： | Cache SRAM Module, 128KX32, 13.5ns, CMOS 静态存储器 内存集成电路 |
| 文件： | 总7页 (文件大小：555K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1CY M74 P43 4B/4 35B
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
Intel™ 82430FX, HX, VX PCIset
Pipelined L2 Cache Modules
The CYM74P430B/431B/434B/435B modules are based on
industry standard 32Kx32 synchronous pipelined BSRAM.
Features
• Secondary cache modules that are ideal for the Intel
The CYM74P430B (256-Kbyte) and CYM74P431B
(512-Kbyte) are high performance modules compatible with all
three chipsets.
82430FX, 82430HX, and 82430VX chip sets
• Complies with Intel COAST 3.0 cache module specifi-
cations
• High-performance cache modules based on synchro-
nous pipelined 32Kx32 data BSRAM
• All modules contain series damping resistors on the
data lines to improve system signal quality
• Operates at 50, 60, and 66 MHz
• 160-position connector is compatible with all four Key-
ing Options defined in COAST 3.0.
• 3.3V compatible inputs/data outputs
The CYM74P434B (256-Kbyte) and CYM74P435B
(512-Kbyte) are high performance modules with extended
cacheability for systems based on the 82430HX chipset.
Multiple ground pins and on-board decoupling capacitors en-
sure high performance with maximum noise immunity. All
modules have series damping resistors on the data lines.
All components on the cache modules are surface mounted
on a multi-layer epoxy laminate (FR-4) substrate. The contact
pins are plated with 150 micro-inches of nickel covered by 30
micro-inches of gold.
Functional Description
The cache modules are designed for Intel P54C/P55C sys-
tems with the 82430FX, 82430HX, and 82430VX chip sets.
Logic Block Diagram
PD
PD
PD
PD
0
3
2
1
Note:The tag rams are 8Kx8 for CYM74P430B/434B
CYM74P430B/434B
CYM74P431B/435B
NC
GND NC
GND NC
NC
and 32Kx8 for CYM74P431B/435B
WE
GND GND
[1]
Extended cache ability only CYM74P434B/435B
CYM74P430B/434BA
CYM74P431B/435BA
A
D
D
TIO
10:8
17:3
18:3
2:0
7:0
CE
CYM74P430B/434BECS
CYM74P431B/435BNC
ECS
2
1
TWE
WE
A
TIO
7:0
CYM74P430B/434BECS
CYM74P431B/435BGND
1
CE
CYM74P431B/435B ONLY
CK CK
D
63:0
CLK
1
CLK
0
CK
CK
D
D
31:0
D
31:0
D
63:32
D
31:0
D
31:0
D
31:0
D
63:32
31:0
A
17:3
A
14:0
A
14:0
A
14:0
A
14:0
CWE
CWE
CWE
CWE
7:4
3:0
7:4
3:0
CWE
BW
BW
BW
BW
3:0
7:0
3:0
3:0
3:0
ADSP
ADSC
ADV
ADSP
ADSC
ADV
ADSP
ADSC
ADV
ADSP
ADSC
ADV
ADSP
ADSC
ADV
CCS
CS
CS
CS
CS
1
1
1
1
COE
GWE
BWE
OE
OE
OE
OE
GWE
BWE
GWE
BWE
GWE
BWE
GWE
BWE
CYM74P430B/434BECS
CS
CS
GND
CS
CS
2
1
2
2
2
CYM74P431B/435BA
18
MODE
CS
MODE
CS
MODE
CS
MODE
CS
BOSEL
V
A
18
CC3
2
2
2
2
32Kx32
Note:All modules have series damping resistors on each data line between the SRAM and the module connector
Intel is a trademark of Intel Corporation.
32Kx32
32Kx32
32Kx32
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
December 1995 – Revised June 1996
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
Selection Guide
Synchronous Pipelined Cache Modules
Part Number
74P430B−50
74P430B−60
256 KB
60
74P430B−66
74P431B−50
74P431B−60
74P431B−66
Cache Size
512 KB
System Clock
(MHz)
50
66
50
60
66
Data SRAM t
w/0 pF loading
13.5 ns
20 ns
10 ns
15 ns
8.5 ns
15 ns
13.5 ns
20 ns
10 ns
15 ns
8.5 ns
15 ns
CO
Tag SRAM t
AA
Synchronous Pipelined Cache Modules
with Extended Cacheability
Part Number
74P434B−50
74P434B−60
256 KB
60
74P434B−66
74P435B−50
74P435B−60
74P435B−66
Cache Size
512 KB
System Clock
(MHz)
50
66
50
60
66
Data SRAM t
w/0 pF loading
13.5 ns
20 ns
10 ns
15 ns
8.5 ns
15 ns
13.5 ns
20 ns
10 ns
15 ns
8.5 ns
15 ns
CO
Tag SRAM t
AA
2
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
Pin Configuration
Dual Read–Out SIMM (DIMM)
Top View
GND
TIO1
TIO7
TIO5
GND
TIO0
TIO2
TIO6
TIO4
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
1
2
3
4
5
6
7
8
9
TIO3
[1]
[1]
[1]
(CYM74P434B,CYM74P435B)TIO9
TIO8 (CYM74P434B,CYM74P435B)
VCC5
VCC3
TWE
ADSC
GND
CWE4
CWE6
CWE0
(CYM74P434B,CYM74P435B)TIO10
ADV
GND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
COE
CWE5
CWE7
CWE1
VCC5
CWE3
NC
NC
CWE2
VCC3
CCS
GWE
BWE
GND
A3
97
98
99
GND
RSVD
A4
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
A7
A6
A5
A8
A11
A10
A16
VCC5
A17
GND
A9
A14
A15
RSVD
PD0
PD2
BOSEL
GND
CLK0
GND
D63
VCC5
D61
VCC3
A18 (CYM74P431B,CYM74P435B)
GND
A12
A13
ADSP
ECS1
ECS2
PD1
PD3
GND
[2]
CLK1 (CYM74P431B,CYM74P435B)
GND
D62
VCC3
D60
D58
D56
117
118
119
120
121
122
D59
D57
GND
D55
D53
D51
D49
GND
D47
D45
D43
VCC5
D41
D39
D37
GND
D35
D33
D31
VCC
D29
D27
D25
GND
D54
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
D52
D50
D48
GND
D46
D44
D42
VCC3
D40
D38
D36
GND
D34
D32
D30
VCC3
D28
D26
D24
GND
D22
D20
D18
VCC3
D16
D14
D12
GND
D10
D8
GND
D23
D21
D19
VCC5
D17
D15
D13
GND
D11
Notes:
1. For the CYM74P434B and CYM74P435B
TIO8 and TIO9 are pulled up on the mod-
ule through a 8.2KΩ resistor. TIO10 is
pulled to ground on the module through
an 8.2KΩ resisitor.
2. BOSEL is pulled up through a 4.7KΩ resistor
on the module for backward compatible opera-
tion in systems not supporting BOSEL opera-
tion.
D9
D7
D6
VCC3
D4
D2
D0
VCC5
D
5
157
158
159
160
77
78
79
80
D3
D1
GND
GND
3
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
Pin Definitions
Common Signals
Description
V
V
5V Supply
CC5
CC3
3.3V Supply
GND
Ground
A
Addresses from processor
Output Enable
18:3
COE
CWE
BWE
GWE
Byte Write Selects
Byte Write Enable
Global Write Enable
Data lines from processor
Tag data bits
7:0
D
63:0
TIO
TIO
7:0
10:8
Extended cacheability tag data bits for CYM74P434B or CYM74P435B
Tag Write Enable signal
TWE
ADSP
ADSC
ADV
Processor Address Strobe
Cache Controller Address Strobe
Burst Address Advance
CCS
Cache Chip Select
ECS
ECS
256-Kbyte Expansion Chip Select input pin (CYM74P430B or CYM74P434B)
256-Kbyte Expansion Chip Select output pin (CYM74P430B or CYM74P434B)
1
2
CLK
Clock signals, CLK is not used on CYM74P430B or CYM74P434B
1:0
1
PD
Presence Detect output pins
3:0
BOSEL
Burst Order Select. When LOW, linear burst sequence is selected. When HIGH, inter-
leaved burst sequence is selected. If not driven (a no-connect on the motherboard) a
pull-up resistor on the module will default to interleaved burst sequence.
RSVD
NC
Reserved.
Signal not connected on module.
Presence Detect Pins
PD
PD
PD
PD
0
3
2
1
CYM74P430B, CYM74P434B
CYM74P431B, CYM74P435B
NC
GND
NC
NC
NC
GND
GND
GND
4
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
DC Voltage Applied to Outputs
in High Z State................................................–0.5V to +4.6V
DC Input Voltage ............................................–0.5V to +4.6V
Output Current into Outputs (LOW)............................. 20 mA
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................. –55°C to +125°C
Operating Range
Ambient Temperature
with Power Applied ......................................... –0°C to +70°C
Ambient
Temperature
Range
V
V
CC3
CC5
3.3V Supply Voltage to Ground Potential....... –0.5V to +4.6V
5V Supply Voltage to Ground Potential.......... –0.5V to +7.0V
Commercial
0° to 70°C
5V ± 5%
3.3V
+10%–5%
Electrical Characteristics Over the Operating Range
Parameter
Description
Input HIGH Voltage
Input LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Test Condition
Min.
Max.
+ 0.3
CC3
Unit
V
2.0
–0.3
2.4
V
V
V
IH
V
V
V
0.8
IL
V
V
V
V
V
V
=Min. I = –4 mA
V
OH
CC
CC
CC
CC
CC
CC
OH
=Min. I = 8 mA
0.4
750
V
OL
OL
I
I
I
I
V
V
V
V
Operating Supply Current
Operating Supply Current
Operating Supply Current
Operating Supply Current
=Max., I
=Max., I
=Max., I
=Max., I
=0 mA, f=f
=0 mA, f=f
=0 mA, f=f
=0 mA, f=f
mA
mA
mA
mA
CC (74P430B)
CC (74P431B)
CC (74P434B)
CC (74P435B)
CC
CC
CC
CC
OUT
OUT
OUT
OUT
MAX
MAX
MAX
MAX
1400
900
1550
Ordering Information
Speed
(MHz)
Package
Name
Operating
Range
Ordering Code
Package Type
Description
50
CYM74P430BPM-50C
CYM74P431BPM-50C
CYM74P434BPM-50C
CYM74P435BPM-50C
CYM74P430BPM-60C
CYM74P431BPM-60C
CYM74P434BPM-60C
CYM74P435BPM-60C
CYM74P430BPM-66C
CYM74P431BPM-66C
CYM74P434BPM-66C
CYM74P435BPM-66C
PM38
PM40
PM39
PM41
PM38
PM40
PM39
PM41
PM38
PM40
PM39
PM41
160-Pin Dual-Readout SIMM
160-Pin Dual-Readout SIMM
160-Pin Dual-Readout SIMM
256 KB
512 KB
Commercial
Commercial
Commercial
256 KB extendedcache
512 KB extendedcache
256 KB
60
66
512 KB
256 KB extendedcache
512 KB extendedcache
256 KB
512 KB
256 KB extendedcache
512 KB extendedcache
Document #: 38-M-00079
5
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
Package Diagrams
CYM74P430BPM in 160-pin Dual Readout SIMM PM38
CYM74P434BPM in 160-pin Dual Readout SIMM PM39
6
CYM74P430B/431B
CYM74P434B/435B
PRELIMINARY
Package Diagrams (continued)
CYM74P431BPM in 160-pin Dual Readout SIMM PM40
*
CYM74P435BPM in 160-pin Dual Readout SIMM PM41
*
* The 512-KByte modules CYM74P431B and CYM74P435B have a 1.300 max. height vs. 1.140 for the 256-KB modules.
© Cypress Semiconductor Corporation, 1996. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of anycircuitry other than circuitry embodied in a CypressSemiconductor product. Nor does it conveyor imply any license under patent or other rights. CypressSemiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
相关型号：
©2020 ICPDF网 联系我们和版权申明