CAB400M12XM3 [CREE]

1200 V, 400 A All-Silicon Carbide Switching-Loss Optimized, Half-Bridge Module;


型号：	CAB400M12XM3
厂家：	CREE, INC
描述：	1200 V, 400 A All-Silicon Carbide Switching-Loss Optimized, Half-Bridge Module
文件：	总9页 (文件大小：801K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

V_DS

I_DS

1200 V

400 A

CAB400M12XM3

1200 V, 400 A All-Silicon Carbide

Switching-Loss Optimized, Half-Bridge Module

Technical Features

Package 80 x 53 x 19 mm

•

High Power Density Footprint

High Junction Temperature (175 °C) Operation

Low Inductance (6.7 nH) Design

Implements Third Generation SiC MOSFET

Technology Optimized for Low Switching Loss

Silicon Nitride Insulator and Copper Baseplate

•

Applications

•

Motor & Traction Drives

Vehicle Fast Chargers

Uninterruptable Power Supplies

Smart-Grid / Grid-Tied Distributed Generation

System Benefits

•

Terminal layout allows for direct bus bar connection without bends or bushings enabling a simple,

low inductance design.

•

Isolated integrated temperature sensing enables high-level temperature protection.

Dedicated drain Kelvin pin enables direct voltage sensing for gate driver overcurrent protection.

Key Parameters (T_C= 25˚C unless otherwise specified)

Symbol Parameter

Min.

Typ.

Max.

1200

+19

Unit

Test Conditions

Note

V_{DS max}Drain-Source Voltage

V_{GS max}Gate-Source Voltage, Maximum Value

Note 1

-4

AC frequency ≥ 1 Hz

Static

Gate-Source Voltage, Recommended

Operating Value

V_{GS op}

+15

395

298

395

220

V_GS= 15 V, T_C= 25 ˚C, T_VJ≤ 175 ˚C Fig. 20

I_DS

I_SD

DC Continuous Drain Current

Note 2

V_GS= 15 V, T_C= 90 ˚C, T_VJ≤ 175 ˚C

V_GS= 15 V, T_C= 25 ˚C, T_VJ≤ 175 ˚C

V_GS= - 4 V, T_C= 25 ˚C, T_VJ≤ 175 ˚C

DC Source-Drain Current

I_{SD BD}DC Source-Drain Current (Body Diode)

I_{DS pulsed}Maximum Pulsed Drain-Source Current

I_{SD pulsed}Maximum Pulsed Source-Drain Current

800

t_{P max}limited by T_{j max}

V_GS= 15 V, T_C= 25 ˚C

Maximum Virtual Junction

T_{VJ op}Temperature under Switching

Conditions

-40

175

°C

Note 1 If MOSFET body diode is not used, V_{GS max}= -8/+19 V

Note 2 Assumes R_{TH JC}= 0.15 °C/W and R_{DS on}= 6.4 mΩ. Calculate P_D= (T_VJ– T_C) / R_{TH JC}. Calculate I_{D max}= √(P_D/ R_{DS on}

)

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

MOSFET Characteristics (Per Position) (T_C= 25˚C unless otherwise specified)

Symbol Parameter

Min.

1200

1.8

Typ. Max. Unit

Test Conditions

V_GS= 0 V, I_D= 400 μA

Note

V_{BR DSS}Drain-Source Breakdown Voltage

2.5

2.0

3.6

V_DS= V_GS, I_D= 92 mA

V_{GS th}

Gate Threshold Voltage

V_DS= V_GS, I_D= 92 mA, T_J= 175 °C

V_GS= 0 V, V_DS= 1200 V

V_GS= 15 V, V_DS= 0 V

I_DSS

I_GSS

Zero Gate Voltage Drain Current

Gate-Source Leakage Current

130

1.0

5.3

μA

0.04

4.0

6.4

V_GS= 15 V, I_D= 400 A

Drain-Source On-State Resistance (Devices

Only)

Fig. 2

Fig. 3

R_{DS on}

mΩ

V_GS= 15 V, I_D= 400 A, T_J= 175 °C

V_DS= 20 V, I_DS= 400 A

278

g_fs

Transconductance

Fig. 4

260

V_DS= 20 V, I_DS= 400 A, T_J= 175 °C

Turn-On Switching Energy, T_J= 25 °C

T_J= 125 °C

T_J= 175 °C

4.1

5.0

5.6

V_DS= 600 V,

I_D= 400 A,

mJ V_GS= -4 V/15 V,

R_G(ext)= 0.0 Ω,

E_on

Fig. 11

Fig. 13

Turn-Oﬀ Switching Energy, T_J= 25 °C

T_J= 125 °C

T_J= 175 °C

3.9

4.2

4.1

E_oﬀ

L = 13.6 μH

R_{G int}

C_iss

Internal Gate Resistance

Input Capacitance

1.4

24.5

1.0

V_GS= 0 V, V_DS= 800 V,

C_oss

C_rss

Q_GS

Q_GD

Q_G

Output Capacitance

Reverse Transfer Capacitance

Gate to Source Charge

Gate to Drain Charge

Total Gate Charge

Fig. 9

V_AC= 25 mV, f = 100 kHz

256

308

908

V_DS= 800 V, V_GS= -4 V/15 V

nC I_D= 400 A

Per IEC60747-8-4 pg. 21

R_{TH JC}FET Thermal Resistance, Junction to Case

0.15 0.16 °C/W

Fig. 17

Body Diode Characteristics (Per Position) (T_C= 25˚C unless otherwise specified)

Symbol Parameter

Min.

Typ.

6.0

Max. Unit

Test Conditions

Note

V_GS= -4 V, I_SD= 400 A

V_SD

Body Diode Forward Voltage

Fig. 7

5.3

V_GS= -4 V, I_SD= 400 A, T = 175 °C

t_RR

Q_RR

I_RR

Reverse Recovery Time

6.5

218

μC

V_GS= -4 V, I_SD= 400 A, V_R= 600 V

Reverse Recovery Charge

Peak Reverse Recovery Current

di/dt = 13 A/ns, T = 175 °C

Reverse Recovery Energy, T_J= 25 °C

T_J= 125 °C

T_J= 175 °C

0.3

1.0

1.9

V_DS= 600 V, I_D= 400 A,

mJ V_GS= -4 V/15 V, R_G(ext)= 0.0 Ω,

E_RR

Fig. 14

L= 13.6 μH

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Temperature Sensor (NTC) Characteristics

Symbol Parameter

Min.

Typ.

Max.

Unit

kΩ

Test Conditions

R₂₅

∆R/R Tolerance of R₂₅

P₂₅Maximum Power Dissipation

Rated Resistance

4.7

T_NTC= 25 °C

Steinhart-Hart Modified Coeﬀicients for R/T Computation:

T_NTC< 25 °C

T_NTC≥ 25 °C

3.3540E-03

3.0013E-04

5.0852E-06

2.1877E-07

Module Physical Characteristics

Symbol Parameter

Min.

Typ.

0.72

0.63

6.7

Max.

Unit

Test Conditions

R_3-1

R_1-2

L_stray

T_C

Package Resistance, M1

Package Resistance, M2

Stray Inductance

Case Temperature

Weight

T_C= 125 °C, Note 3 & 4₁

mΩ

T_C= 125 °C, Note 3 & 4

°C

Between Terminals 2 and 3

-40

125

175

3.0

4.0

2.0

4.0

5.0

Baseplate, M4 bolts

Power Terminals, M5 bolts

AC, 50 Hz, 1 min

M_S

Mounting Torque

N-m

V_isol

CTI

Case Isolation Voltage

4.0

Comparative Tracking Index

600

12.5

11.5

5.7

From 2 to 3, Note₂4

From 1 to Baseplate, Note 4

From 2 to 5, Note 4

Clearance Distance

Creepage Distance

13.7

14.7

14.0

14.7

14.3

From 5 to Baseplate, Note 4

From 2 to 3, Note 4

From 1 to Baseplate, Note 4

From 2 to 5, Note 4

From 5 to Baseplate, Note 4

Note₁3 Total Eﬀective Resistance (Per Switch Position) = MOSFET R_{DS on}+ Switch Position Package Resistance.

Note₂4 Numbers reference the connections from the Schematic and Package Dimensions sections of this document.

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Typical Performance

800

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

Conditions:

tp < 300 μs

V_GS= 15 V

Conditions:

tp < 300 μs

V_GS= 15 V

175 °C

700

600

150 °C

125 °C

25 °C

500

-40 °C

100 °C

400

100 °C

300

125 °C

150 °C

175 °C

200

100

-40 °C

25 °C

400

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

100

200

300

500

600

700

800

Drain-Source Voltage, V_DS(V)

Drain-Source Current, I_DS(A)

Figure 1. Output Characteristics for Various Junction

Temperatures

Figure 2. Normalized On-State Resistance vs. Drain Current for Various

Junction Temperatures

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

700

Conditions:

tp < 300 μs

V_DS= 20 V

Conditions:

tp < 300 μs

V_GS= 15 V

I_D= 400 A

600

500

175 °C

150 °C

125 °C

400

300

100 °C

200

25 °C

0 °C

100

-25 °C

-40 °C

-50

100

150

200

0.0

2.0

4.0

6.0

8.0

10.0

Virtual Junction Temperature, T_VJ(°C)

Gate-Source Voltage, V_GS(V)

Figure 3. Normalized On-State Resistance vs.

Junction Temperature

Figure 4. Transfer Characteristic for Various Junction

Temperatures

800

700

600

500

400

300

200

100

800

700

600

500

400

300

200

100

Conditions:

tp < 300 μs

V_GS= 15 V

Conditions:

tp < 300 μs

V_GS= 0.0 V

175 °C

150 °C

125 °C

100 °C

25 °C

-40 °C

25 °C

0 °C

-25 °C

-40 °C

100 °C

125 °C

150 °C

175 °C

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

Source-Drain Voltage, V_SD(V)

Figure 5. 3^rdQuadrant Characteristic vs. Junction Temperatures at

V_GS= 15 V

Figure 6. 3^rdQuadrant Characteristic vs. Junction Temperatures at

V_GS= 0 V (Body Diode)

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Typical Performance

800

100.00

10.00

1.00

Conditions:

T_J= 25 °C

V_AC= 25 mV

Conditions:

tp < 300 μs

V_GS= - 4.0 V

700

600

500

400

300

200

100

C_iss

f = 100 kHz

175 °C

150 °C

125 °C

C_oss

100 °C

25 °C

C_rss

0.10

0 °C

-25 °C

-40 °C

0.01

100

150

200

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

8.0

Drain-Source Voltage, V_DS(V)

Source-Drain Voltage, V_SD(V)

Figure 7. 3^rdQuadrant Characteristic vs. Junction Temperatures at

V_GS= - 4 V (Body Diode)

Figure 8. Typical Capacitances vs. Drain to Source Voltage

(0 - 200V)

100.00

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

Conditions:

T_J= 25 °C

V_AC= 25 mV

f = 100 kHz

Conditions:

V_GS= V_DS

I_DS= 92 mA

C_iss

10.00

1.00

0.10

0.01

C_oss

C_rss

200

400

600

800

1,000

1,200

-50

100

150

200

Drain-Source Voltage, V_DS(V)

Junction Temperature, T_J(°C)

Figure 9. Typical Capacitances vs. Drain to Source Voltage

(0 - 1200V)

Figure 10. Threshold Voltage vs. Junction Temperature

Conditions:

T_VJ= 25 °C

V_DS= 600 V

R_G(ext)= 0.0 Ω

V_GS= -4/+15 V

L = 13.6 µH

E_On+ E_Off

Conditions:

T_VJ= 25 °C

V_DS= 800 V

R_G(ext)= 0.0 Ω

V_GS= -4/+15 V

L = 13.6 µH

E_On+ E_Off

E_Off

E_On

E_Off

E_RR

100

200

300

400

500

600

700

800

900

100

200

300

400

500

600

700

800

900

Drain-Source Current, I_DS(A)

Figure 11. Switching Energy vs. Drain Current

(V_DS= 600 V)

Figure 12. Switching Energy vs. Drain Current

(V_DS= 800 V)

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Typical Performance

15.0

3.0

2.5

2.0

1.5

1.0

0.5

0.0

Conditions:

I_DS= 400 A, V_DD=600 V

R_G(ext)= 0.0 Ω, V_GS= -4/+15 V

L = 13.6 µH

Conditions:

I_DS= 400 A,

R_G(ext)= 0.0 Ω,

V_GS= -4/+15 V

L = 13.6 µH

12.5

10.0

7.5

E_On+E_Off

E_RR(V_DD= 800 V)

E_RR(V_DD= 600 V)

E_On

E_Off

5.0

2.5

0.0

100

125

150

175

200

100

125

150

175

200

Junction Temperature, T_VJ(°C)

Figure 13. MOSFET Switching Energy vs. Junction Temperature

Figure 14. Reverse Recovery Energy vs. Junction Temperature

0.5

Conditions:

I_DS= 400 A, V_DD=600 V

I_DS= 400 A, T_VJ= 25°C,

V_GS= -4/+15 V

L = 13.6 µH

E_{On +}E_Off

T_JV= 25 °C, V_GS= -4/+15 V

0.4

0.3

0.2

0.1

0.0

L = 13.6 µH

E_On

E_Off

E_RR(V_DD= 600 V)

E_RR

External Gate Resistor, R_G(ext)(Ω)

Figure 15. MOSFET Switching Energy vs. External Gate Resistance

Figure 16. Reserve Recovery Energy vs. External Gate Resistance

1.0E+00

10 μs

1000.00

100.00

10.00

1.00

1.0E-01

1.0E-02

1.0E-03

1.0E-04

1.0E-05

1.0E-06

0.5

Limited by

R_DS(on)

100 μs

0.3

0.1

1 ms

0.05

0.02

100 ms

0.01

Conditions:

T_c= 25 °C

D = 0

Single Pulse

0.10

Parameter: t_p

0.01

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00

0.1

100

1000

Time, t_p(s)

Drain-Source Voltage, V_DS(V)

Figure 17. MOSFET Juction to Case Transient Thermal Impedance,

Z_{th JC}(°C/W)

Figure 18. Forward-Bias Safe Operating Area (FBSOA)

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Typical Performance

900

450

400

350

300

250

200

150

100

Conditions:

T _VJ≤ 175 °C

800

Chip

700

Module (R_G(ext)= 0 Ω)

Module (R_G(ext)= 1 Ω)

600

500

400

300

200

100

Conditions:

T_VJ= 175 °C

L_Stray-system= 3.5 nH

L_Stray-module= 6.7 nH

-50

100

150

200

400

600

800

1000

1200

Case Temperature, T_C(°C)

Drain-Source Voltage, V_DS(V)

Figure 20. Continuous Drain Current Derating vs.

Case Temperature

Figure 19. Reverse-Bias Safe Operating Area (RBSOA)

1200

1000

800

600

400

200

600

500

400

300

200

100

Conditions:

T _VJ≤ 175 °C

V_DS= 800 V

T_C= 90 °C

T_J= 175 °C

R_G(ext)= 0.0 Ω

MF = 1

-50

100

150

200

100

Case Temperature, T_C(°C)

Switching Frequency, F_S(kHz)

Figure 21. Maximum Power Dissipation Derating vs.

Case Temperature

Figure 22. Typical Ouput Current Capability vs. Switching Frequency

(Inverter Application)

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Schematic and Pin Out

8,9

NTC

Package Dimension (mm)

53.00 ±0.20

44.75 ±0.20

15.75 ±0.30

12.50 ±0.30

4.50 ±0.20

29.50 ±0.20

44.00 ±0.30

2.54

0.64

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

Package Dimension (mm)

Power Terminal Screw

Maximum Penetration Depth

Maximum

Penetration

Depth [mm]

DETAIL

SCALE 4 : 1

SECTION ^E-E

Supporting Links & Tools

• CGD12HBXMP: XM3 Evaluation Gate Driver

• CGD12HB00D: Diﬀerential Transceiver Board for CGD12HBXMP

• CRD200DA12E-XM3: 200 kW Inverter Kit for Conduction-Optimized XM3 (CPWR-AN30)

• KIT-CRD-CIL12N-XM3: Dynamic Performance Evaluation Board for the XM3 Module (CPWR-AN31)

• CPWR-AN28: Module Mounting Application Note

• CPWR-AN29: Thermal Interface Material Application Note

Notes

•

This product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human

body nor in applications in which failure of the product could lead to death, personal injury or property damage, including

but not limited to equipment used in the operation of nuclear facilities, life-support machines, cardiac defibrillators or similar

emergency medical equipment, aircraꢀ navigation or communication or control systems, or air traﬀic control systems.

•

The SiC MOSFET module switches at speeds beyond what is customarily associated with IGBT-based modules. Therefore, special

precautions are required to realize optimal performance. The interconnection between the gate driver and module housing

needs to be as short as possible. This will aﬀord optimal switching time and avoid the potential for device oscillation. Also, great

care is required to insure minimum inductance between the module and DC link capacitors to avoid excessive VDS overshoot.

Rev. -, 2019-10-31

CAB400M12XM3

4600 Silicon Dr., Durham, NC 27703

are registered trademarks of Cree, Inc.

CAB400M12XM3 [CREE]

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