CM1208-08MS [CALMIRCO]
7 & 8-Channel High-Speed ESD Protection Arrays; 7 ＆ 8通道高速ESD保护阵列
| 型号： | CM1208-08MS |
| 厂家： | 
CALIFORNIA MICRO DEVICES CORP |
| 描述： | 7 & 8-Channel High-Speed ESD Protection Arrays |
| 文件： | 总6页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CM1208-07/08
7 & 8-Channel High-Speed ESD Protection Arrays
Features
Product Description
•
•
•
Seven or eight channels of high-speed ESD pro-
tection
The CM1208-07/CM1208-08 is a diode array designed
to provide either 7 or 8 channels of ESD protection for
electronic components or sub-systems. Each channel
consists of a pair of diodes, which steers the ESD cur-
rent pulse to either the positive (VP) or negative (VN)
supply. The CM1208-07/08 devices will protect against
ESD pulses up to 15kV contact discharge per the Inter-
national Standard IEC61000-4-2.
Meets IEC-61000-4-2 Level 4 ESD protection
requirements (+8kV contact discharge)
Meets IEC-61000-4-2 +15kV air discharge
requirements
Low loading capacitance at 3pF typical
Low supply and leakage currents – ideal for bat-
tery-powered devices
•
•
These devices are particularly well-suited for portable
electronics (e.g.handheld and notebook computers)
because of its small package footprint, high ESD pro-
tection level, and low loading capacitance. They are
also suitable for protecting video output lines and I/O
ports in computers, set top boxes, digital TVs and
peripheral equipment.
•
•
Small MSOP-10 package
Lead-free versions available
Applications
•
•
•
•
High speed data line ESD protection
DVI ports
High resolution video (e.g. VGA ports)
Expansion ports for Notebook/Handheld
Computers
The CM1208-07/CM1208-08 is housed in a 10 pin
MSOP package and is available with optional lead-free
finishing.
•
5V pseudo RS-232 ports
Electrical Schematics
V
CH7
V
CH6
CH5
CH8
CH7
V
P
CH6
CH5
N
P
CH1 CH2
CH3 CH4
V
CH1 CH2
CH3
CM1208-08
CH4
V
N
N
CM1208-07
© 2004 California Micro Devices Corp. All rights reserved.
02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
1
CM1208-07/08
PACKAGE / PINOUT DIAGRAMS
Top View
Top View
CH1
CH2
CH3
CH4
VN
1
2
3
4
5
10
9
CH8
CH7
VP
CH1
CH2
CH3
CH4
VN
1
2
3
4
5
10
9
VN
CH7
VP
8
8
7
CH6
CH5
7
CH6
CH5
6
6
10-pin MSOP
CM1208-08MS
CM1208-08MR
10-pin MSOP
CM1208-07MS
CM1208-07MR
Note: These drawings are not to scale.
PIN DESCRIPTIONS
DEVICE
-07,-08
-07,-08
-07,-08
-07,-08
-07,-08
PIN
1
NAME
CH 1
CH 2
CH 3
CH 4
VN
TYPE
I/O
DESCRIPTION
ESD Channel
ESD Channel
ESD Channel
ESD Channel
2
I/O
3
I/O
4
I/O
5
GND
Negative voltage supply rail or ground reference rail
-07,-08
-07,-08
-07,-08
6
7
8
CH 5
CH 6
VP
I/O
I/O
ESD Channel
ESD Channel
Supply
Positive voltage supply rail
-07,-08
-07
9
CH 7
VN
I/O
ESD Channel
10
GND
Negative voltage supply rail or ground reference rail
-08
10
CH 8
I/O
ESD Channel
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Lead-free Finish
Ordering Part
Number1
Ordering Part
Number1
Pins
10
Package
MSOP
Part Marking
0807
Part Marking
807R
CM1208-07MS
CM1208-08MS
CM1208-07MR
CM1208-08MR
10
MSOP
0808
808R
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
02/02/04
CM1208-07/08
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
Supply Voltage (VP - VN)
6.0
V
Diode Forward DC Current (Note 1)
Operating Temperature Range
Storage Temperature Range
20
mA
°C
°C
V
-40 to +85
-65 to +150
DC Voltage at any channel input
(VN - 0.5) to (VP + 0.5)
Package Power Rating
MSOP Package
300
mW
Note 1: Only one diode conducting at a time.
STANDARD OPERATING CONDITIONS
PARAMETER
RATING
-40 to +85
0 to 5.5
UNITS
°C
Operating Temperature Range
Operating Supply Voltage (VP - VN)
V
© 2004 California Micro Devices Corp. All rights reserved.
02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
3
CM1208-07/08
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IP
Supply Current
(VP-VN)=5.0V
10
µA
VF
Diode Forward Voltage
Top Diode
IF = 20mA; TA=25°C
0.60
0.65
0.7
0.8
0.95
0.95
V
V
Bottom Diode
ILEAK
CIN
Channel Leakage Current
Channel Input Capacitance
TA=25°C
0.1
3
1.0
5
µA
At 1 MHz, OSC Level =
30mV, VP=5V, VN=0V,
pF
VCH=2.5V;
Note 2 applies
VESD
ESD Protection
Peak Discharge Voltage at any chan-
nel input
a) Contact discharge per
IEC 61000-4-2 standard
b) Human Body Model, MIL-
STD-883, Method 3015
Notes 2, 3 & 5
Notes 2, 3 & 4
8
kV
kV
15
VCL
Channel Clamp Voltage
At 8kV ESD HBM;
TA=25°C; Note 2, 3 & 4
Positive Transients
Negative Transients
VP + 5.0
VN - 5.0
V
V
Note 1: All parameters specified at T =-40 to +85°C unless otherwise noted.
A
Note 2: These parameters guaranteed by design and characterization.
Note 3: From I/O pins to V or V only. A bypass capacitor between V
V is required. It is recommended that V be bypassed
N P
P
N
P and
to V with a 0.2µF ceramic capacitor.
N
Note 4: Human Body Model per MIL-STD-883, Method 3015, C
= 100pF, R
= 1.5KΩ, V = 5.0V, V grounded.
Discharge
Discharge
P
N
Note 5: Standard IEC 61000-4-2 with C
= 150pF, R
= 330Ω, V = 5.0V, V grounded.
Discharge P N
Discharge
Performance Information
Typical Channel Input Capacitance vs. Channel Input Voltage at TA=25°C
5
4
3
T y p ic a l V a r ia t io n o f C
vs. V
IN
IN
2
1
0
(V = 5V, V = 0V, 0.2
µ
F chip capacitor between V and V )
P
N
P
N
0
1
2
3
4
5
Input Voltage
© 2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
02/02/04
CM1208-07/08
Application Information
Design Considerations
In order to realize the maximum protection against
ESD pulses, care must be taken in the PCB layout to
minimize parasitic series inductances on the Supply/
Ground rails as well as the signal trace segment
between the signal input (typically a connector) and the
ESD protection device. Refer to Figure 1, which illus-
trates an example of a positive ESD pulse striking an
input channel. The parasitic series inductance back to
the power supply is represented by L1 and L2. The volt-
age VCL on the line being protected is:
ance of the power supply respectively. As an example,
a ROUT of 1 ohm would result in a 10V increment in
V
CL for a peak IESD of 10A.
To mitigate these effects, a high frequency bypass
capacitor should be connected between the VP pin of
the ESD Protection Array and the ground plane. The
value of this bypass capacitor should be chosen such
that it will absorb the charge transferred by the ESD
pulse with minimal change in VP. Typically a value in
the 0.1µF to 0.2µF range is adequate for IEC-61000-4-
2 level 4 contact discharge protection (8kV). For higher
ESD voltages, the bypass capacitor should be
increased accordingly. Ceramic chip capacitors
mounted with short printed circuit board traces are
good choices for this application. Electrolytic capaci-
tors should be avoided as they have poor high fre-
quency characteristics. For extra protection, connect a
zener diode in parallel with the bypass capacitor to mit-
igate the effects of the parasitic series inductance
inherent in the capacitor. The breakdown voltage of the
zener diode should be slightly higher than the maxi-
mum supply voltage.
V
= Fwd voltage drop of D + V
+ L x d(I
) / dt
CL
1
SUPPLY
1
ESD
+ L x d(I
) / dt
2
ESD
where IESD is the ESD current pulse, and VSUPPLY is
the positive supply voltage.
An ESD current pulse can rise from zero to its peak
value in a very short time. As an example, a level 4
contact discharge per the IEC61000-4-2 standard
results in a current pulse that rises from zero to 30
Amps in 1ns. Here d(IESD)/dt can be approximated by
∆IESD/∆t, or 30/(1x10-9). So just 10nH of series induc-
tance (L1 and L2 combined) will lead to a 300V incre-
ment in VCL
!
As a general rule, the ESD Protection Array should be
located as close as possible to the point of entry of
expected electrostatic discharges. The power supply
bypass capacitor mentioned above should be as close
to the VP pin of the Protection Array as possible, with
minimum PCB trace lengths to the power supply,
ground planes and between the signal input and the
ESD device to minimize stray series inductance.
Similarly for negative ESD pulses, parasitic series
inductance from the VN pin to the ground rail will lead
to drastically increased negative voltage on the line
being protected.
Another consideration is the output impedance of the
power supply for fast transient currents. Most power
supplies exhibit a much higher output impedance to
fast transient current spikes. In the VCL equation
above, the VSUPPLY term, in reality, is given by (VDC
IESD x ROUT), where VDC and ROUT are the nominal
supply DC output voltage and effective output imped-
Additional Information
+
See also California Micro Devices Application Note
AP209, “Design Considerations for ESD Protection.”
L2
POSITIVE SUPPLY RAIL
VP
PATH OF ESD CURRENT PULSE I
ESD
D1
D2
L1
LINE BEING
PROTECTED
SYSTEM OR
CIRCUITRY
BEING
ONE
CHANNEL
OF
CHANNEL
INPUT
20A
PROTECTED
CM1208
VCL
0A
GROUND RAIL
VN
CHASSIS GROUND
Figure 1. Application of Positive ESD Pulse between Input Channel and Ground
© 2004 California Micro Devices Corp. All rights reserved.
02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
5
CM1208-07/08
Mechanical Details
MSOP Mechanical Specifications:
Mechanical Package Diagrams
CM1208-07/08 devices are packaged in 10-pin MSOP
packages. Dimensions are presented below.
TOP VIEW
For complete information on the MSOP-10 package,
see the California Micro Devices MSOP Package Infor-
mation document.
D
8
10
9
7
6
PACKAGE DIMENSIONS
Package
Pins
MSOP
10
E
H
Pin 1
Marking
Millimeters
Inches
Dimensions
Min
Max
0.95
0.15
0.40
Min
Max
0.038
0.006
0.016
A
0.75
0.05
0.18
0.028
0.002
0.006
1
2
3
4
5
A1
B
SIDE VIEW
C
0.18
0.007
D
2.90
2.90
3.10
3.10
0.114
0.114
0.122
0.122
A
E
SEATING
PLANE
A1
e
0.50 BSC
0.0196 BSC
B
e
H
L
4.76
0.40
5.00
0.70
0.187
0.0137
0.197
0.029
END VIEW
# per tube
80 pieces*
4000
# per tape
and reel
C
Controlling dimension: inches
L
* This is an approximate number which may vary.
Package Dimensions for MSOP-10
© 2004 California Micro Devices Corp. All rights reserved.
6
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
02/02/04
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