TISP61089ADR-S [BOURNS]

TISP61089 Gated Protector Series; TISP61089门控保护器系列
TISP61089ADR-S
型号: TISP61089ADR-S
厂家: BOURNS ELECTRONIC SOLUTIONS    BOURNS ELECTRONIC SOLUTIONS
描述:

TISP61089 Gated Protector Series
TISP61089门控保护器系列

电信集成电路 电信电路 电信保护电路 光电二极管 栅
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T
TISP61089D, TISP61089SD, TISP61089AD,  
TISP61089ASD  
N
IA  
L
P
M
O
C
S
H
o
R
*
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS  
PROGRAMMABLE OVERVOLTAGE PROTECTORS  
TISP61089 Gated Protector Series  
2/10 Overshoot Voltage Specified  
Overvoltage Protection for Negative Rail SLICs  
I
= 100 A, 2/10  
Dual Voltage-Tracking Protectors  
PP  
Element  
- ‘61089 for Battery Voltages to.......................................... -75 V  
- ‘61089A for Battery Voltages to ..................................... -100 V  
- Low Gate Triggering Current ....................................... < 5 mA  
- High Holding Current ............................................... > 150 mA  
V
8
Diode  
SCR  
12  
Rated for GR-1089-CORE and K.44 Impulses  
Impulse Wave Shape  
I
Package Options  
PPSM  
A
- Surface Mount 8-pin Small-Outline  
Line Feed-Thru Connection (D)  
Shunt Version Connection (SD)  
Voltage  
2/10  
Current  
2/10  
120  
40  
10/700  
10/1000  
5/310  
............................................. UL Recognized Components  
10/1000  
30  
D Package Top View and Device Symbol for Feed-Thru Pin-Out  
K1  
G
K1  
(Tip)  
(Tip) K1  
1
2
3
4
8
7
6
5
K1  
A
(Ground)  
(Ground)  
(Ring)  
(Gate)  
G
NC  
A
A
A
K2  
(Ring) K2  
NC - No internal connection  
Terminal typical application names shown in  
parenthesis  
K2  
K1  
K2  
SD6XAEB  
MD6XBDa  
D Package Top View and Device Symbol for Shunt (SD) Pin-Out  
(Tip) K1  
1
2
3
4
8
7
6
5
NC  
A
(Ground)  
(Ground)  
(Gate)  
G
NC  
A
A
A
G
(Ring) K2  
NC  
MD6XBE  
NC - No internal connection  
Terminal typical application names shown in  
parenthesis  
K2  
SD6XAU  
How To Order  
Order As  
Order As  
Device  
Package  
Carrier  
Device  
Package  
Carrier  
R†  
TISP61089DR-S  
TISP61089  
D (Small-Outline)  
TISP61089A  
D (Small-Outline)  
R†  
TISP61089ADR-S  
TISP61089S  
D (Small-Outline)  
TISP61089AS  
D (Small-Outline)  
R†  
TISP61089ASDR-S  
R†  
TISP61089SDR-S  
† Carrier R is Embossed Tape Reeled  
† Carrier R is Embossed Tape Reeled  
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
Description  
These ‘61089 parts are all dual forward-conducting buffered p-gate thyristor (SCR) overvoltage protectors. They are designed to protect  
monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and  
induction. The ‘61089 limits voltages that exceed the SLIC supply rail voltage. The ‘61089 parameters are specified to allow equipment  
compliance with Telcordia (formally Bellcore) GR-1089-CORE and ITU-T recommendations K.20, K.21 and K.45.  
The SLIC line driver section is typically powered from 0 V (ground) and a negative (battery) voltage. The protector gate is connected to this  
negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will then track the  
negative supply voltage and the overvoltage stress on the SLIC is minimized.  
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC  
negative supply rail value. If sufficient current is available from the overvoltage, then the protector SCR will switch into a low voltage on-state  
condition. As the overvoltage subsides the high holding current of ‘61089 SCR helps prevent d.c. latchup.  
The ‘61089 is intended to be used with a series resistance of at least 25 and a suitable overcurrent function for Telcordia compliance. Power  
fault conditions require a series overcurrent element which either interrupts or reduces the circuit current before the ‘61089 current rating is  
exceeded. For equipment compliant to ITU-T recommendations K.20 or K.21 or K.45 only, the series resistor value is set by the coordination  
requirements. For coordination with a 400 V limit GDT, a minimum series resistor value of 10 is recommended.  
The ‘61089 buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The  
regular pin-out for surface mount and through-hole packages is a feed through configuration. Connection to the SLIC is made via the ‘61089,  
Ring through pins 4 - 5 and Tip through pins 1 - 8. A non-feed-through surface mount (D) package is available. This shunt (SD) version pin-out  
does not make duplicate connections to pin 5 and pin 8 which increases package creepage distance from ground of the other connections  
from about 0.7 mm to over 3 mm. High voltage ringing SLICs, with battery voltages below -100 V and down to -155 V, can be protected by the  
TISP61089B device. Details of this device are in the TISP61089B data sheet.  
Absolute Maximum Ratings, -40 °C T 85 °C (Unless Otherwise Noted)  
J
Rating  
Symbol  
Value  
Unit  
61089  
-100  
-120  
Repetitive peak off-state voltage, V = 0  
GK  
V
V
DRM  
‘61089A  
61089  
-85  
Repetitive peak gate-cathode voltage, V = 0  
KA  
V
V
GKRM  
‘61089A  
-120  
Non-repetitive peak on-state pulse current (see Notes 1 and 2)  
10/1000 µs (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)  
5/320 µs (ITU-T K.20, K.21& K.45, K.44 open-circuit voltage wave shape 10/700 µs)  
1.2/50 µs (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)  
2/10 µs (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)  
30  
40  
I
A
PPSM  
100  
120  
Non-repetitive peak on-state current, V = -75 V, 50 Hz to 60 Hz (see Notes 1 and 2)  
GG  
0.1 s  
11  
1 s  
4.8  
2.7  
I
A
TSM  
5 s  
300 s  
900 s  
0.95  
0.93  
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Notes 1 and 2)  
Operating free-air temperature range  
I
+40  
A
GSM  
T
-40 to +85  
-40 to +150  
-40 to +150  
°C  
°C  
°C  
A
Junction temperature  
T
J
Storage temperature range  
T
stg  
NOTES: 1. Initially the protector must be in thermal equilibrium with -40 °C T 85 °C. The surge may be repeated after the device returns  
J
to its initial conditions. Gate voltage ranges are -20 V to -75 V for the ‘61089 and -20 V to -100 V for the ‘61089A.  
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both  
terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice  
the rated current value of an individual terminal pair). Above 85 °C, derate linearly to zero at 150 °C lead temperature.  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
Recommended Operating Conditions  
Component  
Min  
100  
25  
40  
8
Typ  
Max  
Unit  
nF  
C
Gate decoupling capacitor  
220  
G
Series resistor for GR-1089-CORE first-level surge survival  
Series resistor for GR-1089-CORE first-level and second-level surge survival  
Series resistor for GR-1089-CORE intra-building port surge survival  
Series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector  
R
S
10  
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted)  
J
Parameter  
Test Conditions  
Min  
Typ  
Max  
-5  
Unit  
µA  
T = 25 °C  
J
I
Off-state current  
V
= V , V = 0  
DRM GK  
D
D
T = 85 °C  
-50  
µA  
J
2/10 µs, I = -56 A, R = 45 , V = -48 V, C = 220 nF  
PP GG  
-57  
-60  
-60  
-64  
S
G
2/10 µs, I = -100 A, R = 50 , V = -48 V, C = 220 nF  
PP GG  
S
G
V
Breakover voltage  
V
(BO)  
1.2/50 µs, I = -53 A, R = 47 , V = -48 V, C = 220 nF  
PP GG  
S
G
1.2/50 µs, I = -96 A, R = 52 , V = -48 V, C = 220 nF  
PP GG  
S
G
2/10 µs, I = -56 A, R = 45 , V = -48 V, C = 220 nF  
PP GG  
9
S
G
Gate-cathode impulse 2/10 µs, I = -100 A, R = 50 , V = -48 V, C = 220 nF  
PP GG  
12  
12  
16  
S
G
V
V
V
V
GK(BO)  
breakover voltage  
1.2/50 µs, I = -53 A, R = 47 , V = -48 V, C = 220 nF  
PP GG  
S
G
1.2/50 µs, I = -96 A, R = 52 , V = -48 V, C = 220 nF  
PP GG  
S
G
V
Forward voltage  
I = 5 A, t = 200 µs  
3
F
F
w
2/10 µs, I = 56 A, R = 45 , V = -48 V, C = 220 nF  
PP GG  
6
8
S
G
Peak forward recovery 2/10 µs, I = 100 A, R = 50 , V = -48 V, C = 220 nF  
PP GG  
S
G
V
FRM  
voltage  
1.2/50 µs, I = 53 A, R = 47 , V = -48 V, C = 220 nF  
PP GG  
8
S
G
1.2/50 µs, I = 96 A, R = 52 , V = -48 V, C = 220 nF  
PP GG  
12  
S
G
I
Holding current  
I = -1 A, di/dt = 1A/ms, V = -48 V  
GG  
-150  
mA  
µA  
H
T
T = 25 °C  
-5  
-50  
5
J
I
Gate reverse current  
Gate trigger current  
V
= V = V , V = 0  
GK GKRM KA  
GKS  
GG  
T = 85 °C  
µA  
J
I
I = -3 A, t  
20 µs, V = -48 V  
GG  
mA  
GT  
T
p(g)  
p(g)  
Gate-cathode trigger  
voltage  
V
I = -3 A, t  
20 µs, V = -48 V  
GG  
2.5  
V
GT  
T
Q
C
Gate switching charge 1.2/50 µs, I = -53 A, R = 47 , V = -48 V, C = 220 nF  
PP GG  
0.1  
µC  
pF  
pF  
GS  
KA  
S
G
V
= -3 V  
100  
50  
Cathode-anode off-  
state capacitance  
D
f = 1 MHz, V = 1 V, I = 0, (see Note 3)  
d
G
V
= -48 V  
D
NOTES: 3. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured  
device terminals are a.c. connected to the guard terminal of the bridge.  
Thermal Characteristics  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
T = 25 °C, EIA/JESD51-3  
A
RθJA  
Junction to free air thermal resistance  
PCB, EIA/JESD51-2  
°C/W  
D Package  
120  
environment, P  
TOT  
= 1.7 W  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
Parameter Measurement Information  
+i  
Quadrant I  
IPPSM  
Forward  
Conduction  
Characteristic  
IFSM (= |ITSM|)  
IF  
VF  
VGK(BO)  
VGG  
+v  
-v  
ID  
IH  
V
(BO)  
IT  
ITSM  
Quadrant III  
IPPSM  
Switching  
Characteristic  
-i  
PM6XAAC  
Figure 1. Voltage-Current Characteristic  
Unless Otherwise Noted, All Voltages are Referenced to the Anode  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
Thermal Information  
PEAK NON-RECURRING AC  
vs  
CURRENT DURATION  
TI61AFA  
20  
15  
RING AND TIP TERM INALS:  
Equal ITSM values applied  
simultaneously  
GROUND TERM INAL:  
Current twice ITSM value  
10  
8
7
6
EIA /JESD51  
Environment and  
PCB, TA = 25 °C  
5
4
3
VGG = -80 V  
VGG = -60 V  
2
1.5  
1
VGG = -100 V  
0.8  
0.7  
0.6  
0.5  
0.01  
0.1  
1
10  
100  
1000  
t — Current Duration — s  
Figure 2. Non-repetitive Peak On-State Current against Duration  
(Gate Voltage Ranges are -20 V to -75 V for the '61089 and -20 V to -100 V for the '61089A)  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
APPLICATIONS INFORMATION  
Gated Protectors  
This section covers three topics. First, it is explained why gated protectors are needed. Second, the voltage limiting action of the protector is  
described. Third, an example application circuit is described.  
Purpose of Gated Protectors  
Fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic SLICs (Subscriber Line Interface  
Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. As the SLIC was usually powered  
from a fixed voltage negative supply rail, the limiting voltage of the protector could also be a fixed value. The TISP1072F3 is a typical example  
of a fixed voltage SLIC protector.  
SLICs have become more sophisticated. To minimize power consumption, some designs automatically adjust the supply voltage, VBAT, to a  
value that is just sufficient to drive the required line current. For short lines the supply voltage would be set low, but for long lines, a higher  
supply voltage would be generated to drive sufficient line current. The optimum protection for this type of SLIC would be given by a protection  
voltage which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyristor gate to the SLIC supply, Figure 3.  
This gated (programmable) protection arrangement minimizes the voltage stress on the SLIC, no matter what value of supply voltage.  
TIP  
WIRE  
SLIC  
'61089  
Th4  
RSa  
40  
600  
GENERATOR  
SOURCE  
RESISTANCE  
SWITCHING MODE  
POWER SUPPLY  
RSb  
40  
600  
Th5  
Tx  
RING  
WIRE  
C2  
AC  
ISLIC  
IG  
GENERATOR  
0 - 600 V rms  
C1  
220 nF  
IBAT  
VBAT  
D1  
AI6XAGB  
Figure 3. ‘61089 Buffered Gate Protector  
Operation of Gated Protectors  
Figures 4 and 5 show how the ’61089 device limits negative and positive overvoltages. Positive overvoltages (Figure 5) are clipped by the  
antiparallel diodes in the ’61089 protector and the resulting current is diverted to ground. Negative overvoltages (Figure 4) are initially clipped  
close to the SLIC negative supply rail value (VBAT). If sufficient current is available from the overvoltage, then the protector (Th5) will crowbar  
into a low voltage on-state condition. As the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup. The  
protection voltage will be the sum of the gate supply (VBAT) and the peak gate-cathode voltage (VGK(BO)). The protection voltage will be  
increased if there is a long connection between the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast  
impulse, the gate current (IG) is the same as the cathode current (IK). Rates of 70 A/µs can cause inductive voltages of 0.7 V in 2.5 cm of  
printed wiring track. To minimize this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking  
should be minimized. Inductive voltages in the protector cathode wiring will also increase the protection voltage. These voltages can be  
minimized by routing the SLIC connection through the protector as shown in Figure 3.  
Application Circuit  
Figure 6 shows a typical ’61089 part SLIC card protection circuit. The incoming line conductors, Ring (R) and Tip (T), connect to the relay  
matrix via the series overcurrent protection. Fusible resistors, fuses and positive temperature coefficient (PTC) thermistors can be used for  
overcurrent protection. Resistors will reduce the prospective current from the surge generator for both the ’61089 device and the ring/test  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
APPLICATIONS INFORMATION  
Application Circuit (Continued)  
protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator  
configuration may be ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as  
its inter-conductor protection voltage is twice the conductor to ground value.  
Relay contacts 3a and 3b connect the line conductors to the SLIC via the ’61089 protector. The protector gate reference voltage comes from  
the SLIC negative supply (VBAT). A 220 nF gate capacitor sources the high gate current pulses caused by fast rising impulses.  
SLIC  
PROTECTOR  
SLIC  
PROTECTOR  
SLIC  
SLIC  
IF  
Th5  
IK  
Th5  
'61089  
'61089  
IG  
VBAT  
VBAT  
C1  
C1  
220 nF  
220 nF  
AI6XAHC  
AI6XAIC  
Figure 4. Negative Overvoltage Condition  
Figure 5. Positive Overvoltage Condition  
OVER-  
CURRENT  
PROTECTION  
RING/TEST  
PROTECTION  
TEST  
RELAY  
RING  
RELAY  
SLIC  
RELAY  
SLIC  
PROTECTOR  
SLIC  
TIP  
WIRE  
Th1  
S3a  
Th4  
RSa  
S1a  
S2a  
Th3  
RSb  
Th5  
Th2  
RING  
WIRE  
S3b  
TISP  
3xxxF3  
OR  
'61089  
S1b  
S2b  
VBAT  
C1  
220 nF  
7xxxF3  
TEST  
EQUIP-  
MENT  
RING  
GENERATOR  
AI6XAJC  
Figure 6. Typical Application Circuit  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP61089 Gated Protector Series  
MECHANICAL DATA  
Device Symbolization Code  
Devices will be coded as below.  
Device  
Symbolization Code  
P61089  
TISP61089DR-S  
TISP61089SDR-S  
TISP61089ADR-S  
TISP61089ASDR-S  
61089S  
61089A  
1089AS  
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.  
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.  
NOVEMBER 1995 - REVISED JULY 2008  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  

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